Commit f55e911ff4143ad8cbcc4517d5fb0b9350ff6084
Committed by
Tom Rini
Tom Rini
1 parent
f131df8c1a
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arm: delete unused macro CONFIG_ARCH_DEVICE_TREE
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Rajeshwari Birje <rajeshwari.s@samsung.com> Cc: Inderpal Singh <inderpal.singh@linaro.org>
Showing 3 changed files with 0 additions and 14 deletions Inline Diff
arch/arm/cpu/armv7/tegra124/config.mk
| 1 | # | File was deleted | |
| 2 | # (C) Copyright 2013 | ||
| 3 | # NVIDIA Corporation <www.nvidia.com> | ||
| 4 | # (C) Copyright 2002 | ||
| 5 | # Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> | ||
| 6 | # | ||
| 7 | # SPDX-License-Identifier: GPL-2.0+ | ||
| 8 | # | ||
| 9 | |||
| 10 | CONFIG_ARCH_DEVICE_TREE := tegra124 | ||
| 11 | 1 | # |
include/configs/arndale.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics | 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * | 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ | 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | * | 5 | * |
| 6 | * Configuration settings for the SAMSUNG Arndale board. | 6 | * Configuration settings for the SAMSUNG Arndale board. |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #ifndef __CONFIG_ARNDALE_H | 9 | #ifndef __CONFIG_ARNDALE_H |
| 10 | #define __CONFIG_ARNDALE_H | 10 | #define __CONFIG_ARNDALE_H |
| 11 | 11 | ||
| 12 | /* High Level Configuration Options */ | 12 | /* High Level Configuration Options */ |
| 13 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ | 13 | #define CONFIG_SAMSUNG /* in a SAMSUNG core */ |
| 14 | #define CONFIG_S5P /* S5P Family */ | 14 | #define CONFIG_S5P /* S5P Family */ |
| 15 | #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ | 15 | #define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */ |
| 16 | #define CONFIG_EXYNOS5250 | 16 | #define CONFIG_EXYNOS5250 |
| 17 | 17 | ||
| 18 | #include <asm/arch/cpu.h> /* get chip and board defs */ | 18 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
| 19 | 19 | ||
| 20 | #define CONFIG_SYS_GENERIC_BOARD | 20 | #define CONFIG_SYS_GENERIC_BOARD |
| 21 | #define CONFIG_ARCH_CPU_INIT | 21 | #define CONFIG_ARCH_CPU_INIT |
| 22 | #define CONFIG_DISPLAY_CPUINFO | 22 | #define CONFIG_DISPLAY_CPUINFO |
| 23 | #define CONFIG_DISPLAY_BOARDINFO | 23 | #define CONFIG_DISPLAY_BOARDINFO |
| 24 | 24 | ||
| 25 | /* Enable fdt support for Exynos5250 */ | ||
| 26 | #define CONFIG_ARCH_DEVICE_TREE exynos5250 | ||
| 27 | #define CONFIG_OF_CONTROL | 25 | #define CONFIG_OF_CONTROL |
| 28 | #define CONFIG_OF_SEPARATE | 26 | #define CONFIG_OF_SEPARATE |
| 29 | 27 | ||
| 30 | /* Allow tracing to be enabled */ | 28 | /* Allow tracing to be enabled */ |
| 31 | #define CONFIG_TRACE | 29 | #define CONFIG_TRACE |
| 32 | #define CONFIG_CMD_TRACE | 30 | #define CONFIG_CMD_TRACE |
| 33 | #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) | 31 | #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) |
| 34 | #define CONFIG_TRACE_EARLY_SIZE (8 << 20) | 32 | #define CONFIG_TRACE_EARLY_SIZE (8 << 20) |
| 35 | #define CONFIG_TRACE_EARLY | 33 | #define CONFIG_TRACE_EARLY |
| 36 | #define CONFIG_TRACE_EARLY_ADDR 0x50000000 | 34 | #define CONFIG_TRACE_EARLY_ADDR 0x50000000 |
| 37 | 35 | ||
| 38 | /* Keep L2 Cache Disabled */ | 36 | /* Keep L2 Cache Disabled */ |
| 39 | #define CONFIG_SYS_DCACHE_OFF | 37 | #define CONFIG_SYS_DCACHE_OFF |
| 40 | 38 | ||
| 41 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 | 39 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 42 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 | 40 | #define CONFIG_SYS_TEXT_BASE 0x43E00000 |
| 43 | 41 | ||
| 44 | /* input clock of PLL: SMDK5250 has 24MHz input clock */ | 42 | /* input clock of PLL: SMDK5250 has 24MHz input clock */ |
| 45 | #define CONFIG_SYS_CLK_FREQ 24000000 | 43 | #define CONFIG_SYS_CLK_FREQ 24000000 |
| 46 | 44 | ||
| 47 | #define CONFIG_SETUP_MEMORY_TAGS | 45 | #define CONFIG_SETUP_MEMORY_TAGS |
| 48 | #define CONFIG_CMDLINE_TAG | 46 | #define CONFIG_CMDLINE_TAG |
| 49 | #define CONFIG_INITRD_TAG | 47 | #define CONFIG_INITRD_TAG |
| 50 | #define CONFIG_CMDLINE_EDITING | 48 | #define CONFIG_CMDLINE_EDITING |
| 51 | 49 | ||
| 52 | /* Power Down Modes */ | 50 | /* Power Down Modes */ |
| 53 | #define S5P_CHECK_SLEEP 0x00000BAD | 51 | #define S5P_CHECK_SLEEP 0x00000BAD |
| 54 | #define S5P_CHECK_DIDLE 0xBAD00000 | 52 | #define S5P_CHECK_DIDLE 0xBAD00000 |
| 55 | #define S5P_CHECK_LPA 0xABAD0000 | 53 | #define S5P_CHECK_LPA 0xABAD0000 |
| 56 | 54 | ||
| 57 | /* Offset for inform registers */ | 55 | /* Offset for inform registers */ |
| 58 | #define INFORM0_OFFSET 0x800 | 56 | #define INFORM0_OFFSET 0x800 |
| 59 | #define INFORM1_OFFSET 0x804 | 57 | #define INFORM1_OFFSET 0x804 |
| 60 | 58 | ||
| 61 | /* Size of malloc() pool */ | 59 | /* Size of malloc() pool */ |
| 62 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) | 60 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20)) |
| 63 | 61 | ||
| 64 | /* select serial console configuration */ | 62 | /* select serial console configuration */ |
| 65 | #define CONFIG_BAUDRATE 115200 | 63 | #define CONFIG_BAUDRATE 115200 |
| 66 | #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 | 64 | #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 |
| 67 | #define CONFIG_SILENT_CONSOLE | 65 | #define CONFIG_SILENT_CONSOLE |
| 68 | 66 | ||
| 69 | /* Console configuration */ | 67 | /* Console configuration */ |
| 70 | #define CONFIG_CONSOLE_MUX | 68 | #define CONFIG_CONSOLE_MUX |
| 71 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV | 69 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
| 72 | #define EXYNOS_DEVICE_SETTINGS \ | 70 | #define EXYNOS_DEVICE_SETTINGS \ |
| 73 | "stdin=serial\0" \ | 71 | "stdin=serial\0" \ |
| 74 | "stdout=serial\0" \ | 72 | "stdout=serial\0" \ |
| 75 | "stderr=serial\0" | 73 | "stderr=serial\0" |
| 76 | 74 | ||
| 77 | #define CONFIG_EXTRA_ENV_SETTINGS \ | 75 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 78 | EXYNOS_DEVICE_SETTINGS | 76 | EXYNOS_DEVICE_SETTINGS |
| 79 | 77 | ||
| 80 | /* SD/MMC configuration */ | 78 | /* SD/MMC configuration */ |
| 81 | #define CONFIG_GENERIC_MMC | 79 | #define CONFIG_GENERIC_MMC |
| 82 | #define CONFIG_MMC | 80 | #define CONFIG_MMC |
| 83 | #define CONFIG_SDHCI | 81 | #define CONFIG_SDHCI |
| 84 | #define CONFIG_S5P_SDHCI | 82 | #define CONFIG_S5P_SDHCI |
| 85 | #define CONFIG_DWMMC | 83 | #define CONFIG_DWMMC |
| 86 | #define CONFIG_EXYNOS_DWMMC | 84 | #define CONFIG_EXYNOS_DWMMC |
| 87 | #define CONFIG_SUPPORT_EMMC_BOOT | 85 | #define CONFIG_SUPPORT_EMMC_BOOT |
| 88 | #define CONFIG_BOUNCE_BUFFER | 86 | #define CONFIG_BOUNCE_BUFFER |
| 89 | 87 | ||
| 90 | 88 | ||
| 91 | #define CONFIG_BOARD_EARLY_INIT_F | 89 | #define CONFIG_BOARD_EARLY_INIT_F |
| 92 | #define CONFIG_SKIP_LOWLEVEL_INIT | 90 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 93 | 91 | ||
| 94 | /* PWM */ | 92 | /* PWM */ |
| 95 | #define CONFIG_PWM | 93 | #define CONFIG_PWM |
| 96 | 94 | ||
| 97 | /* allow to overwrite serial and ethaddr */ | 95 | /* allow to overwrite serial and ethaddr */ |
| 98 | #define CONFIG_ENV_OVERWRITE | 96 | #define CONFIG_ENV_OVERWRITE |
| 99 | 97 | ||
| 100 | /* Command definition*/ | 98 | /* Command definition*/ |
| 101 | #include <config_cmd_default.h> | 99 | #include <config_cmd_default.h> |
| 102 | 100 | ||
| 103 | #define CONFIG_CMD_PING | 101 | #define CONFIG_CMD_PING |
| 104 | #define CONFIG_CMD_ELF | 102 | #define CONFIG_CMD_ELF |
| 105 | #define CONFIG_CMD_MMC | 103 | #define CONFIG_CMD_MMC |
| 106 | #define CONFIG_CMD_EXT2 | 104 | #define CONFIG_CMD_EXT2 |
| 107 | #define CONFIG_CMD_FAT | 105 | #define CONFIG_CMD_FAT |
| 108 | #define CONFIG_CMD_NET | 106 | #define CONFIG_CMD_NET |
| 109 | #define CONFIG_CMD_HASH | 107 | #define CONFIG_CMD_HASH |
| 110 | 108 | ||
| 111 | #define CONFIG_BOOTDELAY 3 | 109 | #define CONFIG_BOOTDELAY 3 |
| 112 | #define CONFIG_ZERO_BOOTDELAY_CHECK | 110 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
| 113 | 111 | ||
| 114 | /* USB */ | 112 | /* USB */ |
| 115 | #define CONFIG_CMD_USB | 113 | #define CONFIG_CMD_USB |
| 116 | #define CONFIG_USB_EHCI | 114 | #define CONFIG_USB_EHCI |
| 117 | #define CONFIG_USB_EHCI_EXYNOS | 115 | #define CONFIG_USB_EHCI_EXYNOS |
| 118 | #define CONFIG_USB_STORAGE | 116 | #define CONFIG_USB_STORAGE |
| 119 | 117 | ||
| 120 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 | 118 | #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 |
| 121 | #define CONFIG_USB_HOST_ETHER | 119 | #define CONFIG_USB_HOST_ETHER |
| 122 | #define CONFIG_USB_ETHER_ASIX | 120 | #define CONFIG_USB_ETHER_ASIX |
| 123 | 121 | ||
| 124 | /* MMC SPL */ | 122 | /* MMC SPL */ |
| 125 | #define CONFIG_EXYNOS_SPL | 123 | #define CONFIG_EXYNOS_SPL |
| 126 | #define CONFIG_SPL | 124 | #define CONFIG_SPL |
| 127 | #define COPY_BL2_FNPTR_ADDR 0x02020030 | 125 | #define COPY_BL2_FNPTR_ADDR 0x02020030 |
| 128 | 126 | ||
| 129 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | 127 | #define CONFIG_SPL_LIBCOMMON_SUPPORT |
| 130 | 128 | ||
| 131 | /* specific .lds file */ | 129 | /* specific .lds file */ |
| 132 | #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" | 130 | #define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds" |
| 133 | #define CONFIG_SPL_TEXT_BASE 0x02023400 | 131 | #define CONFIG_SPL_TEXT_BASE 0x02023400 |
| 134 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) | 132 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) |
| 135 | 133 | ||
| 136 | #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" | 134 | #define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000" |
| 137 | 135 | ||
| 138 | /* Miscellaneous configurable options */ | 136 | /* Miscellaneous configurable options */ |
| 139 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | 137 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 140 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | 138 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ |
| 141 | #define CONFIG_SYS_PROMPT "ARNDALE # " | 139 | #define CONFIG_SYS_PROMPT "ARNDALE # " |
| 142 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | 140 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 143 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ | 141 | #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ |
| 144 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | 142 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 145 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" | 143 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" |
| 146 | /* Boot Argument Buffer Size */ | 144 | /* Boot Argument Buffer Size */ |
| 147 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | 145 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 148 | /* memtest works on */ | 146 | /* memtest works on */ |
| 149 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | 147 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 150 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) | 148 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) |
| 151 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) | 149 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) |
| 152 | 150 | ||
| 153 | #define CONFIG_RD_LVL | 151 | #define CONFIG_RD_LVL |
| 154 | 152 | ||
| 155 | #define CONFIG_NR_DRAM_BANKS 8 | 153 | #define CONFIG_NR_DRAM_BANKS 8 |
| 156 | #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ | 154 | #define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */ |
| 157 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE | 155 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
| 158 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE | 156 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE |
| 159 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) | 157 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) |
| 160 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE | 158 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE |
| 161 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) | 159 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) |
| 162 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE | 160 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE |
| 163 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) | 161 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) |
| 164 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE | 162 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE |
| 165 | #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) | 163 | #define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE)) |
| 166 | #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE | 164 | #define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE |
| 167 | #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) | 165 | #define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE)) |
| 168 | #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE | 166 | #define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE |
| 169 | #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) | 167 | #define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE)) |
| 170 | #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE | 168 | #define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE |
| 171 | #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) | 169 | #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) |
| 172 | #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE | 170 | #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE |
| 173 | 171 | ||
| 174 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | 172 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 |
| 175 | 173 | ||
| 176 | /* FLASH and environment organization */ | 174 | /* FLASH and environment organization */ |
| 177 | #define CONFIG_SYS_NO_FLASH | 175 | #define CONFIG_SYS_NO_FLASH |
| 178 | #undef CONFIG_CMD_IMLS | 176 | #undef CONFIG_CMD_IMLS |
| 179 | #define CONFIG_IDENT_STRING " for ARNDALE" | 177 | #define CONFIG_IDENT_STRING " for ARNDALE" |
| 180 | 178 | ||
| 181 | #define CONFIG_SYS_MMC_ENV_DEV 0 | 179 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 182 | 180 | ||
| 183 | #define CONFIG_ENV_IS_IN_MMC | 181 | #define CONFIG_ENV_IS_IN_MMC |
| 184 | #define CONFIG_SECURE_BL1_ONLY | 182 | #define CONFIG_SECURE_BL1_ONLY |
| 185 | 183 | ||
| 186 | /* Secure FW size configuration */ | 184 | /* Secure FW size configuration */ |
| 187 | #ifdef CONFIG_SECURE_BL1_ONLY | 185 | #ifdef CONFIG_SECURE_BL1_ONLY |
| 188 | #define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ | 186 | #define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ |
| 189 | #else | 187 | #else |
| 190 | #define CONFIG_SEC_FW_SIZE 0 | 188 | #define CONFIG_SEC_FW_SIZE 0 |
| 191 | #endif | 189 | #endif |
| 192 | 190 | ||
| 193 | /* Configuration of BL1, BL2, ENV Blocks on mmc */ | 191 | /* Configuration of BL1, BL2, ENV Blocks on mmc */ |
| 194 | #define CONFIG_RES_BLOCK_SIZE (512) | 192 | #define CONFIG_RES_BLOCK_SIZE (512) |
| 195 | #define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ | 193 | #define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ |
| 196 | #define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ | 194 | #define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ |
| 197 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ | 195 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */ |
| 198 | 196 | ||
| 199 | #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) | 197 | #define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) |
| 200 | #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) | 198 | #define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) |
| 201 | #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) | 199 | #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) |
| 202 | 200 | ||
| 203 | /* U-boot copy size from boot Media to DRAM.*/ | 201 | /* U-boot copy size from boot Media to DRAM.*/ |
| 204 | #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) | 202 | #define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) |
| 205 | #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) | 203 | #define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) |
| 206 | 204 | ||
| 207 | #define CONFIG_DOS_PARTITION | 205 | #define CONFIG_DOS_PARTITION |
| 208 | #define CONFIG_EFI_PARTITION | 206 | #define CONFIG_EFI_PARTITION |
| 209 | #define CONFIG_CMD_PART | 207 | #define CONFIG_CMD_PART |
| 210 | #define CONFIG_PARTITION_UUIDS | 208 | #define CONFIG_PARTITION_UUIDS |
| 211 | 209 | ||
| 212 | 210 | ||
| 213 | #define CONFIG_IRAM_STACK 0x02050000 | 211 | #define CONFIG_IRAM_STACK 0x02050000 |
| 214 | 212 | ||
| 215 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK | 213 | #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK |
| 216 | 214 | ||
| 217 | /* I2C */ | 215 | /* I2C */ |
| 218 | #define CONFIG_SYS_I2C_INIT_BOARD | 216 | #define CONFIG_SYS_I2C_INIT_BOARD |
| 219 | #define CONFIG_SYS_I2C | 217 | #define CONFIG_SYS_I2C |
| 220 | #define CONFIG_CMD_I2C | 218 | #define CONFIG_CMD_I2C |
| 221 | #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */ | 219 | #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */ |
| 222 | #define CONFIG_SYS_I2C_S3C24X0 | 220 | #define CONFIG_SYS_I2C_S3C24X0 |
| 223 | #define CONFIG_MAX_I2C_NUM 8 | 221 | #define CONFIG_MAX_I2C_NUM 8 |
| 224 | #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0 | 222 | #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0 |
| 225 | #define CONFIG_I2C_EDID | 223 | #define CONFIG_I2C_EDID |
| 226 | 224 | ||
| 227 | /* PMIC */ | 225 | /* PMIC */ |
| 228 | #define CONFIG_PMIC | 226 | #define CONFIG_PMIC |
| 229 | #define CONFIG_PMIC_I2C | 227 | #define CONFIG_PMIC_I2C |
| 230 | #define CONFIG_PMIC_MAX77686 | 228 | #define CONFIG_PMIC_MAX77686 |
| 231 | 229 | ||
| 232 | #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale | 230 | #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale |
| 233 | 231 | ||
| 234 | /* Ethernet Controllor Driver */ | 232 | /* Ethernet Controllor Driver */ |
| 235 | #ifdef CONFIG_CMD_NET | 233 | #ifdef CONFIG_CMD_NET |
| 236 | #define CONFIG_SMC911X | 234 | #define CONFIG_SMC911X |
| 237 | #define CONFIG_SMC911X_BASE 0x5000000 | 235 | #define CONFIG_SMC911X_BASE 0x5000000 |
| 238 | #define CONFIG_SMC911X_16_BIT | 236 | #define CONFIG_SMC911X_16_BIT |
| 239 | #define CONFIG_ENV_SROM_BANK 1 | 237 | #define CONFIG_ENV_SROM_BANK 1 |
| 240 | #endif /*CONFIG_CMD_NET*/ | 238 | #endif /*CONFIG_CMD_NET*/ |
| 241 | 239 | ||
| 242 | /* Enable PXE Support */ | 240 | /* Enable PXE Support */ |
| 243 | #ifdef CONFIG_CMD_NET | 241 | #ifdef CONFIG_CMD_NET |
| 244 | #define CONFIG_CMD_PXE | 242 | #define CONFIG_CMD_PXE |
| 245 | #define CONFIG_MENU | 243 | #define CONFIG_MENU |
| 246 | #endif | 244 | #endif |
| 247 | 245 | ||
| 248 | /* Enable devicetree support */ | 246 | /* Enable devicetree support */ |
| 249 | #define CONFIG_OF_LIBFDT | 247 | #define CONFIG_OF_LIBFDT |
| 250 | 248 | ||
| 251 | /* Enable Time Command */ | 249 | /* Enable Time Command */ |
| 252 | #define CONFIG_CMD_TIME | 250 | #define CONFIG_CMD_TIME |
| 253 | 251 | ||
| 254 | #endif /* __CONFIG_H */ | 252 | #endif /* __CONFIG_H */ |
| 255 | 253 |
include/configs/smdk5420.h
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) 2013 Samsung Electronics | 2 | * Copyright (C) 2013 Samsung Electronics |
| 3 | * | 3 | * |
| 4 | * Configuration settings for the SAMSUNG EXYNOS5420 board. | 4 | * Configuration settings for the SAMSUNG EXYNOS5420 board. |
| 5 | * | 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #ifndef __CONFIG_5420_H | 9 | #ifndef __CONFIG_5420_H |
| 10 | #define __CONFIG_5420_H | 10 | #define __CONFIG_5420_H |
| 11 | 11 | ||
| 12 | #include <configs/exynos5-dt.h> | 12 | #include <configs/exynos5-dt.h> |
| 13 | 13 | ||
| 14 | #define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */ | 14 | #define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */ |
| 15 | #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ | 15 | #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ |
| 16 | 16 | ||
| 17 | #undef CONFIG_DEFAULT_DEVICE_TREE | 17 | #undef CONFIG_DEFAULT_DEVICE_TREE |
| 18 | #define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420 | 18 | #define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420 |
| 19 | 19 | ||
| 20 | #define CONFIG_ARCH_DEVICE_TREE exynos5420 | ||
| 21 | |||
| 22 | #define CONFIG_VAR_SIZE_SPL | 20 | #define CONFIG_VAR_SIZE_SPL |
| 23 | 21 | ||
| 24 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 | 22 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 25 | #define CONFIG_SYS_TEXT_BASE 0x23E00000 | 23 | #define CONFIG_SYS_TEXT_BASE 0x23E00000 |
| 26 | 24 | ||
| 27 | #define CONFIG_BOARD_REV_GPIO_COUNT 2 | 25 | #define CONFIG_BOARD_REV_GPIO_COUNT 2 |
| 28 | 26 | ||
| 29 | /* MACH_TYPE_SMDK5420 macro will be removed once added to mach-types */ | 27 | /* MACH_TYPE_SMDK5420 macro will be removed once added to mach-types */ |
| 30 | #define MACH_TYPE_SMDK5420 8002 /* Temporary number */ | 28 | #define MACH_TYPE_SMDK5420 8002 /* Temporary number */ |
| 31 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420 | 29 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420 |
| 32 | 30 | ||
| 33 | /* select serial console configuration */ | 31 | /* select serial console configuration */ |
| 34 | #define CONFIG_SERIAL3 /* use SERIAL 3 */ | 32 | #define CONFIG_SERIAL3 /* use SERIAL 3 */ |
| 35 | 33 | ||
| 36 | #ifdef CONFIG_VAR_SIZE_SPL | 34 | #ifdef CONFIG_VAR_SIZE_SPL |
| 37 | #define CONFIG_SPL_TEXT_BASE 0x02024410 | 35 | #define CONFIG_SPL_TEXT_BASE 0x02024410 |
| 38 | #else | 36 | #else |
| 39 | #define CONFIG_SPL_TEXT_BASE 0x02024400 | 37 | #define CONFIG_SPL_TEXT_BASE 0x02024400 |
| 40 | #endif | 38 | #endif |
| 41 | 39 | ||
| 42 | #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000" | 40 | #define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000" |
| 43 | 41 | ||
| 44 | #define CONFIG_SYS_PROMPT "SMDK5420 # " | 42 | #define CONFIG_SYS_PROMPT "SMDK5420 # " |
| 45 | #define CONFIG_IDENT_STRING " for SMDK5420" | 43 | #define CONFIG_IDENT_STRING " for SMDK5420" |
| 46 | 44 | ||
| 47 | #define CONFIG_IRAM_TOP 0x02074000 | 45 | #define CONFIG_IRAM_TOP 0x02074000 |
| 48 | /* | 46 | /* |
| 49 | * Put the initial stack pointer 1KB below this to allow room for the | 47 | * Put the initial stack pointer 1KB below this to allow room for the |
| 50 | * SPL marker. This value is arbitrary, but gd_t is placed starting here. | 48 | * SPL marker. This value is arbitrary, but gd_t is placed starting here. |
| 51 | */ | 49 | */ |
| 52 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) | 50 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800) |
| 53 | 51 | ||
| 54 | #define CONFIG_MAX_I2C_NUM 11 | 52 | #define CONFIG_MAX_I2C_NUM 11 |
| 55 | 53 | ||
| 56 | #endif /* __CONFIG_5420_H */ | 54 | #endif /* __CONFIG_5420_H */ |
| 57 | 55 |