Commit f86bd769fd0624106ecd2c5d500518e8b83a4e27

Authored by Thomas RIENOESSL
Committed by Bin Meng
1 parent 2677a15e58

coreboot: only init usb if necessary

Up until now the call to initialize the USB subsystem was hardcoded
for U-Boot running as a coreboot payload. This was used to enable
the use of a USB keyboard in the U-Boot shell. However not all boards
might need this functionality. As initializing the USB subsystem can
take a considerable amount of time (several seconds on some boards),
we now initialize the USB subsystem only if U-Boot is configured to
use USB keyboards.

Signed-off-by: Thomas RIENOESSL <thomas.rienoessl@bachmann.info>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

Showing 1 changed file with 2 additions and 1 deletions Inline Diff

arch/x86/cpu/coreboot/coreboot.c
1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * Copyright (c) 2011 The Chromium OS Authors. 3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2008 4 * (C) Copyright 2008
5 * Graeme Russ, graeme.russ@gmail.com. 5 * Graeme Russ, graeme.russ@gmail.com.
6 */ 6 */
7 7
8 #include <common.h> 8 #include <common.h>
9 #include <fdtdec.h> 9 #include <fdtdec.h>
10 #include <usb.h> 10 #include <usb.h>
11 #include <asm/io.h> 11 #include <asm/io.h>
12 #include <asm/msr.h> 12 #include <asm/msr.h>
13 #include <asm/mtrr.h> 13 #include <asm/mtrr.h>
14 #include <asm/arch/sysinfo.h> 14 #include <asm/arch/sysinfo.h>
15 #include <asm/arch/timestamp.h> 15 #include <asm/arch/timestamp.h>
16 16
17 DECLARE_GLOBAL_DATA_PTR; 17 DECLARE_GLOBAL_DATA_PTR;
18 18
19 int arch_cpu_init(void) 19 int arch_cpu_init(void)
20 { 20 {
21 int ret = get_coreboot_info(&lib_sysinfo); 21 int ret = get_coreboot_info(&lib_sysinfo);
22 if (ret != 0) { 22 if (ret != 0) {
23 printf("Failed to parse coreboot tables.\n"); 23 printf("Failed to parse coreboot tables.\n");
24 return ret; 24 return ret;
25 } 25 }
26 26
27 timestamp_init(); 27 timestamp_init();
28 28
29 return x86_cpu_init_f(); 29 return x86_cpu_init_f();
30 } 30 }
31 31
32 int checkcpu(void) 32 int checkcpu(void)
33 { 33 {
34 return 0; 34 return 0;
35 } 35 }
36 36
37 int print_cpuinfo(void) 37 int print_cpuinfo(void)
38 { 38 {
39 return default_print_cpuinfo(); 39 return default_print_cpuinfo();
40 } 40 }
41 41
42 static void board_final_cleanup(void) 42 static void board_final_cleanup(void)
43 { 43 {
44 /* 44 /*
45 * Un-cache the ROM so the kernel has one 45 * Un-cache the ROM so the kernel has one
46 * more MTRR available. 46 * more MTRR available.
47 * 47 *
48 * Coreboot should have assigned this to the 48 * Coreboot should have assigned this to the
49 * top available variable MTRR. 49 * top available variable MTRR.
50 */ 50 */
51 u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1; 51 u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1;
52 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff; 52 u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff;
53 53
54 /* Make sure this MTRR is the correct Write-Protected type */ 54 /* Make sure this MTRR is the correct Write-Protected type */
55 if (top_type == MTRR_TYPE_WRPROT) { 55 if (top_type == MTRR_TYPE_WRPROT) {
56 struct mtrr_state state; 56 struct mtrr_state state;
57 57
58 mtrr_open(&state, true); 58 mtrr_open(&state, true);
59 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0); 59 wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
60 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0); 60 wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
61 mtrr_close(&state, true); 61 mtrr_close(&state, true);
62 } 62 }
63 63
64 if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) { 64 if (!fdtdec_get_config_bool(gd->fdt_blob, "u-boot,no-apm-finalize")) {
65 /* 65 /*
66 * Issue SMI to coreboot to lock down ME and registers 66 * Issue SMI to coreboot to lock down ME and registers
67 * when allowed via device tree 67 * when allowed via device tree
68 */ 68 */
69 printf("Finalizing coreboot\n"); 69 printf("Finalizing coreboot\n");
70 outb(0xcb, 0xb2); 70 outb(0xcb, 0xb2);
71 } 71 }
72 } 72 }
73 73
74 int last_stage_init(void) 74 int last_stage_init(void)
75 { 75 {
76 if (gd->flags & GD_FLG_COLD_BOOT) 76 if (gd->flags & GD_FLG_COLD_BOOT)
77 timestamp_add_to_bootstage(); 77 timestamp_add_to_bootstage();
78 78
79 /* start usb so that usb keyboard can be used as input device */ 79 /* start usb so that usb keyboard can be used as input device */
80 usb_init(); 80 if (CONFIG_IS_ENABLED(USB_KEYBOARD))
81 usb_init();
81 82
82 board_final_cleanup(); 83 board_final_cleanup();
83 84
84 return 0; 85 return 0;
85 } 86 }
86 87