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Commit f97daaa2317b68aacfbf19bb7566183e17db3349

Authored by Lucas Stach
Committed by Albert ARIBAUD (U-Boot)
1 parent 1e2d785975
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

tegra: add ULPI on USB2 funcmux entry 

This is needed as a prerequisite for Tegra USB ULPI support
within U-Boot.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 2 changed files with 15 additions and 1 deletions Inline Diff

arch/arm/cpu/armv7/tegra2/funcmux.c
Diff comments   View file @ f97daaa
1 /* 1 /*
2 * Copyright (c) 2011 The Chromium OS Authors. 2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this 3 * See file CREDITS for list of people who contributed to this
4 * project. 4 * project.
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as 7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of 8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version. 9 * the License, or (at your option) any later version.
10 * 10 *
11 * This program is distributed in the hope that it will be useful, 11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 * 15 *
16 * You should have received a copy of the GNU General Public License 16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA 19 * MA 02111-1307 USA
20 */ 20 */
21 21
22 /* Tegra2 high-level function multiplexing */ 22 /* Tegra2 high-level function multiplexing */
23 #include <common.h> 23 #include <common.h>
24 #include <asm/arch/clock.h> 24 #include <asm/arch/clock.h>
25 #include <asm/arch/funcmux.h> 25 #include <asm/arch/funcmux.h>
26 #include <asm/arch/pinmux.h> 26 #include <asm/arch/pinmux.h>
27 27
28 int funcmux_select(enum periph_id id, int config) 28 int funcmux_select(enum periph_id id, int config)
29 { 29 {
30 int bad_config = config != FUNCMUX_DEFAULT; 30 int bad_config = config != FUNCMUX_DEFAULT;
31 31
32 switch (id) { 32 switch (id) {
33 case PERIPH_ID_UART1: 33 case PERIPH_ID_UART1:
34 switch (config) { 34 switch (config) {
35 case FUNCMUX_UART1_IRRX_IRTX: 35 case FUNCMUX_UART1_IRRX_IRTX:
36 pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA); 36 pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
37 pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); 37 pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
38 pinmux_tristate_disable(PINGRP_IRRX); 38 pinmux_tristate_disable(PINGRP_IRRX);
39 pinmux_tristate_disable(PINGRP_IRTX); 39 pinmux_tristate_disable(PINGRP_IRTX);
40 break; 40 break;
41 case FUNCMUX_UART1_UAA_UAB: 41 case FUNCMUX_UART1_UAA_UAB:
42 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA); 42 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
43 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA); 43 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
44 pinmux_tristate_disable(PINGRP_UAA); 44 pinmux_tristate_disable(PINGRP_UAA);
45 pinmux_tristate_disable(PINGRP_UAB); 45 pinmux_tristate_disable(PINGRP_UAB);
46 bad_config = 0; 46 bad_config = 0;
47 break; 47 break;
48 case FUNCMUX_UART1_GPU: 48 case FUNCMUX_UART1_GPU:
49 pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA); 49 pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA);
50 pinmux_tristate_disable(PINGRP_GPU); 50 pinmux_tristate_disable(PINGRP_GPU);
51 bad_config = 0; 51 bad_config = 0;
52 break; 52 break;
53 case FUNCMUX_UART1_SDIO1: 53 case FUNCMUX_UART1_SDIO1:
54 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA); 54 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA);
55 pinmux_tristate_disable(PINGRP_SDIO1); 55 pinmux_tristate_disable(PINGRP_SDIO1);
56 bad_config = 0; 56 bad_config = 0;
57 break; 57 break;
58 } 58 }
59 if (!bad_config) { 59 if (!bad_config) {
60 /* 60 /*
61 * Tegra appears to boot with function UARTA pre- 61 * Tegra appears to boot with function UARTA pre-
62 * selected on mux group SDB. If two mux groups are 62 * selected on mux group SDB. If two mux groups are
63 * both set to the same function, it's unclear which 63 * both set to the same function, it's unclear which
64 * group's pins drive the RX signals into the HW. 64 * group's pins drive the RX signals into the HW.
65 * For UARTA, SDB certainly overrides group IRTX in 65 * For UARTA, SDB certainly overrides group IRTX in
66 * practice. To solve this, configure some alternative 66 * practice. To solve this, configure some alternative
67 * function on SDB to avoid the conflict. Also, tri- 67 * function on SDB to avoid the conflict. Also, tri-
68 * state the group to avoid driving any signal onto it 68 * state the group to avoid driving any signal onto it
69 * until we know what's connected. 69 * until we know what's connected.
70 */ 70 */
71 pinmux_tristate_enable(PINGRP_SDB); 71 pinmux_tristate_enable(PINGRP_SDB);
72 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); 72 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
73 } 73 }
74 break; 74 break;
75 75
76 case PERIPH_ID_UART2: 76 case PERIPH_ID_UART2:
77 if (config == FUNCMUX_UART2_IRDA) { 77 if (config == FUNCMUX_UART2_IRDA) {
78 pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA); 78 pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
79 pinmux_tristate_disable(PINGRP_UAD); 79 pinmux_tristate_disable(PINGRP_UAD);
80 } 80 }
81 break; 81 break;
82 82
83 case PERIPH_ID_UART4: 83 case PERIPH_ID_UART4:
84 if (config == FUNCMUX_UART4_GMC) { 84 if (config == FUNCMUX_UART4_GMC) {
85 pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD); 85 pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
86 pinmux_tristate_disable(PINGRP_GMC); 86 pinmux_tristate_disable(PINGRP_GMC);
87 } 87 }
88 break; 88 break;
89 89
90 case PERIPH_ID_DVC_I2C: 90 case PERIPH_ID_DVC_I2C:
91 /* there is only one selection, pinmux_config is ignored */ 91 /* there is only one selection, pinmux_config is ignored */
92 if (config == FUNCMUX_DVC_I2CP) { 92 if (config == FUNCMUX_DVC_I2CP) {
93 pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C); 93 pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C);
94 pinmux_tristate_disable(PINGRP_I2CP); 94 pinmux_tristate_disable(PINGRP_I2CP);
95 } 95 }
96 break; 96 break;
97 97
98 case PERIPH_ID_I2C1: 98 case PERIPH_ID_I2C1:
99 /* support pinmux_config of 0 for now, */ 99 /* support pinmux_config of 0 for now, */
100 if (config == FUNCMUX_I2C1_RM) { 100 if (config == FUNCMUX_I2C1_RM) {
101 pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C); 101 pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C);
102 pinmux_tristate_disable(PINGRP_RM); 102 pinmux_tristate_disable(PINGRP_RM);
103 } 103 }
104 break; 104 break;
105 case PERIPH_ID_I2C2: /* I2C2 */ 105 case PERIPH_ID_I2C2: /* I2C2 */
106 switch (config) { 106 switch (config) {
107 case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */ 107 case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */
108 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2); 108 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2);
109 /* PTA to HDMI */ 109 /* PTA to HDMI */
110 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI); 110 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI);
111 pinmux_tristate_disable(PINGRP_DDC); 111 pinmux_tristate_disable(PINGRP_DDC);
112 break; 112 break;
113 case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */ 113 case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */
114 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2); 114 pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2);
115 /* set DDC_SEL to RSVDx (RSVD2 works for now) */ 115 /* set DDC_SEL to RSVDx (RSVD2 works for now) */
116 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2); 116 pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2);
117 pinmux_tristate_disable(PINGRP_PTA); 117 pinmux_tristate_disable(PINGRP_PTA);
118 bad_config = 0; 118 bad_config = 0;
119 break; 119 break;
120 } 120 }
121 break; 121 break;
122 case PERIPH_ID_I2C3: /* I2C3 */ 122 case PERIPH_ID_I2C3: /* I2C3 */
123 /* support pinmux_config of 0 for now */ 123 /* support pinmux_config of 0 for now */
124 if (config == FUNCMUX_I2C3_DTF) { 124 if (config == FUNCMUX_I2C3_DTF) {
125 pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3); 125 pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3);
126 pinmux_tristate_disable(PINGRP_DTF); 126 pinmux_tristate_disable(PINGRP_DTF);
127 } 127 }
128 break; 128 break;
129 129
130 case PERIPH_ID_SDMMC1: 130 case PERIPH_ID_SDMMC1:
131 if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) { 131 if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) {
132 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1); 132 pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
133 pinmux_tristate_disable(PINGRP_SDIO1); 133 pinmux_tristate_disable(PINGRP_SDIO1);
134 } 134 }
135 break; 135 break;
136 136
137 case PERIPH_ID_SDMMC2: 137 case PERIPH_ID_SDMMC2:
138 if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) { 138 if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
139 pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); 139 pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
140 pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); 140 pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
141 141
142 pinmux_tristate_disable(PINGRP_DTA); 142 pinmux_tristate_disable(PINGRP_DTA);
143 pinmux_tristate_disable(PINGRP_DTD); 143 pinmux_tristate_disable(PINGRP_DTD);
144 } 144 }
145 break; 145 break;
146 146
147 case PERIPH_ID_SDMMC3: 147 case PERIPH_ID_SDMMC3:
148 switch (config) { 148 switch (config) {
149 case FUNCMUX_SDMMC3_SDB_SLXA_8BIT: 149 case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
150 pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3); 150 pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
151 pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3); 151 pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
152 pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3); 152 pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
153 pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3); 153 pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
154 154
155 pinmux_tristate_disable(PINGRP_SLXA); 155 pinmux_tristate_disable(PINGRP_SLXA);
156 pinmux_tristate_disable(PINGRP_SLXC); 156 pinmux_tristate_disable(PINGRP_SLXC);
157 pinmux_tristate_disable(PINGRP_SLXD); 157 pinmux_tristate_disable(PINGRP_SLXD);
158 pinmux_tristate_disable(PINGRP_SLXK); 158 pinmux_tristate_disable(PINGRP_SLXK);
159 /* fall through */ 159 /* fall through */
160 160
161 case FUNCMUX_SDMMC3_SDB_4BIT: 161 case FUNCMUX_SDMMC3_SDB_4BIT:
162 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); 162 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
163 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); 163 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
164 pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3); 164 pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
165 165
166 pinmux_tristate_disable(PINGRP_SDB); 166 pinmux_tristate_disable(PINGRP_SDB);
167 pinmux_tristate_disable(PINGRP_SDC); 167 pinmux_tristate_disable(PINGRP_SDC);
168 pinmux_tristate_disable(PINGRP_SDD); 168 pinmux_tristate_disable(PINGRP_SDD);
169 bad_config = 0; 169 bad_config = 0;
170 break; 170 break;
171 } 171 }
172 break; 172 break;
173 173
174 case PERIPH_ID_SDMMC4: 174 case PERIPH_ID_SDMMC4:
175 switch (config) { 175 switch (config) {
176 case FUNCMUX_SDMMC4_ATC_ATD_8BIT: 176 case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
177 pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4); 177 pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
178 pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4); 178 pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
179 179
180 pinmux_tristate_disable(PINGRP_ATC); 180 pinmux_tristate_disable(PINGRP_ATC);
181 pinmux_tristate_disable(PINGRP_ATD); 181 pinmux_tristate_disable(PINGRP_ATD);
182 break; 182 break;
183 183
184 case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT: 184 case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
185 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); 185 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
186 pinmux_tristate_disable(PINGRP_GME); 186 pinmux_tristate_disable(PINGRP_GME);
187 /* fall through */ 187 /* fall through */
188 188
189 case FUNCMUX_SDMMC4_ATB_GMA_4_BIT: 189 case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
190 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); 190 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
191 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); 191 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
192 192
193 pinmux_tristate_disable(PINGRP_ATB); 193 pinmux_tristate_disable(PINGRP_ATB);
194 pinmux_tristate_disable(PINGRP_GMA); 194 pinmux_tristate_disable(PINGRP_GMA);
195 bad_config = 0; 195 bad_config = 0;
196 break; 196 break;
197 } 197 }
198 break; 198 break;
199 199
200 case PERIPH_ID_KBC: 200 case PERIPH_ID_KBC:
201 if (config == FUNCMUX_DEFAULT) { 201 if (config == FUNCMUX_DEFAULT) {
202 enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB, 202 enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
203 PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE, 203 PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
204 PINGRP_KBCF}; 204 PINGRP_KBCF};
205 int i; 205 int i;
206 206
207 for (i = 0; i < ARRAY_SIZE(grp); i++) { 207 for (i = 0; i < ARRAY_SIZE(grp); i++) {
208 pinmux_tristate_disable(grp[i]); 208 pinmux_tristate_disable(grp[i]);
209 pinmux_set_func(grp[i], PMUX_FUNC_KBC); 209 pinmux_set_func(grp[i], PMUX_FUNC_KBC);
210 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP); 210 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
211 } 211 }
212 }
213 break;
212 214
213 break; 215 case PERIPH_ID_USB2:
216 if (config == FUNCMUX_USB2_ULPI) {
217 pinmux_set_func(PINGRP_UAA, PMUX_FUNC_ULPI);
218 pinmux_set_func(PINGRP_UAB, PMUX_FUNC_ULPI);
219 pinmux_set_func(PINGRP_UDA, PMUX_FUNC_ULPI);
220
221 pinmux_tristate_disable(PINGRP_UAA);
222 pinmux_tristate_disable(PINGRP_UAB);
223 pinmux_tristate_disable(PINGRP_UDA);
214 } 224 }
225 break;
215 226
216 default: 227 default:
217 debug("%s: invalid periph_id %d", __func__, id); 228 debug("%s: invalid periph_id %d", __func__, id);
218 return -1; 229 return -1;
219 } 230 }
220 231
221 if (bad_config) { 232 if (bad_config) {
222 debug("%s: invalid config %d for periph_id %d", __func__, 233 debug("%s: invalid config %d for periph_id %d", __func__,
223 config, id); 234 config, id);
224 return -1; 235 return -1;
225 } 236 }
226 237
227 return 0; 238 return 0;
228 } 239 }
229 240
arch/arm/include/asm/arch-tegra2/funcmux.h
Diff comments   View file @ f97daaa
1 /* 1 /*
2 * Copyright (c) 2011 The Chromium OS Authors. 2 * Copyright (c) 2011 The Chromium OS Authors.
3 * See file CREDITS for list of people who contributed to this 3 * See file CREDITS for list of people who contributed to this
4 * project. 4 * project.
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as 7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of 8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version. 9 * the License, or (at your option) any later version.
10 * 10 *
11 * This program is distributed in the hope that it will be useful, 11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details. 14 * GNU General Public License for more details.
15 * 15 *
16 * You should have received a copy of the GNU General Public License 16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA 19 * MA 02111-1307 USA
20 */ 20 */
21 21
22 /* Tegra2 high-level function multiplexing */ 22 /* Tegra2 high-level function multiplexing */
23 23
24 #ifndef __FUNCMUX_H 24 #ifndef __FUNCMUX_H
25 #define __FUNCMUX_H 25 #define __FUNCMUX_H
26 26
27 /* Configs supported by the func mux */ 27 /* Configs supported by the func mux */
28 enum { 28 enum {
29 FUNCMUX_DEFAULT = 0, /* default config */ 29 FUNCMUX_DEFAULT = 0, /* default config */
30 30
31 /* UART configs */ 31 /* UART configs */
32 FUNCMUX_UART1_IRRX_IRTX = 0, 32 FUNCMUX_UART1_IRRX_IRTX = 0,
33 FUNCMUX_UART1_UAA_UAB, 33 FUNCMUX_UART1_UAA_UAB,
34 FUNCMUX_UART1_GPU, 34 FUNCMUX_UART1_GPU,
35 FUNCMUX_UART1_SDIO1, 35 FUNCMUX_UART1_SDIO1,
36 FUNCMUX_UART2_IRDA = 0, 36 FUNCMUX_UART2_IRDA = 0,
37 FUNCMUX_UART4_GMC = 0, 37 FUNCMUX_UART4_GMC = 0,
38 38
39 /* I2C configs */ 39 /* I2C configs */
40 FUNCMUX_DVC_I2CP = 0, 40 FUNCMUX_DVC_I2CP = 0,
41 FUNCMUX_I2C1_RM = 0, 41 FUNCMUX_I2C1_RM = 0,
42 FUNCMUX_I2C2_DDC = 0, 42 FUNCMUX_I2C2_DDC = 0,
43 FUNCMUX_I2C2_PTA, 43 FUNCMUX_I2C2_PTA,
44 FUNCMUX_I2C3_DTF = 0, 44 FUNCMUX_I2C3_DTF = 0,
45 45
46 /* SDMMC configs */ 46 /* SDMMC configs */
47 FUNCMUX_SDMMC1_SDIO1_4BIT = 0, 47 FUNCMUX_SDMMC1_SDIO1_4BIT = 0,
48 FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0, 48 FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0,
49 FUNCMUX_SDMMC3_SDB_4BIT = 0, 49 FUNCMUX_SDMMC3_SDB_4BIT = 0,
50 FUNCMUX_SDMMC3_SDB_SLXA_8BIT, 50 FUNCMUX_SDMMC3_SDB_SLXA_8BIT,
51 FUNCMUX_SDMMC4_ATC_ATD_8BIT = 0, 51 FUNCMUX_SDMMC4_ATC_ATD_8BIT = 0,
52 FUNCMUX_SDMMC4_ATB_GMA_4_BIT, 52 FUNCMUX_SDMMC4_ATB_GMA_4_BIT,
53 FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT, 53 FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT,
54
55 /* USB configs */
56 FUNCMUX_USB2_ULPI = 0,
54 }; 57 };
55 58
56 /** 59 /**
57 * Select a config for a particular peripheral. 60 * Select a config for a particular peripheral.
58 * 61 *
59 * Each peripheral can operate through a number of configurations, 62 * Each peripheral can operate through a number of configurations,
60 * which are sets of pins that it uses to bring out its signals. 63 * which are sets of pins that it uses to bring out its signals.
61 * The basic config is 0, and higher numbers indicate different 64 * The basic config is 0, and higher numbers indicate different
62 * pinmux settings to bring the peripheral out on other pins, 65 * pinmux settings to bring the peripheral out on other pins,
63 * 66 *
64 * This function also disables tristate for the function's pins, 67 * This function also disables tristate for the function's pins,
65 * so that they operate in normal mode. 68 * so that they operate in normal mode.
66 * 69 *
67 * @param id Peripheral id 70 * @param id Peripheral id
68 * @param config Configuration to use (FUNCMUX_...), 0 for default 71 * @param config Configuration to use (FUNCMUX_...), 0 for default
69 * @return 0 if ok, -1 on error (e.g. incorrect id or config) 72 * @return 0 if ok, -1 on error (e.g. incorrect id or config)
70 */ 73 */
71 int funcmux_select(enum periph_id id, int config); 74 int funcmux_select(enum periph_id id, int config);
72 75
73 #endif 76 #endif
74 77