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Commit fbad4641fb194f9a864d7f666f02851770184933

Authored by David Müller (ELSOFT AG)
Committed by Tom Rini
1 parent cf7d4505e3
Exists in v2017.01-smarct4x and in 40 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf-6.6.52-2.2.0, emb_lf_v2022.04, emb_lf_v2023.04, emb_lf_v2024.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

VCMA9: remove EXT2 support 

remove the seldomly used EXT2 support because the U-Boot binary will
not fit into the 512KiB flash otherwise.

Signed-off-by: David Müller <d.mueller@elsoft.ch>

Showing 1 changed file with 0 additions and 1 deletions Inline Diff

include/configs/VCMA9.h
Diff comments   View file @ fbad464
1 /* 1 /*
2 * (C) Copyright 2002, 2003 2 * (C) Copyright 2002, 2003
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> 3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de> 4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de> 5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch> 6 * David Mueller <d.mueller@elsoft.ch>
7 * 7 *
8 * Configuation settings for the MPL VCMA9 board. 8 * Configuation settings for the MPL VCMA9 board.
9 * 9 *
10 * SPDX-License-Identifier: GPL-2.0+ 10 * SPDX-License-Identifier: GPL-2.0+
11 */ 11 */
12 12
13 #ifndef __CONFIG_H 13 #ifndef __CONFIG_H
14 #define __CONFIG_H 14 #define __CONFIG_H
15 15
16 16
17 #define MACH_TYPE_MPL_VCMA9 227 17 #define MACH_TYPE_MPL_VCMA9 227
18 18
19 /* 19 /*
20 * High Level Configuration Options 20 * High Level Configuration Options
21 * (easy to change) 21 * (easy to change)
22 */ 22 */
23 #define CONFIG_ARM920T /* This is an ARM920T Core */ 23 #define CONFIG_ARM920T /* This is an ARM920T Core */
24 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */ 24 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
25 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */ 25 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
26 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */ 26 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
27 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */ 27 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
28 28
29 #define CONFIG_SYS_TEXT_BASE 0x0 29 #define CONFIG_SYS_TEXT_BASE 0x0
30 30
31 #define CONFIG_SYS_GENERIC_BOARD 31 #define CONFIG_SYS_GENERIC_BOARD
32 32
33 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH 33 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
34 34
35 /* input clock of PLL (VCMA9 has 12MHz input clock) */ 35 /* input clock of PLL (VCMA9 has 12MHz input clock) */
36 #define CONFIG_SYS_CLK_FREQ 12000000 36 #define CONFIG_SYS_CLK_FREQ 12000000
37 37
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS 39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG 40 #define CONFIG_INITRD_TAG
41 41
42 /* 42 /*
43 * BOOTP options 43 * BOOTP options
44 */ 44 */
45 #define CONFIG_BOOTP_BOOTFILESIZE 45 #define CONFIG_BOOTP_BOOTFILESIZE
46 #define CONFIG_BOOTP_BOOTPATH 46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_GATEWAY 47 #define CONFIG_BOOTP_GATEWAY
48 #define CONFIG_BOOTP_HOSTNAME 48 #define CONFIG_BOOTP_HOSTNAME
49 49
50 /* 50 /*
51 * Command line configuration. 51 * Command line configuration.
52 */ 52 */
53 #include <config_cmd_default.h> 53 #include <config_cmd_default.h>
54 54
55 #define CONFIG_CMD_CACHE 55 #define CONFIG_CMD_CACHE
56 #define CONFIG_CMD_EEPROM 56 #define CONFIG_CMD_EEPROM
57 #define CONFIG_CMD_I2C 57 #define CONFIG_CMD_I2C
58 #define CONFIG_CMD_USB 58 #define CONFIG_CMD_USB
59 #define CONFIG_CMD_REGINFO 59 #define CONFIG_CMD_REGINFO
60 #define CONFIG_CMD_DATE 60 #define CONFIG_CMD_DATE
61 #define CONFIG_CMD_ELF 61 #define CONFIG_CMD_ELF
62 #define CONFIG_CMD_DHCP 62 #define CONFIG_CMD_DHCP
63 #define CONFIG_CMD_PING 63 #define CONFIG_CMD_PING
64 #define CONFIG_CMD_BSP 64 #define CONFIG_CMD_BSP
65 #define CONFIG_CMD_NAND 65 #define CONFIG_CMD_NAND
66 #define CONFIG_CMD_NAND_YAFFS 66 #define CONFIG_CMD_NAND_YAFFS
67 67
68 #define CONFIG_BOARD_LATE_INIT 68 #define CONFIG_BOARD_LATE_INIT
69 69
70 #define CONFIG_SYS_HUSH_PARSER 70 #define CONFIG_SYS_HUSH_PARSER
71 #define CONFIG_CMDLINE_EDITING 71 #define CONFIG_CMDLINE_EDITING
72 72
73 /* 73 /*
74 * I2C stuff: 74 * I2C stuff:
75 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at 75 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
76 * address 0x50 with 16bit addressing 76 * address 0x50 with 16bit addressing
77 */ 77 */
78 #define CONFIG_SYS_I2C 78 #define CONFIG_SYS_I2C
79 79
80 /* we use the built-in I2C controller */ 80 /* we use the built-in I2C controller */
81 #define CONFIG_SYS_I2C_S3C24X0 81 #define CONFIG_SYS_I2C_S3C24X0
82 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */ 82 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
83 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */ 83 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
84 84
85 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 85 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
86 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 86 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
87 /* use EEPROM for environment vars */ 87 /* use EEPROM for environment vars */
88 #define CONFIG_ENV_IS_IN_EEPROM 1 88 #define CONFIG_ENV_IS_IN_EEPROM 1
89 /* environment starts at offset 0 */ 89 /* environment starts at offset 0 */
90 #define CONFIG_ENV_OFFSET 0x000 90 #define CONFIG_ENV_OFFSET 0x000
91 /* 2KB should be more than enough */ 91 /* 2KB should be more than enough */
92 #define CONFIG_ENV_SIZE 0x800 92 #define CONFIG_ENV_SIZE 0x800
93 93
94 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 94 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
95 /* 64 bytes page write mode on 24C256 */ 95 /* 64 bytes page write mode on 24C256 */
96 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 96 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
97 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 97 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
98 98
99 /* 99 /*
100 * Hardware drivers 100 * Hardware drivers
101 */ 101 */
102 #define CONFIG_CS8900 /* we have a CS8900 on-board */ 102 #define CONFIG_CS8900 /* we have a CS8900 on-board */
103 #define CONFIG_CS8900_BASE 0x20000300 103 #define CONFIG_CS8900_BASE 0x20000300
104 #define CONFIG_CS8900_BUS16 104 #define CONFIG_CS8900_BUS16
105 105
106 /* 106 /*
107 * select serial console configuration 107 * select serial console configuration
108 */ 108 */
109 #define CONFIG_S3C24X0_SERIAL 109 #define CONFIG_S3C24X0_SERIAL
110 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */ 110 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
111 111
112 /* USB support (currently only works with D-cache off) */ 112 /* USB support (currently only works with D-cache off) */
113 #define CONFIG_USB_OHCI 113 #define CONFIG_USB_OHCI
114 #define CONFIG_USB_OHCI_S3C24XX 114 #define CONFIG_USB_OHCI_S3C24XX
115 #define CONFIG_USB_KEYBOARD 115 #define CONFIG_USB_KEYBOARD
116 #define CONFIG_USB_STORAGE 116 #define CONFIG_USB_STORAGE
117 #define CONFIG_DOS_PARTITION 117 #define CONFIG_DOS_PARTITION
118 118
119 /* Enable needed helper functions */ 119 /* Enable needed helper functions */
120 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */ 120 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
121 121
122 /* RTC */ 122 /* RTC */
123 #define CONFIG_RTC_S3C24X0 123 #define CONFIG_RTC_S3C24X0
124 124
125 125
126 /* allow to overwrite serial and ethaddr */ 126 /* allow to overwrite serial and ethaddr */
127 #define CONFIG_ENV_OVERWRITE 127 #define CONFIG_ENV_OVERWRITE
128 128
129 #define CONFIG_BAUDRATE 9600 129 #define CONFIG_BAUDRATE 9600
130 130
131 #define CONFIG_BOOTDELAY 5 131 #define CONFIG_BOOTDELAY 5
132 #define CONFIG_BOOT_RETRY_TIME -1 132 #define CONFIG_BOOT_RETRY_TIME -1
133 #define CONFIG_RESET_TO_RETRY 133 #define CONFIG_RESET_TO_RETRY
134 #define CONFIG_ZERO_BOOTDELAY_CHECK 134 #define CONFIG_ZERO_BOOTDELAY_CHECK
135 135
136 #define CONFIG_NETMASK 255.255.255.0 136 #define CONFIG_NETMASK 255.255.255.0
137 #define CONFIG_IPADDR 10.0.0.110 137 #define CONFIG_IPADDR 10.0.0.110
138 #define CONFIG_SERVERIP 10.0.0.1 138 #define CONFIG_SERVERIP 10.0.0.1
139 139
140 #if defined(CONFIG_CMD_KGDB) 140 #if defined(CONFIG_CMD_KGDB)
141 /* speed to run kgdb serial port */ 141 /* speed to run kgdb serial port */
142 #define CONFIG_KGDB_BAUDRATE 115200 142 #define CONFIG_KGDB_BAUDRATE 115200
143 #endif 143 #endif
144 144
145 /* Miscellaneous configurable options */ 145 /* Miscellaneous configurable options */
146 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 146 #define CONFIG_SYS_LONGHELP /* undef to save memory */
147 #define CONFIG_SYS_PROMPT "VCMA9 # " 147 #define CONFIG_SYS_PROMPT "VCMA9 # "
148 #define CONFIG_SYS_CBSIZE 256 148 #define CONFIG_SYS_CBSIZE 256
149 /* Print Buffer Size */ 149 /* Print Buffer Size */
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
151 #define CONFIG_SYS_MAXARGS 16 151 #define CONFIG_SYS_MAXARGS 16
152 /* Boot Argument Buffer Size */ 152 /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 153 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
154 154
155 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ 155 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
156 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */ 156 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */
157 157
158 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */ 158 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
159 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */ 159 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
160 160
161 #define CONFIG_SYS_ALT_MEMTEST 161 #define CONFIG_SYS_ALT_MEMTEST
162 #define CONFIG_SYS_LOAD_ADDR 0x30800000 162 #define CONFIG_SYS_LOAD_ADDR 0x30800000
163 163
164 /* we configure PWM Timer 4 to 1ms 1000Hz */ 164 /* we configure PWM Timer 4 to 1ms 1000Hz */
165 165
166 /* support additional compression methods */ 166 /* support additional compression methods */
167 #define CONFIG_BZIP2 167 #define CONFIG_BZIP2
168 #define CONFIG_LZO 168 #define CONFIG_LZO
169 #define CONFIG_LZMA 169 #define CONFIG_LZMA
170 170
171 /* Ident */ 171 /* Ident */
172 /*#define VERSION_TAG "released"*/ 172 /*#define VERSION_TAG "released"*/
173 #define VERSION_TAG "unstable" 173 #define VERSION_TAG "unstable"
174 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \ 174 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
175 "MEV-10080-001 " VERSION_TAG 175 "MEV-10080-001 " VERSION_TAG
176 176
177 /* Physical Memory Map */ 177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 178 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
179 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ 179 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
180 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 180 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
181 181
182 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 182 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
183 183
184 /* FLASH and environment organization */ 184 /* FLASH and environment organization */
185 185
186 #define CONFIG_SYS_FLASH_CFI 186 #define CONFIG_SYS_FLASH_CFI
187 #define CONFIG_FLASH_CFI_DRIVER 187 #define CONFIG_FLASH_CFI_DRIVER
188 #define CONFIG_FLASH_CFI_LEGACY 188 #define CONFIG_FLASH_CFI_LEGACY
189 #define CONFIG_SYS_FLASH_LEGACY_512Kx16 189 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
190 #define CONFIG_FLASH_SHOW_PROGRESS 45 190 #define CONFIG_FLASH_SHOW_PROGRESS 45
191 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 191 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
192 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 192 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
193 #define CONFIG_SYS_MAX_FLASH_SECT (19) 193 #define CONFIG_SYS_MAX_FLASH_SECT (19)
194 194
195 /* 195 /*
196 * Size of malloc() pool 196 * Size of malloc() pool
197 * BZIP2 / LZO / LZMA need a lot of RAM 197 * BZIP2 / LZO / LZMA need a lot of RAM
198 */ 198 */
199 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 199 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
200 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 200 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
201 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 201 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
202 202
203 /* NAND configuration */ 203 /* NAND configuration */
204 #ifdef CONFIG_CMD_NAND 204 #ifdef CONFIG_CMD_NAND
205 #define CONFIG_NAND_S3C2410 205 #define CONFIG_NAND_S3C2410
206 #define CONFIG_SYS_S3C2410_NAND_HWECC 206 #define CONFIG_SYS_S3C2410_NAND_HWECC
207 #define CONFIG_SYS_MAX_NAND_DEVICE 1 207 #define CONFIG_SYS_MAX_NAND_DEVICE 1
208 #define CONFIG_SYS_NAND_BASE 0x4E000000 208 #define CONFIG_SYS_NAND_BASE 0x4E000000
209 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING 209 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
210 #define CONFIG_S3C24XX_TACLS 1 210 #define CONFIG_S3C24XX_TACLS 1
211 #define CONFIG_S3C24XX_TWRPH0 5 211 #define CONFIG_S3C24XX_TWRPH0 5
212 #define CONFIG_S3C24XX_TWRPH1 3 212 #define CONFIG_S3C24XX_TWRPH1 3
213 #endif 213 #endif
214 214
215 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000 215 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
216 216
217 /* File system */ 217 /* File system */
218 #define CONFIG_CMD_FAT 218 #define CONFIG_CMD_FAT
219 #define CONFIG_CMD_EXT2
220 #define CONFIG_CMD_UBI 219 #define CONFIG_CMD_UBI
221 #define CONFIG_CMD_UBIFS 220 #define CONFIG_CMD_UBIFS
222 #define CONFIG_CMD_JFFS2 221 #define CONFIG_CMD_JFFS2
223 #define CONFIG_YAFFS2 222 #define CONFIG_YAFFS2
224 #define CONFIG_RBTREE 223 #define CONFIG_RBTREE
225 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 224 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
226 #define CONFIG_MTD_PARTITIONS 225 #define CONFIG_MTD_PARTITIONS
227 #define CONFIG_CMD_MTDPARTS 226 #define CONFIG_CMD_MTDPARTS
228 #define CONFIG_LZO 227 #define CONFIG_LZO
229 228
230 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 229 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
231 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ 230 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
232 GENERATED_GBL_DATA_SIZE) 231 GENERATED_GBL_DATA_SIZE)
233 232
234 #define CONFIG_BOARD_EARLY_INIT_F 233 #define CONFIG_BOARD_EARLY_INIT_F
235 234
236 #endif /* __CONFIG_H */ 235 #endif /* __CONFIG_H */
237 236