Commit 00b38ab35d9bd2253a4d1e659382871d2220e095
Committed by
John W. Linville
John W. Linville
1 parent
7af1ce0e0d
Exists in
master
and in
20 other branches
ssb: implement ssb spuravoid for chipid BCM43222
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Showing 1 changed file with 17 additions and 2 deletions Side-by-side Diff
drivers/ssb/driver_chipcommon_pmu.c
| ... | ... | @@ -687,8 +687,23 @@ |
| 687 | 687 | pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD; |
| 688 | 688 | break; |
| 689 | 689 | case 43222: |
| 690 | - /* TODO: BCM43222 requires updating PLLs too */ | |
| 691 | - return; | |
| 690 | + if (spuravoid == 1) { | |
| 691 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008); | |
| 692 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06); | |
| 693 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08); | |
| 694 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000); | |
| 695 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920); | |
| 696 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815); | |
| 697 | + } else { | |
| 698 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008); | |
| 699 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06); | |
| 700 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08); | |
| 701 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000); | |
| 702 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0); | |
| 703 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855); | |
| 704 | + } | |
| 705 | + pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD; | |
| 706 | + break; | |
| 692 | 707 | default: |
| 693 | 708 | ssb_printk(KERN_ERR PFX |
| 694 | 709 | "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", |