Commit 0ca583a239a854fd403bf8b659cdff8c603372c9

Authored by Hongbo Zhang
Committed by Vinod Koul
1 parent 5f9e685a0d

DMA: Freescale: change BWC from 256 bytes to 1024 bytes

Freescale DMA has a feature of BandWidth Control (ab. BWC), which is currently
256 bytes and should be changed to 1024 bytes for best DMA throughput.
Changing BWC from 256 to 1024 will improve DMA performance much, in cases
whatever one channel is running or multi channels are running simultanously,
large or small buffers are copied.  And this change doesn't impact memory
access performance remarkably, lmbench tests show that for some cases the
memory performance are decreased very slightly, while the others are even
better.
Tested on T4240.

Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff

drivers/dma/fsldma.h
... ... @@ -41,7 +41,7 @@
41 41 * channel is allowed to transfer before the DMA engine pauses
42 42 * the current channel and switches to the next channel
43 43 */
44   -#define FSL_DMA_MR_BWC 0x08000000
  44 +#define FSL_DMA_MR_BWC 0x0A000000
45 45  
46 46 /* Special MR definition for MPC8349 */
47 47 #define FSL_DMA_MR_EOTIE 0x00000080