Commit 1dbb36bc7b9f648c489a5a2f73a5120a4ecab1ed

Authored by Olof Johansson

Merge tag 'berlin-fixes-for-3.19-1' of git://git.infradead.org/users/hesselba/li…

…nux-berlin into fixes

Merge "ARM: berlin: Fixes for v3.19 (round 1)" from Sebastian Hesselbarth:

Marvell Berlin fixes for v3.19 round 1:
- SDHCI DT fixes for BG2Q and BG2Q reference board
- BG2Q SM GPIO DT node relocation

* tag 'berlin-fixes-for-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin:
  ARM: dts: berlin: correct BG2Q's SM GPIO location.
  ARM: dts: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT
  ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

Signed-off-by: Olof Johansson <olof@lixom.net>

Showing 2 changed files Side-by-side Diff

arch/arm/boot/dts/berlin2q-marvell-dmp.dts
... ... @@ -65,6 +65,8 @@
65 65 };
66 66  
67 67 &sdhci2 {
  68 + broken-cd;
  69 + bus-width = <8>;
68 70 non-removable;
69 71 status = "okay";
70 72 };
arch/arm/boot/dts/berlin2q.dtsi
... ... @@ -83,7 +83,8 @@
83 83 compatible = "mrvl,pxav3-mmc";
84 84 reg = <0xab1000 0x200>;
85 85 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
86   - clocks = <&chip CLKID_SDIO1XIN>;
  86 + clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
  87 + clock-names = "io", "core";
87 88 status = "disabled";
88 89 };
89 90  
... ... @@ -348,36 +349,6 @@
348 349 interrupt-parent = <&gic>;
349 350 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
350 351 };
351   -
352   - gpio4: gpio@5000 {
353   - compatible = "snps,dw-apb-gpio";
354   - reg = <0x5000 0x400>;
355   - #address-cells = <1>;
356   - #size-cells = <0>;
357   -
358   - porte: gpio-port@4 {
359   - compatible = "snps,dw-apb-gpio-port";
360   - gpio-controller;
361   - #gpio-cells = <2>;
362   - snps,nr-gpios = <32>;
363   - reg = <0>;
364   - };
365   - };
366   -
367   - gpio5: gpio@c000 {
368   - compatible = "snps,dw-apb-gpio";
369   - reg = <0xc000 0x400>;
370   - #address-cells = <1>;
371   - #size-cells = <0>;
372   -
373   - portf: gpio-port@5 {
374   - compatible = "snps,dw-apb-gpio-port";
375   - gpio-controller;
376   - #gpio-cells = <2>;
377   - snps,nr-gpios = <32>;
378   - reg = <0>;
379   - };
380   - };
381 352 };
382 353  
383 354 chip: chip-control@ea0000 {
... ... @@ -466,6 +437,21 @@
466 437 ranges = <0 0xfc0000 0x10000>;
467 438 interrupt-parent = <&sic>;
468 439  
  440 + sm_gpio1: gpio@5000 {
  441 + compatible = "snps,dw-apb-gpio";
  442 + reg = <0x5000 0x400>;
  443 + #address-cells = <1>;
  444 + #size-cells = <0>;
  445 +
  446 + portf: gpio-port@5 {
  447 + compatible = "snps,dw-apb-gpio-port";
  448 + gpio-controller;
  449 + #gpio-cells = <2>;
  450 + snps,nr-gpios = <32>;
  451 + reg = <0>;
  452 + };
  453 + };
  454 +
469 455 i2c2: i2c@7000 {
470 456 compatible = "snps,designware-i2c";
471 457 #address-cells = <1>;
... ... @@ -514,6 +500,21 @@
514 500 pinctrl-0 = <&uart1_pmux>;
515 501 pinctrl-names = "default";
516 502 status = "disabled";
  503 + };
  504 +
  505 + sm_gpio0: gpio@c000 {
  506 + compatible = "snps,dw-apb-gpio";
  507 + reg = <0xc000 0x400>;
  508 + #address-cells = <1>;
  509 + #size-cells = <0>;
  510 +
  511 + porte: gpio-port@4 {
  512 + compatible = "snps,dw-apb-gpio-port";
  513 + gpio-controller;
  514 + #gpio-cells = <2>;
  515 + snps,nr-gpios = <32>;
  516 + reg = <0>;
  517 + };
517 518 };
518 519  
519 520 sysctrl: pin-controller@d000 {