Eric Lee / smarc-ti-linux-kernel

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Commit 1dd34daa80966f013a7829643c7e70d49fa425a7

Authored by Linus Torvalds
2 parents d80b34c916 79305ec6e6
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "I'm briefly working between holidays and LCA, so this is close to a
  couple of weeks of fixes,

  Two sets of amdkfd fixes, this is a new feature this kernel, and this
  pull fixes a few issues since it got merged, ordering when built-in to
  kernel and also the iommu vs gpu ordering patch, it also reworks the
  ioctl before the initial release.

  Otherwise:
   - radeon: some misc fixes all over, hdmi, 4k, dpm
   - nouveau: mcp77 init fixes, oops fix, bug on fix, msi fix
   - i915: power fixes, revert VGACNTR patch

  Probably be quiteer next week since I'll be at LCA anyways"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (33 commits)
  drm/amdkfd: rewrite kfd_ioctl() according to drm_ioctl()
  drm/amdkfd: reformat IOCTL definitions to drm-style
  drm/amdkfd: Do copy_to/from_user in general kfd_ioctl()
  drm/radeon: integer underflow in radeon_cp_dispatch_texture()
  drm/radeon: adjust default bapm settings for KV
  drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw
  drm/radeon: fix sad_count check for dce3
  drm/radeon: KV has three PPLLs (v2)
  drm/amdkfd: unmap VMID<-->PASID when relesing VMID (non-HWS)
  drm/radeon: Init amdkfd only if it was compiled
  amdkfd: actually allocate longs for the pasid bitmask
  drm/nouveau/nouveau: Do not BUG_ON(!spin_is_locked()) on UP
  drm/nv4c/mc: disable msi
  drm/nouveau/fb/ram/mcp77: enable NISO poller
  drm/nouveau/fb/ram/mcp77: use carveout reg to determine size
  drm/nouveau/fb/ram/mcp77: subclass nouveau_ram
  drm/nouveau: wake up the card if necessary during gem callbacks
  drm/nouveau/device: Add support for GK208B, resolves bug 86935
  drm/nouveau: fix missing return statement in nouveau_ttm_tt_unpopulate
  drm/nouveau/bios: fix oops on pre-nv50 chipsets
  ...

Showing 30 changed files Side-by-side Diff

... ... @@ -50,7 +50,10 @@
50 50 obj-y += tty/
51 51 obj-y += char/
52 52  
53   -# gpu/ comes after char for AGP vs DRM startup
  53 +# iommu/ comes before gpu as gpu are using iommu controllers
  54 +obj-$(CONFIG_IOMMU_SUPPORT) += iommu/
  55 +
  56 +# gpu/ comes after char for AGP vs DRM startup and after iommu
54 57 obj-y += gpu/
55 58  
56 59 obj-$(CONFIG_CONNECTOR) += connector/
... ... @@ -141,7 +144,6 @@
141 144  
142 145 obj-$(CONFIG_MAILBOX) += mailbox/
143 146 obj-$(CONFIG_HWSPINLOCK) += hwspinlock/
144   -obj-$(CONFIG_IOMMU_SUPPORT) += iommu/
145 147 obj-$(CONFIG_REMOTEPROC) += remoteproc/
146 148 obj-$(CONFIG_RPMSG) += rpmsg/
147 149  
drivers/gpu/drm/Makefile
Diff comments   View file @ 1dd34da
... ... @@ -37,6 +37,7 @@
37 37 obj-$(CONFIG_DRM_TTM) += ttm/
38 38 obj-$(CONFIG_DRM_TDFX) += tdfx/
39 39 obj-$(CONFIG_DRM_R128) += r128/
  40 +obj-$(CONFIG_HSA_AMD) += amd/amdkfd/
40 41 obj-$(CONFIG_DRM_RADEON)+= radeon/
41 42 obj-$(CONFIG_DRM_MGA) += mga/
42 43 obj-$(CONFIG_DRM_I810) += i810/
... ... @@ -67,5 +68,4 @@
67 68 obj-y += i2c/
68 69 obj-y += panel/
69 70 obj-y += bridge/
70   -obj-$(CONFIG_HSA_AMD) += amd/amdkfd/
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
Diff comments   View file @ 1dd34da
... ... @@ -31,7 +31,6 @@
31 31 #include <uapi/linux/kfd_ioctl.h>
32 32 #include <linux/time.h>
33 33 #include <linux/mm.h>
34   -#include <linux/uaccess.h>
35 34 #include <uapi/asm-generic/mman-common.h>
36 35 #include <asm/processor.h>
37 36 #include "kfd_priv.h"
38 37  
39 38  
40 39  
... ... @@ -127,18 +126,15 @@
127 126 return 0;
128 127 }
129 128  
130   -static long kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
131   - void __user *arg)
  129 +static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
  130 + void *data)
132 131 {
133   - struct kfd_ioctl_get_version_args args;
  132 + struct kfd_ioctl_get_version_args *args = data;
134 133 int err = 0;
135 134  
136   - args.major_version = KFD_IOCTL_MAJOR_VERSION;
137   - args.minor_version = KFD_IOCTL_MINOR_VERSION;
  135 + args->major_version = KFD_IOCTL_MAJOR_VERSION;
  136 + args->minor_version = KFD_IOCTL_MINOR_VERSION;
138 137  
139   - if (copy_to_user(arg, &args, sizeof(args)))
140   - err = -EFAULT;
141   -
142 138 return err;
143 139 }
144 140  
145 141  
... ... @@ -221,10 +217,10 @@
221 217 return 0;
222 218 }
223 219  
224   -static long kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
225   - void __user *arg)
  220 +static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
  221 + void *data)
226 222 {
227   - struct kfd_ioctl_create_queue_args args;
  223 + struct kfd_ioctl_create_queue_args *args = data;
228 224 struct kfd_dev *dev;
229 225 int err = 0;
230 226 unsigned int queue_id;
231 227  
232 228  
... ... @@ -233,16 +229,13 @@
233 229  
234 230 memset(&q_properties, 0, sizeof(struct queue_properties));
235 231  
236   - if (copy_from_user(&args, arg, sizeof(args)))
237   - return -EFAULT;
238   -
239 232 pr_debug("kfd: creating queue ioctl\n");
240 233  
241   - err = set_queue_properties_from_user(&q_properties, &args);
  234 + err = set_queue_properties_from_user(&q_properties, args);
242 235 if (err)
243 236 return err;
244 237  
245   - dev = kfd_device_by_id(args.gpu_id);
  238 + dev = kfd_device_by_id(args->gpu_id);
246 239 if (dev == NULL)
247 240 return -EINVAL;
248 241  
... ... @@ -250,7 +243,7 @@
250 243  
251 244 pdd = kfd_bind_process_to_device(dev, p);
252 245 if (IS_ERR(pdd)) {
253   - err = PTR_ERR(pdd);
  246 + err = -ESRCH;
254 247 goto err_bind_process;
255 248 }
256 249  
257 250  
258 251  
259 252  
260 253  
261 254  
262 255  
263 256  
... ... @@ -263,33 +256,26 @@
263 256 if (err != 0)
264 257 goto err_create_queue;
265 258  
266   - args.queue_id = queue_id;
  259 + args->queue_id = queue_id;
267 260  
268 261 /* Return gpu_id as doorbell offset for mmap usage */
269   - args.doorbell_offset = args.gpu_id << PAGE_SHIFT;
  262 + args->doorbell_offset = args->gpu_id << PAGE_SHIFT;
270 263  
271   - if (copy_to_user(arg, &args, sizeof(args))) {
272   - err = -EFAULT;
273   - goto err_copy_args_out;
274   - }
275   -
276 264 mutex_unlock(&p->mutex);
277 265  
278   - pr_debug("kfd: queue id %d was created successfully\n", args.queue_id);
  266 + pr_debug("kfd: queue id %d was created successfully\n", args->queue_id);
279 267  
280 268 pr_debug("ring buffer address == 0x%016llX\n",
281   - args.ring_base_address);
  269 + args->ring_base_address);
282 270  
283 271 pr_debug("read ptr address == 0x%016llX\n",
284   - args.read_pointer_address);
  272 + args->read_pointer_address);
285 273  
286 274 pr_debug("write ptr address == 0x%016llX\n",
287   - args.write_pointer_address);
  275 + args->write_pointer_address);
288 276  
289 277 return 0;
290 278  
291   -err_copy_args_out:
292   - pqm_destroy_queue(&p->pqm, queue_id);
293 279 err_create_queue:
294 280 err_bind_process:
295 281 mutex_unlock(&p->mutex);
296 282  
297 283  
298 284  
299 285  
300 286  
301 287  
302 288  
303 289  
304 290  
305 291  
306 292  
307 293  
308 294  
309 295  
310 296  
311 297  
312 298  
313 299  
314 300  
... ... @@ -297,99 +283,90 @@
297 283 }
298 284  
299 285 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p,
300   - void __user *arg)
  286 + void *data)
301 287 {
302 288 int retval;
303   - struct kfd_ioctl_destroy_queue_args args;
  289 + struct kfd_ioctl_destroy_queue_args *args = data;
304 290  
305   - if (copy_from_user(&args, arg, sizeof(args)))
306   - return -EFAULT;
307   -
308 291 pr_debug("kfd: destroying queue id %d for PASID %d\n",
309   - args.queue_id,
  292 + args->queue_id,
310 293 p->pasid);
311 294  
312 295 mutex_lock(&p->mutex);
313 296  
314   - retval = pqm_destroy_queue(&p->pqm, args.queue_id);
  297 + retval = pqm_destroy_queue(&p->pqm, args->queue_id);
315 298  
316 299 mutex_unlock(&p->mutex);
317 300 return retval;
318 301 }
319 302  
320 303 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p,
321   - void __user *arg)
  304 + void *data)
322 305 {
323 306 int retval;
324   - struct kfd_ioctl_update_queue_args args;
  307 + struct kfd_ioctl_update_queue_args *args = data;
325 308 struct queue_properties properties;
326 309  
327   - if (copy_from_user(&args, arg, sizeof(args)))
328   - return -EFAULT;
329   -
330   - if (args.queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) {
  310 + if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) {
331 311 pr_err("kfd: queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
332 312 return -EINVAL;
333 313 }
334 314  
335   - if (args.queue_priority > KFD_MAX_QUEUE_PRIORITY) {
  315 + if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) {
336 316 pr_err("kfd: queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
337 317 return -EINVAL;
338 318 }
339 319  
340   - if ((args.ring_base_address) &&
  320 + if ((args->ring_base_address) &&
341 321 (!access_ok(VERIFY_WRITE,
342   - (const void __user *) args.ring_base_address,
  322 + (const void __user *) args->ring_base_address,
343 323 sizeof(uint64_t)))) {
344 324 pr_err("kfd: can't access ring base address\n");
345 325 return -EFAULT;
346 326 }
347 327  
348   - if (!is_power_of_2(args.ring_size) && (args.ring_size != 0)) {
  328 + if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {
349 329 pr_err("kfd: ring size must be a power of 2 or 0\n");
350 330 return -EINVAL;
351 331 }
352 332  
353   - properties.queue_address = args.ring_base_address;
354   - properties.queue_size = args.ring_size;
355   - properties.queue_percent = args.queue_percentage;
356   - properties.priority = args.queue_priority;
  333 + properties.queue_address = args->ring_base_address;
  334 + properties.queue_size = args->ring_size;
  335 + properties.queue_percent = args->queue_percentage;
  336 + properties.priority = args->queue_priority;
357 337  
358 338 pr_debug("kfd: updating queue id %d for PASID %d\n",
359   - args.queue_id, p->pasid);
  339 + args->queue_id, p->pasid);
360 340  
361 341 mutex_lock(&p->mutex);
362 342  
363   - retval = pqm_update_queue(&p->pqm, args.queue_id, &properties);
  343 + retval = pqm_update_queue(&p->pqm, args->queue_id, &properties);
364 344  
365 345 mutex_unlock(&p->mutex);
366 346  
367 347 return retval;
368 348 }
369 349  
370   -static long kfd_ioctl_set_memory_policy(struct file *filep,
371   - struct kfd_process *p, void __user *arg)
  350 +static int kfd_ioctl_set_memory_policy(struct file *filep,
  351 + struct kfd_process *p, void *data)
372 352 {
373   - struct kfd_ioctl_set_memory_policy_args args;
  353 + struct kfd_ioctl_set_memory_policy_args *args = data;
374 354 struct kfd_dev *dev;
375 355 int err = 0;
376 356 struct kfd_process_device *pdd;
377 357 enum cache_policy default_policy, alternate_policy;
378 358  
379   - if (copy_from_user(&args, arg, sizeof(args)))
380   - return -EFAULT;
381   -
382   - if (args.default_policy != KFD_IOC_CACHE_POLICY_COHERENT
383   - && args.default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
  359 + if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT
  360 + && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
384 361 return -EINVAL;
385 362 }
386 363  
387   - if (args.alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT
388   - && args.alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
  364 + if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT
  365 + && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
389 366 return -EINVAL;
390 367 }
391 368  
392   - dev = kfd_device_by_id(args.gpu_id);
  369 + dev = kfd_device_by_id(args->gpu_id);
393 370 if (dev == NULL)
394 371 return -EINVAL;
395 372  
396 373  
397 374  
398 375  
... ... @@ -397,23 +374,23 @@
397 374  
398 375 pdd = kfd_bind_process_to_device(dev, p);
399 376 if (IS_ERR(pdd)) {
400   - err = PTR_ERR(pdd);
  377 + err = -ESRCH;
401 378 goto out;
402 379 }
403 380  
404   - default_policy = (args.default_policy == KFD_IOC_CACHE_POLICY_COHERENT)
  381 + default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT)
405 382 ? cache_policy_coherent : cache_policy_noncoherent;
406 383  
407 384 alternate_policy =
408   - (args.alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
  385 + (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
409 386 ? cache_policy_coherent : cache_policy_noncoherent;
410 387  
411 388 if (!dev->dqm->set_cache_memory_policy(dev->dqm,
412 389 &pdd->qpd,
413 390 default_policy,
414 391 alternate_policy,
415   - (void __user *)args.alternate_aperture_base,
416   - args.alternate_aperture_size))
  392 + (void __user *)args->alternate_aperture_base,
  393 + args->alternate_aperture_size))
417 394 err = -EINVAL;
418 395  
419 396 out:
420 397  
421 398  
422 399  
423 400  
424 401  
425 402  
426 403  
427 404  
428 405  
429 406  
430 407  
... ... @@ -422,54 +399,45 @@
422 399 return err;
423 400 }
424 401  
425   -static long kfd_ioctl_get_clock_counters(struct file *filep,
426   - struct kfd_process *p, void __user *arg)
  402 +static int kfd_ioctl_get_clock_counters(struct file *filep,
  403 + struct kfd_process *p, void *data)
427 404 {
428   - struct kfd_ioctl_get_clock_counters_args args;
  405 + struct kfd_ioctl_get_clock_counters_args *args = data;
429 406 struct kfd_dev *dev;
430 407 struct timespec time;
431 408  
432   - if (copy_from_user(&args, arg, sizeof(args)))
433   - return -EFAULT;
434   -
435   - dev = kfd_device_by_id(args.gpu_id);
  409 + dev = kfd_device_by_id(args->gpu_id);
436 410 if (dev == NULL)
437 411 return -EINVAL;
438 412  
439 413 /* Reading GPU clock counter from KGD */
440   - args.gpu_clock_counter = kfd2kgd->get_gpu_clock_counter(dev->kgd);
  414 + args->gpu_clock_counter = kfd2kgd->get_gpu_clock_counter(dev->kgd);
441 415  
442 416 /* No access to rdtsc. Using raw monotonic time */
443 417 getrawmonotonic(&time);
444   - args.cpu_clock_counter = (uint64_t)timespec_to_ns(&time);
  418 + args->cpu_clock_counter = (uint64_t)timespec_to_ns(&time);
445 419  
446 420 get_monotonic_boottime(&time);
447   - args.system_clock_counter = (uint64_t)timespec_to_ns(&time);
  421 + args->system_clock_counter = (uint64_t)timespec_to_ns(&time);
448 422  
449 423 /* Since the counter is in nano-seconds we use 1GHz frequency */
450   - args.system_clock_freq = 1000000000;
  424 + args->system_clock_freq = 1000000000;
451 425  
452   - if (copy_to_user(arg, &args, sizeof(args)))
453   - return -EFAULT;
454   -
455 426 return 0;
456 427 }
457 428  
458 429  
459 430 static int kfd_ioctl_get_process_apertures(struct file *filp,
460   - struct kfd_process *p, void __user *arg)
  431 + struct kfd_process *p, void *data)
461 432 {
462   - struct kfd_ioctl_get_process_apertures_args args;
  433 + struct kfd_ioctl_get_process_apertures_args *args = data;
463 434 struct kfd_process_device_apertures *pAperture;
464 435 struct kfd_process_device *pdd;
465 436  
466 437 dev_dbg(kfd_device, "get apertures for PASID %d", p->pasid);
467 438  
468   - if (copy_from_user(&args, arg, sizeof(args)))
469   - return -EFAULT;
  439 + args->num_of_nodes = 0;
470 440  
471   - args.num_of_nodes = 0;
472   -
473 441 mutex_lock(&p->mutex);
474 442  
475 443 /*if the process-device list isn't empty*/
... ... @@ -477,7 +445,8 @@
477 445 /* Run over all pdd of the process */
478 446 pdd = kfd_get_first_process_device_data(p);
479 447 do {
480   - pAperture = &args.process_apertures[args.num_of_nodes];
  448 + pAperture =
  449 + &args->process_apertures[args->num_of_nodes];
481 450 pAperture->gpu_id = pdd->dev->id;
482 451 pAperture->lds_base = pdd->lds_base;
483 452 pAperture->lds_limit = pdd->lds_limit;
... ... @@ -487,7 +456,7 @@
487 456 pAperture->scratch_limit = pdd->scratch_limit;
488 457  
489 458 dev_dbg(kfd_device,
490   - "node id %u\n", args.num_of_nodes);
  459 + "node id %u\n", args->num_of_nodes);
491 460 dev_dbg(kfd_device,
492 461 "gpu id %u\n", pdd->dev->id);
493 462 dev_dbg(kfd_device,
494 463  
495 464  
496 465  
497 466  
498 467  
499 468  
500 469  
501 470  
502 471  
503 472  
504 473  
505 474  
506 475  
507 476  
508 477  
... ... @@ -503,80 +472,131 @@
503 472 dev_dbg(kfd_device,
504 473 "scratch_limit %llX\n", pdd->scratch_limit);
505 474  
506   - args.num_of_nodes++;
  475 + args->num_of_nodes++;
507 476 } while ((pdd = kfd_get_next_process_device_data(p, pdd)) != NULL &&
508   - (args.num_of_nodes < NUM_OF_SUPPORTED_GPUS));
  477 + (args->num_of_nodes < NUM_OF_SUPPORTED_GPUS));
509 478 }
510 479  
511 480 mutex_unlock(&p->mutex);
512 481  
513   - if (copy_to_user(arg, &args, sizeof(args)))
514   - return -EFAULT;
515   -
516 482 return 0;
517 483 }
518 484  
  485 +#define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \
  486 + [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, .cmd_drv = 0, .name = #ioctl}
  487 +
  488 +/** Ioctl table */
  489 +static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = {
  490 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION,
  491 + kfd_ioctl_get_version, 0),
  492 +
  493 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE,
  494 + kfd_ioctl_create_queue, 0),
  495 +
  496 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE,
  497 + kfd_ioctl_destroy_queue, 0),
  498 +
  499 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY,
  500 + kfd_ioctl_set_memory_policy, 0),
  501 +
  502 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS,
  503 + kfd_ioctl_get_clock_counters, 0),
  504 +
  505 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES,
  506 + kfd_ioctl_get_process_apertures, 0),
  507 +
  508 + AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE,
  509 + kfd_ioctl_update_queue, 0),
  510 +};
  511 +
  512 +#define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls)
  513 +
519 514 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
520 515 {
521 516 struct kfd_process *process;
522   - long err = -EINVAL;
  517 + amdkfd_ioctl_t *func;
  518 + const struct amdkfd_ioctl_desc *ioctl = NULL;
  519 + unsigned int nr = _IOC_NR(cmd);
  520 + char stack_kdata[128];
  521 + char *kdata = NULL;
  522 + unsigned int usize, asize;
  523 + int retcode = -EINVAL;
523 524  
524   - dev_dbg(kfd_device,
525   - "ioctl cmd 0x%x (#%d), arg 0x%lx\n",
526   - cmd, _IOC_NR(cmd), arg);
  525 + if (nr >= AMDKFD_CORE_IOCTL_COUNT)
  526 + goto err_i1;
527 527  
528   - process = kfd_get_process(current);
529   - if (IS_ERR(process))
530   - return PTR_ERR(process);
  528 + if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) {
  529 + u32 amdkfd_size;
531 530  
532   - switch (cmd) {
533   - case KFD_IOC_GET_VERSION:
534   - err = kfd_ioctl_get_version(filep, process, (void __user *)arg);
535   - break;
536   - case KFD_IOC_CREATE_QUEUE:
537   - err = kfd_ioctl_create_queue(filep, process,
538   - (void __user *)arg);
539   - break;
  531 + ioctl = &amdkfd_ioctls[nr];
540 532  
541   - case KFD_IOC_DESTROY_QUEUE:
542   - err = kfd_ioctl_destroy_queue(filep, process,
543   - (void __user *)arg);
544   - break;
  533 + amdkfd_size = _IOC_SIZE(ioctl->cmd);
  534 + usize = asize = _IOC_SIZE(cmd);
  535 + if (amdkfd_size > asize)
  536 + asize = amdkfd_size;
545 537  
546   - case KFD_IOC_SET_MEMORY_POLICY:
547   - err = kfd_ioctl_set_memory_policy(filep, process,
548   - (void __user *)arg);
549   - break;
  538 + cmd = ioctl->cmd;
  539 + } else
  540 + goto err_i1;
550 541  
551   - case KFD_IOC_GET_CLOCK_COUNTERS:
552   - err = kfd_ioctl_get_clock_counters(filep, process,
553   - (void __user *)arg);
554   - break;
  542 + dev_dbg(kfd_device, "ioctl cmd 0x%x (#%d), arg 0x%lx\n", cmd, nr, arg);
555 543  
556   - case KFD_IOC_GET_PROCESS_APERTURES:
557   - err = kfd_ioctl_get_process_apertures(filep, process,
558   - (void __user *)arg);
559   - break;
  544 + process = kfd_get_process(current);
  545 + if (IS_ERR(process)) {
  546 + dev_dbg(kfd_device, "no process\n");
  547 + goto err_i1;
  548 + }
560 549  
561   - case KFD_IOC_UPDATE_QUEUE:
562   - err = kfd_ioctl_update_queue(filep, process,
563   - (void __user *)arg);
564   - break;
  550 + /* Do not trust userspace, use our own definition */
  551 + func = ioctl->func;
565 552  
566   - default:
567   - dev_err(kfd_device,
568   - "unknown ioctl cmd 0x%x, arg 0x%lx)\n",
569   - cmd, arg);
570   - err = -EINVAL;
571   - break;
  553 + if (unlikely(!func)) {
  554 + dev_dbg(kfd_device, "no function\n");
  555 + retcode = -EINVAL;
  556 + goto err_i1;
572 557 }
573 558  
574   - if (err < 0)
575   - dev_err(kfd_device,
576   - "ioctl error %ld for ioctl cmd 0x%x (#%d)\n",
577   - err, cmd, _IOC_NR(cmd));
  559 + if (cmd & (IOC_IN | IOC_OUT)) {
  560 + if (asize <= sizeof(stack_kdata)) {
  561 + kdata = stack_kdata;
  562 + } else {
  563 + kdata = kmalloc(asize, GFP_KERNEL);
  564 + if (!kdata) {
  565 + retcode = -ENOMEM;
  566 + goto err_i1;
  567 + }
  568 + }
  569 + if (asize > usize)
  570 + memset(kdata + usize, 0, asize - usize);
  571 + }
578 572  
579   - return err;
  573 + if (cmd & IOC_IN) {
  574 + if (copy_from_user(kdata, (void __user *)arg, usize) != 0) {
  575 + retcode = -EFAULT;
  576 + goto err_i1;
  577 + }
  578 + } else if (cmd & IOC_OUT) {
  579 + memset(kdata, 0, usize);
  580 + }
  581 +
  582 + retcode = func(filep, process, kdata);
  583 +
  584 + if (cmd & IOC_OUT)
  585 + if (copy_to_user((void __user *)arg, kdata, usize) != 0)
  586 + retcode = -EFAULT;
  587 +
  588 +err_i1:
  589 + if (!ioctl)
  590 + dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n",
  591 + task_pid_nr(current), cmd, nr);
  592 +
  593 + if (kdata != stack_kdata)
  594 + kfree(kdata);
  595 +
  596 + if (retcode)
  597 + dev_dbg(kfd_device, "ret = %d\n", retcode);
  598 +
  599 + return retcode;
580 600 }
581 601  
582 602 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma)
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
Diff comments   View file @ 1dd34da
... ... @@ -161,6 +161,9 @@
161 161 {
162 162 int bit = qpd->vmid - KFD_VMID_START_OFFSET;
163 163  
  164 + /* Release the vmid mapping */
  165 + set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
  166 +
164 167 set_bit(bit, (unsigned long *)&dqm->vmid_bitmap);
165 168 qpd->vmid = 0;
166 169 q->properties.vmid = 0;
... ... @@ -272,6 +275,18 @@
272 275 return retval;
273 276 }
274 277  
  278 + pr_debug("kfd: loading mqd to hqd on pipe (%d) queue (%d)\n",
  279 + q->pipe,
  280 + q->queue);
  281 +
  282 + retval = mqd->load_mqd(mqd, q->mqd, q->pipe,
  283 + q->queue, q->properties.write_ptr);
  284 + if (retval != 0) {
  285 + deallocate_hqd(dqm, q);
  286 + mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
  287 + return retval;
  288 + }
  289 +
275 290 return 0;
276 291 }
277 292  
... ... @@ -320,6 +335,7 @@
320 335 {
321 336 int retval;
322 337 struct mqd_manager *mqd;
  338 + bool prev_active = false;
323 339  
324 340 BUG_ON(!dqm || !q || !q->mqd);
325 341  
326 342  
327 343  
... ... @@ -330,10 +346,18 @@
330 346 return -ENOMEM;
331 347 }
332 348  
333   - retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
334 349 if (q->properties.is_active == true)
  350 + prev_active = true;
  351 +
  352 + /*
  353 + *
  354 + * check active state vs. the previous state
  355 + * and modify counter accordingly
  356 + */
  357 + retval = mqd->update_mqd(mqd, q->mqd, &q->properties);
  358 + if ((q->properties.is_active == true) && (prev_active == false))
335 359 dqm->queue_count++;
336   - else
  360 + else if ((q->properties.is_active == false) && (prev_active == true))
337 361 dqm->queue_count--;
338 362  
339 363 if (sched_policy != KFD_SCHED_POLICY_NO_HWS)
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c
Diff comments   View file @ 1dd34da
... ... @@ -184,7 +184,7 @@
184 184 uint32_t queue_id)
185 185 {
186 186  
187   - return kfd2kgd->hqd_is_occupies(mm->dev->kgd, queue_address,
  187 + return kfd2kgd->hqd_is_occupied(mm->dev->kgd, queue_address,
188 188 pipe_id, queue_id);
189 189  
190 190 }
drivers/gpu/drm/amd/amdkfd/kfd_pasid.c
Diff comments   View file @ 1dd34da
... ... @@ -32,7 +32,7 @@
32 32 {
33 33 pasid_limit = max_num_of_processes;
34 34  
35   - pasid_bitmap = kzalloc(BITS_TO_LONGS(pasid_limit), GFP_KERNEL);
  35 + pasid_bitmap = kcalloc(BITS_TO_LONGS(pasid_limit), sizeof(long), GFP_KERNEL);
36 36 if (!pasid_bitmap)
37 37 return -ENOMEM;
38 38  
drivers/gpu/drm/amd/amdkfd/kfd_priv.h
Diff comments   View file @ 1dd34da
... ... @@ -463,6 +463,24 @@
463 463 bool is_32bit_user_mode;
464 464 };
465 465  
  466 +/**
  467 + * Ioctl function type.
  468 + *
  469 + * \param filep pointer to file structure.
  470 + * \param p amdkfd process pointer.
  471 + * \param data pointer to arg that was copied from user.
  472 + */
  473 +typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p,
  474 + void *data);
  475 +
  476 +struct amdkfd_ioctl_desc {
  477 + unsigned int cmd;
  478 + int flags;
  479 + amdkfd_ioctl_t *func;
  480 + unsigned int cmd_drv;
  481 + const char *name;
  482 +};
  483 +
466 484 void kfd_process_create_wq(void);
467 485 void kfd_process_destroy_wq(void);
468 486 struct kfd_process *kfd_create_process(const struct task_struct *);
drivers/gpu/drm/amd/amdkfd/kfd_topology.c
Diff comments   View file @ 1dd34da
... ... @@ -921,7 +921,7 @@
921 921 uint32_t i = 0;
922 922  
923 923 list_for_each_entry(dev, &topology_device_list, list) {
924   - ret = kfd_build_sysfs_node_entry(dev, 0);
  924 + ret = kfd_build_sysfs_node_entry(dev, i);
925 925 if (ret < 0)
926 926 return ret;
927 927 i++;
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
Diff comments   View file @ 1dd34da
... ... @@ -183,7 +183,7 @@
183 183 int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
184 184 uint32_t queue_id, uint32_t __user *wptr);
185 185  
186   - bool (*hqd_is_occupies)(struct kgd_dev *kgd, uint64_t queue_address,
  186 + bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address,
187 187 uint32_t pipe_id, uint32_t queue_id);
188 188  
189 189 int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
drivers/gpu/drm/i915/i915_drv.h
Diff comments   View file @ 1dd34da
... ... @@ -1756,8 +1756,6 @@
1756 1756 */
1757 1757 struct workqueue_struct *dp_wq;
1758 1758  
1759   - uint32_t bios_vgacntr;
1760   -
1761 1759 /* Abstract the submission mechanism (legacy ringbuffer or execlists) away */
1762 1760 struct {
1763 1761 int (*do_execbuf)(struct drm_device *dev, struct drm_file *file,
drivers/gpu/drm/i915/i915_gem.c
Diff comments   View file @ 1dd34da
... ... @@ -1048,6 +1048,7 @@
1048 1048 i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
1049 1049 struct drm_file *file)
1050 1050 {
  1051 + struct drm_i915_private *dev_priv = dev->dev_private;
1051 1052 struct drm_i915_gem_pwrite *args = data;
1052 1053 struct drm_i915_gem_object *obj;
1053 1054 int ret;
1054 1055  
... ... @@ -1067,9 +1068,11 @@
1067 1068 return -EFAULT;
1068 1069 }
1069 1070  
  1071 + intel_runtime_pm_get(dev_priv);
  1072 +
1070 1073 ret = i915_mutex_lock_interruptible(dev);
1071 1074 if (ret)
1072   - return ret;
  1075 + goto put_rpm;
1073 1076  
1074 1077 obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));
1075 1078 if (&obj->base == NULL) {
... ... @@ -1121,6 +1124,9 @@
1121 1124 drm_gem_object_unreference(&obj->base);
1122 1125 unlock:
1123 1126 mutex_unlock(&dev->struct_mutex);
  1127 +put_rpm:
  1128 + intel_runtime_pm_put(dev_priv);
  1129 +
1124 1130 return ret;
1125 1131 }
1126 1132  
drivers/gpu/drm/i915/i915_irq.c
Diff comments   View file @ 1dd34da
... ... @@ -3725,8 +3725,6 @@
3725 3725 if ((iir & flip_pending) == 0)
3726 3726 goto check_page_flip;
3727 3727  
3728   - intel_prepare_page_flip(dev, plane);
3729   -
3730 3728 /* We detect FlipDone by looking for the change in PendingFlip from '1'
3731 3729 * to '0' on the following vblank, i.e. IIR has the Pendingflip
3732 3730 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
... ... @@ -3736,6 +3734,7 @@
3736 3734 if (I915_READ16(ISR) & flip_pending)
3737 3735 goto check_page_flip;
3738 3736  
  3737 + intel_prepare_page_flip(dev, plane);
3739 3738 intel_finish_page_flip(dev, pipe);
3740 3739 return true;
3741 3740  
... ... @@ -3907,8 +3906,6 @@
3907 3906 if ((iir & flip_pending) == 0)
3908 3907 goto check_page_flip;
3909 3908  
3910   - intel_prepare_page_flip(dev, plane);
3911   -
3912 3909 /* We detect FlipDone by looking for the change in PendingFlip from '1'
3913 3910 * to '0' on the following vblank, i.e. IIR has the Pendingflip
3914 3911 * asserted following the MI_DISPLAY_FLIP, but ISR is deasserted, hence
... ... @@ -3918,6 +3915,7 @@
3918 3915 if (I915_READ(ISR) & flip_pending)
3919 3916 goto check_page_flip;
3920 3917  
  3918 + intel_prepare_page_flip(dev, plane);
3921 3919 intel_finish_page_flip(dev, pipe);
3922 3920 return true;
3923 3921  
drivers/gpu/drm/i915/intel_display.c
Diff comments   View file @ 1dd34da
... ... @@ -13057,11 +13057,7 @@
13057 13057 vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
13058 13058 udelay(300);
13059 13059  
13060   - /*
13061   - * Fujitsu-Siemens Lifebook S6010 (830) has problems resuming
13062   - * from S3 without preserving (some of?) the other bits.
13063   - */
13064   - I915_WRITE(vga_reg, dev_priv->bios_vgacntr | VGA_DISP_DISABLE);
  13060 + I915_WRITE(vga_reg, VGA_DISP_DISABLE);
13065 13061 POSTING_READ(vga_reg);
13066 13062 }
13067 13063  
... ... @@ -13146,8 +13142,6 @@
13146 13142  
13147 13143 intel_shared_dpll_init(dev);
13148 13144  
13149   - /* save the BIOS value before clobbering it */
13150   - dev_priv->bios_vgacntr = I915_READ(i915_vgacntrl_reg(dev));
13151 13145 /* Just disable it once at startup */
13152 13146 i915_disable_vga(dev);
13153 13147 intel_setup_outputs(dev);
drivers/gpu/drm/i915/intel_runtime_pm.c
Diff comments   View file @ 1dd34da
... ... @@ -615,29 +615,6 @@
615 615 vlv_power_sequencer_reset(dev_priv);
616 616 }
617 617  
618   -static void check_power_well_state(struct drm_i915_private *dev_priv,
619   - struct i915_power_well *power_well)
620   -{
621   - bool enabled = power_well->ops->is_enabled(dev_priv, power_well);
622   -
623   - if (power_well->always_on || !i915.disable_power_well) {
624   - if (!enabled)
625   - goto mismatch;
626   -
627   - return;
628   - }
629   -
630   - if (enabled != (power_well->count > 0))
631   - goto mismatch;
632   -
633   - return;
634   -
635   -mismatch:
636   - WARN(1, "state mismatch for '%s' (always_on %d hw state %d use-count %d disable_power_well %d\n",
637   - power_well->name, power_well->always_on, enabled,
638   - power_well->count, i915.disable_power_well);
639   -}
640   -
641 618 /**
642 619 * intel_display_power_get - grab a power domain reference
643 620 * @dev_priv: i915 device instance
... ... @@ -669,8 +646,6 @@
669 646 power_well->ops->enable(dev_priv, power_well);
670 647 power_well->hw_enabled = true;
671 648 }
672   -
673   - check_power_well_state(dev_priv, power_well);
674 649 }
675 650  
676 651 power_domains->domain_use_count[domain]++;
... ... @@ -709,8 +684,6 @@
709 684 power_well->hw_enabled = false;
710 685 power_well->ops->disable(dev_priv, power_well);
711 686 }
712   -
713   - check_power_well_state(dev_priv, power_well);
714 687 }
715 688  
716 689 mutex_unlock(&power_domains->lock);
drivers/gpu/drm/nouveau/core/core/event.c
Diff comments   View file @ 1dd34da
... ... @@ -26,7 +26,7 @@
26 26 void
27 27 nvkm_event_put(struct nvkm_event *event, u32 types, int index)
28 28 {
29   - BUG_ON(!spin_is_locked(&event->refs_lock));
  29 + assert_spin_locked(&event->refs_lock);
30 30 while (types) {
31 31 int type = __ffs(types); types &= ~(1 << type);
32 32 if (--event->refs[index * event->types_nr + type] == 0) {
... ... @@ -39,7 +39,7 @@
39 39 void
40 40 nvkm_event_get(struct nvkm_event *event, u32 types, int index)
41 41 {
42   - BUG_ON(!spin_is_locked(&event->refs_lock));
  42 + assert_spin_locked(&event->refs_lock);
43 43 while (types) {
44 44 int type = __ffs(types); types &= ~(1 << type);
45 45 if (++event->refs[index * event->types_nr + type] == 1) {
drivers/gpu/drm/nouveau/core/core/notify.c
Diff comments   View file @ 1dd34da
... ... @@ -98,7 +98,7 @@
98 98 struct nvkm_event *event = notify->event;
99 99 unsigned long flags;
100 100  
101   - BUG_ON(!spin_is_locked(&event->list_lock));
  101 + assert_spin_locked(&event->list_lock);
102 102 BUG_ON(size != notify->size);
103 103  
104 104 spin_lock_irqsave(&event->refs_lock, flags);
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
Diff comments   View file @ 1dd34da
... ... @@ -249,6 +249,39 @@
249 249 device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
250 250 device->oclass[NVDEV_ENGINE_PERFMON] = &nvf0_perfmon_oclass;
251 251 break;
  252 + case 0x106:
  253 + device->cname = "GK208B";
  254 + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
  255 + device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
  256 + device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
  257 + device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
  258 + device->oclass[NVDEV_SUBDEV_CLOCK ] = &nve0_clock_oclass;
  259 + device->oclass[NVDEV_SUBDEV_THERM ] = &nvd0_therm_oclass;
  260 + device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
  261 + device->oclass[NVDEV_SUBDEV_DEVINIT] = nvc0_devinit_oclass;
  262 + device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
  263 + device->oclass[NVDEV_SUBDEV_BUS ] = nvc0_bus_oclass;
  264 + device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
  265 + device->oclass[NVDEV_SUBDEV_FB ] = nve0_fb_oclass;
  266 + device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass;
  267 + device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
  268 + device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
  269 + device->oclass[NVDEV_SUBDEV_VM ] = &nvc0_vmmgr_oclass;
  270 + device->oclass[NVDEV_SUBDEV_BAR ] = &nvc0_bar_oclass;
  271 + device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
  272 + device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
  273 + device->oclass[NVDEV_ENGINE_DMAOBJ ] = nvd0_dmaeng_oclass;
  274 + device->oclass[NVDEV_ENGINE_FIFO ] = nv108_fifo_oclass;
  275 + device->oclass[NVDEV_ENGINE_SW ] = nvc0_software_oclass;
  276 + device->oclass[NVDEV_ENGINE_GR ] = nv108_graph_oclass;
  277 + device->oclass[NVDEV_ENGINE_DISP ] = nvf0_disp_oclass;
  278 + device->oclass[NVDEV_ENGINE_COPY0 ] = &nve0_copy0_oclass;
  279 + device->oclass[NVDEV_ENGINE_COPY1 ] = &nve0_copy1_oclass;
  280 + device->oclass[NVDEV_ENGINE_COPY2 ] = &nve0_copy2_oclass;
  281 + device->oclass[NVDEV_ENGINE_BSP ] = &nve0_bsp_oclass;
  282 + device->oclass[NVDEV_ENGINE_VP ] = &nve0_vp_oclass;
  283 + device->oclass[NVDEV_ENGINE_PPP ] = &nvc0_ppp_oclass;
  284 + break;
252 285 case 0x108:
253 286 device->cname = "GK208";
254 287 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
drivers/gpu/drm/nouveau/core/subdev/bios/shadowramin.c
Diff comments   View file @ 1dd34da
... ... @@ -44,8 +44,10 @@
44 44 pramin_fini(void *data)
45 45 {
46 46 struct priv *priv = data;
47   - nv_wr32(priv->bios, 0x001700, priv->bar0);
48   - kfree(priv);
  47 + if (priv) {
  48 + nv_wr32(priv->bios, 0x001700, priv->bar0);
  49 + kfree(priv);
  50 + }
49 51 }
50 52  
51 53 static void *
drivers/gpu/drm/nouveau/core/subdev/fb/ramnvaa.c
Diff comments   View file @ 1dd34da
... ... @@ -24,43 +24,80 @@
24 24  
25 25 #include "nv50.h"
26 26  
  27 +struct nvaa_ram_priv {
  28 + struct nouveau_ram base;
  29 + u64 poller_base;
  30 +};
  31 +
27 32 static int
28 33 nvaa_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
29 34 struct nouveau_oclass *oclass, void *data, u32 datasize,
30 35 struct nouveau_object **pobject)
31 36 {
32   - const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
33   - const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
  37 + u32 rsvd_head = ( 256 * 1024); /* vga memory */
  38 + u32 rsvd_tail = (1024 * 1024); /* vbios etc */
34 39 struct nouveau_fb *pfb = nouveau_fb(parent);
35   - struct nouveau_ram *ram;
  40 + struct nvaa_ram_priv *priv;
36 41 int ret;
37 42  
38   - ret = nouveau_ram_create(parent, engine, oclass, &ram);
39   - *pobject = nv_object(ram);
  43 + ret = nouveau_ram_create(parent, engine, oclass, &priv);
  44 + *pobject = nv_object(priv);
40 45 if (ret)
41 46 return ret;
42 47  
43   - ram->size = nv_rd32(pfb, 0x10020c);
44   - ram->size = (ram->size & 0xffffff00) | ((ram->size & 0x000000ff) << 32);
  48 + priv->base.type = NV_MEM_TYPE_STOLEN;
  49 + priv->base.stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
  50 + priv->base.size = (u64)nv_rd32(pfb, 0x100e14) << 12;
45 51  
46   - ret = nouveau_mm_init(&pfb->vram, rsvd_head, (ram->size >> 12) -
47   - (rsvd_head + rsvd_tail), 1);
  52 + rsvd_tail += 0x1000;
  53 + priv->poller_base = priv->base.size - rsvd_tail;
  54 +
  55 + ret = nouveau_mm_init(&pfb->vram, rsvd_head >> 12,
  56 + (priv->base.size - (rsvd_head + rsvd_tail)) >> 12,
  57 + 1);
48 58 if (ret)
49 59 return ret;
50 60  
51   - ram->type = NV_MEM_TYPE_STOLEN;
52   - ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
53   - ram->get = nv50_ram_get;
54   - ram->put = nv50_ram_put;
  61 + priv->base.get = nv50_ram_get;
  62 + priv->base.put = nv50_ram_put;
55 63 return 0;
56 64 }
57 65  
  66 +static int
  67 +nvaa_ram_init(struct nouveau_object *object)
  68 +{
  69 + struct nouveau_fb *pfb = nouveau_fb(object);
  70 + struct nvaa_ram_priv *priv = (void *)object;
  71 + int ret;
  72 + u64 dniso, hostnb, flush;
  73 +
  74 + ret = nouveau_ram_init(&priv->base);
  75 + if (ret)
  76 + return ret;
  77 +
  78 + dniso = ((priv->base.size - (priv->poller_base + 0x00)) >> 5) - 1;
  79 + hostnb = ((priv->base.size - (priv->poller_base + 0x20)) >> 5) - 1;
  80 + flush = ((priv->base.size - (priv->poller_base + 0x40)) >> 5) - 1;
  81 +
  82 + /* Enable NISO poller for various clients and set their associated
  83 + * read address, only for MCP77/78 and MCP79/7A. (fd#25701)
  84 + */
  85 + nv_wr32(pfb, 0x100c18, dniso);
  86 + nv_mask(pfb, 0x100c14, 0x00000000, 0x00000001);
  87 + nv_wr32(pfb, 0x100c1c, hostnb);
  88 + nv_mask(pfb, 0x100c14, 0x00000000, 0x00000002);
  89 + nv_wr32(pfb, 0x100c24, flush);
  90 + nv_mask(pfb, 0x100c14, 0x00000000, 0x00010000);
  91 +
  92 + return 0;
  93 +}
  94 +
58 95 struct nouveau_oclass
59 96 nvaa_ram_oclass = {
60 97 .ofuncs = &(struct nouveau_ofuncs) {
61 98 .ctor = nvaa_ram_ctor,
62 99 .dtor = _nouveau_ram_dtor,
63   - .init = _nouveau_ram_init,
  100 + .init = nvaa_ram_init,
64 101 .fini = _nouveau_ram_fini,
65 102 },
66 103 };
drivers/gpu/drm/nouveau/core/subdev/mc/nv4c.c
Diff comments   View file @ 1dd34da
... ... @@ -24,13 +24,6 @@
24 24  
25 25 #include "nv04.h"
26 26  
27   -static void
28   -nv4c_mc_msi_rearm(struct nouveau_mc *pmc)
29   -{
30   - struct nv04_mc_priv *priv = (void *)pmc;
31   - nv_wr08(priv, 0x088050, 0xff);
32   -}
33   -
34 27 struct nouveau_oclass *
35 28 nv4c_mc_oclass = &(struct nouveau_mc_oclass) {
36 29 .base.handle = NV_SUBDEV(MC, 0x4c),
... ... @@ -41,6 +34,5 @@
41 34 .fini = _nouveau_mc_fini,
42 35 },
43 36 .intr = nv04_mc_intr,
44   - .msi_rearm = nv4c_mc_msi_rearm,
45 37 }.base;
drivers/gpu/drm/nouveau/nouveau_bo.c
Diff comments   View file @ 1dd34da
... ... @@ -1572,8 +1572,10 @@
1572 1572 * so use the DMA API for them.
1573 1573 */
1574 1574 if (!nv_device_is_cpu_coherent(device) &&
1575   - ttm->caching_state == tt_uncached)
  1575 + ttm->caching_state == tt_uncached) {
1576 1576 ttm_dma_unpopulate(ttm_dma, dev->dev);
  1577 + return;
  1578 + }
1577 1579  
1578 1580 #if __OS_HAS_AGP
1579 1581 if (drm->agp.stat == ENABLED) {
drivers/gpu/drm/nouveau/nouveau_gem.c
Diff comments   View file @ 1dd34da
... ... @@ -36,8 +36,15 @@
36 36 nouveau_gem_object_del(struct drm_gem_object *gem)
37 37 {
38 38 struct nouveau_bo *nvbo = nouveau_gem_object(gem);
  39 + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
39 40 struct ttm_buffer_object *bo = &nvbo->bo;
  41 + struct device *dev = drm->dev->dev;
  42 + int ret;
40 43  
  44 + ret = pm_runtime_get_sync(dev);
  45 + if (WARN_ON(ret < 0 && ret != -EACCES))
  46 + return;
  47 +
41 48 if (gem->import_attach)
42 49 drm_prime_gem_destroy(gem, nvbo->bo.sg);
43 50  
... ... @@ -46,6 +53,9 @@
46 53 /* reset filp so nouveau_bo_del_ttm() can test for it */
47 54 gem->filp = NULL;
48 55 ttm_bo_unref(&bo);
  56 +
  57 + pm_runtime_mark_last_busy(dev);
  58 + pm_runtime_put_autosuspend(dev);
49 59 }
50 60  
51 61 int
52 62  
... ... @@ -53,7 +63,9 @@
53 63 {
54 64 struct nouveau_cli *cli = nouveau_cli(file_priv);
55 65 struct nouveau_bo *nvbo = nouveau_gem_object(gem);
  66 + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
56 67 struct nouveau_vma *vma;
  68 + struct device *dev = drm->dev->dev;
57 69 int ret;
58 70  
59 71 if (!cli->vm)
60 72  
61 73  
... ... @@ -71,11 +83,16 @@
71 83 goto out;
72 84 }
73 85  
  86 + ret = pm_runtime_get_sync(dev);
  87 + if (ret < 0 && ret != -EACCES)
  88 + goto out;
  89 +
74 90 ret = nouveau_bo_vma_add(nvbo, cli->vm, vma);
75   - if (ret) {
  91 + if (ret)
76 92 kfree(vma);
77   - goto out;
78   - }
  93 +
  94 + pm_runtime_mark_last_busy(dev);
  95 + pm_runtime_put_autosuspend(dev);
79 96 } else {
80 97 vma->refcount++;
81 98 }
... ... @@ -129,6 +146,8 @@
129 146 {
130 147 struct nouveau_cli *cli = nouveau_cli(file_priv);
131 148 struct nouveau_bo *nvbo = nouveau_gem_object(gem);
  149 + struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
  150 + struct device *dev = drm->dev->dev;
132 151 struct nouveau_vma *vma;
133 152 int ret;
134 153  
... ... @@ -141,8 +160,14 @@
141 160  
142 161 vma = nouveau_bo_vma_find(nvbo, cli->vm);
143 162 if (vma) {
144   - if (--vma->refcount == 0)
145   - nouveau_gem_object_unmap(nvbo, vma);
  163 + if (--vma->refcount == 0) {
  164 + ret = pm_runtime_get_sync(dev);
  165 + if (!WARN_ON(ret < 0 && ret != -EACCES)) {
  166 + nouveau_gem_object_unmap(nvbo, vma);
  167 + pm_runtime_mark_last_busy(dev);
  168 + pm_runtime_put_autosuspend(dev);
  169 + }
  170 + }
146 171 }
147 172 ttm_bo_unreserve(&nvbo->bo);
148 173 }
drivers/gpu/drm/radeon/atombios_crtc.c
Diff comments   View file @ 1dd34da
... ... @@ -1851,10 +1851,9 @@
1851 1851 return pll;
1852 1852 }
1853 1853 /* otherwise, pick one of the plls */
1854   - if ((rdev->family == CHIP_KAVERI) ||
1855   - (rdev->family == CHIP_KABINI) ||
  1854 + if ((rdev->family == CHIP_KABINI) ||
1856 1855 (rdev->family == CHIP_MULLINS)) {
1857   - /* KB/KV/ML has PPLL1 and PPLL2 */
  1856 + /* KB/ML has PPLL1 and PPLL2 */
1858 1857 pll_in_use = radeon_get_pll_use_mask(crtc);
1859 1858 if (!(pll_in_use & (1 << ATOM_PPLL2)))
1860 1859 return ATOM_PPLL2;
... ... @@ -1863,7 +1862,7 @@
1863 1862 DRM_ERROR("unable to allocate a PPLL\n");
1864 1863 return ATOM_PPLL_INVALID;
1865 1864 } else {
1866   - /* CI has PPLL0, PPLL1, and PPLL2 */
  1865 + /* CI/KV has PPLL0, PPLL1, and PPLL2 */
1867 1866 pll_in_use = radeon_get_pll_use_mask(crtc);
1868 1867 if (!(pll_in_use & (1 << ATOM_PPLL2)))
1869 1868 return ATOM_PPLL2;
... ... @@ -2155,6 +2154,7 @@
2155 2154 case ATOM_PPLL0:
2156 2155 /* disable the ppll */
2157 2156 if ((rdev->family == CHIP_ARUBA) ||
  2157 + (rdev->family == CHIP_KAVERI) ||
2158 2158 (rdev->family == CHIP_BONAIRE) ||
2159 2159 (rdev->family == CHIP_HAWAII))
2160 2160 atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
drivers/gpu/drm/radeon/atombios_dp.c
Diff comments   View file @ 1dd34da
... ... @@ -492,6 +492,10 @@
492 492 struct radeon_connector_atom_dig *dig_connector;
493 493 int dp_clock;
494 494  
  495 + if ((mode->clock > 340000) &&
  496 + (!radeon_connector_is_dp12_capable(connector)))
  497 + return MODE_CLOCK_HIGH;
  498 +
495 499 if (!radeon_connector->con_priv)
496 500 return MODE_CLOCK_HIGH;
497 501 dig_connector = radeon_connector->con_priv;
drivers/gpu/drm/radeon/cikd.h
Diff comments   View file @ 1dd34da
... ... @@ -2156,5 +2156,7 @@
2156 2156 #define ATC_VM_APERTURE1_HIGH_ADDR 0x330Cu
2157 2157 #define ATC_VM_APERTURE1_LOW_ADDR 0x3304u
2158 2158  
  2159 +#define IH_VMID_0_LUT 0x3D40u
  2160 +
2159 2161 #endif
drivers/gpu/drm/radeon/dce3_1_afmt.c
Diff comments   View file @ 1dd34da
... ... @@ -103,7 +103,7 @@
103 103 }
104 104  
105 105 sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
106   - if (sad_count < 0) {
  106 + if (sad_count <= 0) {
107 107 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
108 108 return;
109 109 }
drivers/gpu/drm/radeon/kv_dpm.c
Diff comments   View file @ 1dd34da
... ... @@ -2745,13 +2745,11 @@
2745 2745 pi->enable_auto_thermal_throttling = true;
2746 2746 pi->disable_nb_ps3_in_battery = false;
2747 2747 if (radeon_bapm == -1) {
2748   - /* There are stability issues reported on with
2749   - * bapm enabled on an asrock system.
2750   - */
2751   - if (rdev->pdev->subsystem_vendor == 0x1849)
2752   - pi->bapm_enable = false;
2753   - else
  2748 + /* only enable bapm on KB, ML by default */
  2749 + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
2754 2750 pi->bapm_enable = true;
  2751 + else
  2752 + pi->bapm_enable = false;
2755 2753 } else if (radeon_bapm == 0) {
2756 2754 pi->bapm_enable = false;
2757 2755 } else {
drivers/gpu/drm/radeon/radeon_kfd.c
Diff comments   View file @ 1dd34da
... ... @@ -72,7 +72,7 @@
72 72 static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
73 73 uint32_t queue_id, uint32_t __user *wptr);
74 74  
75   -static bool kgd_hqd_is_occupies(struct kgd_dev *kgd, uint64_t queue_address,
  75 +static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
76 76 uint32_t pipe_id, uint32_t queue_id);
77 77  
78 78 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
... ... @@ -92,7 +92,7 @@
92 92 .init_memory = kgd_init_memory,
93 93 .init_pipeline = kgd_init_pipeline,
94 94 .hqd_load = kgd_hqd_load,
95   - .hqd_is_occupies = kgd_hqd_is_occupies,
  95 + .hqd_is_occupied = kgd_hqd_is_occupied,
96 96 .hqd_destroy = kgd_hqd_destroy,
97 97 .get_fw_version = get_fw_version
98 98 };
... ... @@ -101,6 +101,7 @@
101 101  
102 102 bool radeon_kfd_init(void)
103 103 {
  104 +#if defined(CONFIG_HSA_AMD_MODULE)
104 105 bool (*kgd2kfd_init_p)(unsigned, const struct kfd2kgd_calls*,
105 106 const struct kgd2kfd_calls**);
106 107  
... ... @@ -117,6 +118,17 @@
117 118 }
118 119  
119 120 return true;
  121 +#elif defined(CONFIG_HSA_AMD)
  122 + if (!kgd2kfd_init(KFD_INTERFACE_VERSION, &kfd2kgd, &kgd2kfd)) {
  123 + kgd2kfd = NULL;
  124 +
  125 + return false;
  126 + }
  127 +
  128 + return true;
  129 +#else
  130 + return false;
  131 +#endif
120 132 }
121 133  
122 134 void radeon_kfd_fini(void)
... ... @@ -378,6 +390,10 @@
378 390 cpu_relax();
379 391 write_register(kgd, ATC_VMID_PASID_MAPPING_UPDATE_STATUS, 1U << vmid);
380 392  
  393 + /* Mapping vmid to pasid also for IH block */
  394 + write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),
  395 + pasid_mapping);
  396 +
381 397 return 0;
382 398 }
383 399  
... ... @@ -517,7 +533,7 @@
517 533 return 0;
518 534 }
519 535  
520   -static bool kgd_hqd_is_occupies(struct kgd_dev *kgd, uint64_t queue_address,
  536 +static bool kgd_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
521 537 uint32_t pipe_id, uint32_t queue_id)
522 538 {
523 539 uint32_t act;
... ... @@ -556,6 +572,7 @@
556 572 if (timeout == 0) {
557 573 pr_err("kfd: cp queue preemption time out (%dms)\n",
558 574 temp);
  575 + release_queue(kgd);
559 576 return -ETIME;
560 577 }
561 578 msleep(20);
drivers/gpu/drm/radeon/radeon_state.c
Diff comments   View file @ 1dd34da
... ... @@ -1703,7 +1703,7 @@
1703 1703 u32 format;
1704 1704 u32 *buffer;
1705 1705 const u8 __user *data;
1706   - int size, dwords, tex_width, blit_width, spitch;
  1706 + unsigned int size, dwords, tex_width, blit_width, spitch;
1707 1707 u32 height;
1708 1708 int i;
1709 1709 u32 texpitch, microtile;
include/uapi/linux/kfd_ioctl.h
Diff comments   View file @ 1dd34da
... ... @@ -128,28 +128,35 @@
128 128 uint32_t pad;
129 129 };
130 130  
131   -#define KFD_IOC_MAGIC 'K'
  131 +#define AMDKFD_IOCTL_BASE 'K'
  132 +#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
  133 +#define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
  134 +#define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
  135 +#define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
132 136  
133   -#define KFD_IOC_GET_VERSION \
134   - _IOR(KFD_IOC_MAGIC, 1, struct kfd_ioctl_get_version_args)
  137 +#define AMDKFD_IOC_GET_VERSION \
  138 + AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
135 139  
136   -#define KFD_IOC_CREATE_QUEUE \
137   - _IOWR(KFD_IOC_MAGIC, 2, struct kfd_ioctl_create_queue_args)
  140 +#define AMDKFD_IOC_CREATE_QUEUE \
  141 + AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
138 142  
139   -#define KFD_IOC_DESTROY_QUEUE \
140   - _IOWR(KFD_IOC_MAGIC, 3, struct kfd_ioctl_destroy_queue_args)
  143 +#define AMDKFD_IOC_DESTROY_QUEUE \
  144 + AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
141 145  
142   -#define KFD_IOC_SET_MEMORY_POLICY \
143   - _IOW(KFD_IOC_MAGIC, 4, struct kfd_ioctl_set_memory_policy_args)
  146 +#define AMDKFD_IOC_SET_MEMORY_POLICY \
  147 + AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
144 148  
145   -#define KFD_IOC_GET_CLOCK_COUNTERS \
146   - _IOWR(KFD_IOC_MAGIC, 5, struct kfd_ioctl_get_clock_counters_args)
  149 +#define AMDKFD_IOC_GET_CLOCK_COUNTERS \
  150 + AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
147 151  
148   -#define KFD_IOC_GET_PROCESS_APERTURES \
149   - _IOR(KFD_IOC_MAGIC, 6, struct kfd_ioctl_get_process_apertures_args)
  152 +#define AMDKFD_IOC_GET_PROCESS_APERTURES \
  153 + AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
150 154  
151   -#define KFD_IOC_UPDATE_QUEUE \
152   - _IOW(KFD_IOC_MAGIC, 7, struct kfd_ioctl_update_queue_args)
  155 +#define AMDKFD_IOC_UPDATE_QUEUE \
  156 + AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
  157 +
  158 +#define AMDKFD_COMMAND_START 0x01
  159 +#define AMDKFD_COMMAND_END 0x08
153 160  
154 161 #endif