Eric Lee / smarc-ti-linux-kernel

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Commit 227844f53864077ccaefe01d0960fcccc03445ce

Authored by Christoffer Dall
1 parent a875dafcf9
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

arm/arm64: KVM: Rename irq_state to irq_pending 

The irq_state field on the distributor struct is ambiguous in its
meaning; the comment says it's the level of the input put, but that
doesn't make much sense for edge-triggered interrupts.  The code
actually uses this state variable to check if the interrupt is in the
pending state on the distributor so clarify the comment and rename the
actual variable and accessor methods.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>

Showing 2 changed files with 28 additions and 28 deletions Side-by-side Diff

include/kvm/arm_vgic.h
Diff comments   View file @ 227844f
... ... @@ -140,8 +140,8 @@
140 140 /* Interrupt enabled (one bit per IRQ) */
141 141 struct vgic_bitmap irq_enabled;
142 142  
143   - /* Interrupt 'pin' level */
144   - struct vgic_bitmap irq_state;
  143 + /* Interrupt state is pending on the distributor */
  144 + struct vgic_bitmap irq_pending;
145 145  
146 146 /* Level-triggered interrupt in progress */
147 147 struct vgic_bitmap irq_active;
... ... @@ -37,7 +37,7 @@
37 37 *
38 38 * - At any time, the dist->irq_pending_on_cpu is the oracle that knows if
39 39 * something is pending
40   - * - VGIC pending interrupts are stored on the vgic.irq_state vgic
  40 + * - VGIC pending interrupts are stored on the vgic.irq_pending vgic
41 41 * bitmap (this bitmap is updated by both user land ioctls and guest
42 42 * mmio ops, and other in-kernel peripherals such as the
43 43 * arch. timers) and indicate the 'wire' state.
... ... @@ -45,8 +45,8 @@
45 45 * recalculated
46 46 * - To calculate the oracle, we need info for each cpu from
47 47 * compute_pending_for_cpu, which considers:
48   - * - PPI: dist->irq_state & dist->irq_enable
49   - * - SPI: dist->irq_state & dist->irq_enable & dist->irq_spi_target
  48 + * - PPI: dist->irq_pending & dist->irq_enable
  49 + * - SPI: dist->irq_pending & dist->irq_enable & dist->irq_spi_target
50 50 * - irq_spi_target is a 'formatted' version of the GICD_ICFGR
51 51 * registers, stored on each vcpu. We only keep one bit of
52 52 * information per interrupt, making sure that only one vcpu can
53 53  
54 54  
55 55  
56 56  
... ... @@ -221,21 +221,21 @@
221 221 {
222 222 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
223 223  
224   - return vgic_bitmap_get_irq_val(&dist->irq_state, vcpu->vcpu_id, irq);
  224 + return vgic_bitmap_get_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq);
225 225 }
226 226  
227   -static void vgic_dist_irq_set(struct kvm_vcpu *vcpu, int irq)
  227 +static void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq)
228 228 {
229 229 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
230 230  
231   - vgic_bitmap_set_irq_val(&dist->irq_state, vcpu->vcpu_id, irq, 1);
  231 + vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 1);
232 232 }
233 233  
234   -static void vgic_dist_irq_clear(struct kvm_vcpu *vcpu, int irq)
  234 +static void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq)
235 235 {
236 236 struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
237 237  
238   - vgic_bitmap_set_irq_val(&dist->irq_state, vcpu->vcpu_id, irq, 0);
  238 + vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 0);
239 239 }
240 240  
241 241 static void vgic_cpu_irq_set(struct kvm_vcpu *vcpu, int irq)
... ... @@ -409,7 +409,7 @@
409 409 struct kvm_exit_mmio *mmio,
410 410 phys_addr_t offset)
411 411 {
412   - u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_state,
  412 + u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_pending,
413 413 vcpu->vcpu_id, offset);
414 414 vgic_reg_access(mmio, reg, offset,
415 415 ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT);
... ... @@ -425,7 +425,7 @@
425 425 struct kvm_exit_mmio *mmio,
426 426 phys_addr_t offset)
427 427 {
428   - u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_state,
  428 + u32 *reg = vgic_bitmap_get_reg(&vcpu->kvm->arch.vgic.irq_pending,
429 429 vcpu->vcpu_id, offset);
430 430 vgic_reg_access(mmio, reg, offset,
431 431 ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT);
... ... @@ -651,7 +651,7 @@
651 651 * is fine, then we are only setting a few bits that were
652 652 * already set.
653 653 */
654   - vgic_dist_irq_set(vcpu, lr.irq);
  654 + vgic_dist_irq_set_pending(vcpu, lr.irq);
655 655 if (lr.irq < VGIC_NR_SGIS)
656 656 dist->irq_sgi_sources[vcpu_id][lr.irq] |= 1 << lr.source;
657 657 lr.state &= ~LR_STATE_PENDING;
... ... @@ -932,7 +932,7 @@
932 932 kvm_for_each_vcpu(c, vcpu, kvm) {
933 933 if (target_cpus & 1) {
934 934 /* Flag the SGI as pending */
935   - vgic_dist_irq_set(vcpu, sgi);
  935 + vgic_dist_irq_set_pending(vcpu, sgi);
936 936 dist->irq_sgi_sources[c][sgi] |= 1 << vcpu_id;
937 937 kvm_debug("SGI%d from CPU%d to CPU%d\n", sgi, vcpu_id, c);
938 938 }
939 939  
... ... @@ -952,11 +952,11 @@
952 952 pend_percpu = vcpu->arch.vgic_cpu.pending_percpu;
953 953 pend_shared = vcpu->arch.vgic_cpu.pending_shared;
954 954  
955   - pending = vgic_bitmap_get_cpu_map(&dist->irq_state, vcpu_id);
  955 + pending = vgic_bitmap_get_cpu_map(&dist->irq_pending, vcpu_id);
956 956 enabled = vgic_bitmap_get_cpu_map(&dist->irq_enabled, vcpu_id);
957 957 bitmap_and(pend_percpu, pending, enabled, VGIC_NR_PRIVATE_IRQS);
958 958  
959   - pending = vgic_bitmap_get_shared_map(&dist->irq_state);
  959 + pending = vgic_bitmap_get_shared_map(&dist->irq_pending);
960 960 enabled = vgic_bitmap_get_shared_map(&dist->irq_enabled);
961 961 bitmap_and(pend_shared, pending, enabled, VGIC_NR_SHARED_IRQS);
962 962 bitmap_and(pend_shared, pend_shared,
... ... @@ -1160,7 +1160,7 @@
1160 1160 * our emulated gic and can get rid of them.
1161 1161 */
1162 1162 if (!sources) {
1163   - vgic_dist_irq_clear(vcpu, irq);
  1163 + vgic_dist_irq_clear_pending(vcpu, irq);
1164 1164 vgic_cpu_irq_clear(vcpu, irq);
1165 1165 return true;
1166 1166 }
... ... @@ -1175,7 +1175,7 @@
1175 1175  
1176 1176 if (vgic_queue_irq(vcpu, 0, irq)) {
1177 1177 if (vgic_irq_is_edge(vcpu, irq)) {
1178   - vgic_dist_irq_clear(vcpu, irq);
  1178 + vgic_dist_irq_clear_pending(vcpu, irq);
1179 1179 vgic_cpu_irq_clear(vcpu, irq);
1180 1180 } else {
1181 1181 vgic_irq_set_active(vcpu, irq);
... ... @@ -1376,7 +1376,7 @@
1376 1376  
1377 1377 static int vgic_validate_injection(struct kvm_vcpu *vcpu, int irq, int level)
1378 1378 {
1379   - int is_edge = vgic_irq_is_edge(vcpu, irq);
  1379 + int edge_triggered = vgic_irq_is_edge(vcpu, irq);
1380 1380 int state = vgic_dist_irq_is_pending(vcpu, irq);
1381 1381  
1382 1382 /*
1383 1383  
1384 1384  
1385 1385  
... ... @@ -1384,26 +1384,26 @@
1384 1384 * - edge triggered and we have a rising edge
1385 1385 * - level triggered and we change level
1386 1386 */
1387   - if (is_edge)
  1387 + if (edge_triggered)
1388 1388 return level > state;
1389 1389 else
1390 1390 return level != state;
1391 1391 }
1392 1392  
1393   -static bool vgic_update_irq_state(struct kvm *kvm, int cpuid,
  1393 +static bool vgic_update_irq_pending(struct kvm *kvm, int cpuid,
1394 1394 unsigned int irq_num, bool level)
1395 1395 {
1396 1396 struct vgic_dist *dist = &kvm->arch.vgic;
1397 1397 struct kvm_vcpu *vcpu;
1398   - int is_edge, is_level;
  1398 + int edge_triggered, level_triggered;
1399 1399 int enabled;
1400 1400 bool ret = true;
1401 1401  
1402 1402 spin_lock(&dist->lock);
1403 1403  
1404 1404 vcpu = kvm_get_vcpu(kvm, cpuid);
1405   - is_edge = vgic_irq_is_edge(vcpu, irq_num);
1406   - is_level = !is_edge;
  1405 + edge_triggered = vgic_irq_is_edge(vcpu, irq_num);
  1406 + level_triggered = !edge_triggered;
1407 1407  
1408 1408 if (!vgic_validate_injection(vcpu, irq_num, level)) {
1409 1409 ret = false;
1410 1410  
... ... @@ -1418,9 +1418,9 @@
1418 1418 kvm_debug("Inject IRQ%d level %d CPU%d\n", irq_num, level, cpuid);
1419 1419  
1420 1420 if (level)
1421   - vgic_dist_irq_set(vcpu, irq_num);
  1421 + vgic_dist_irq_set_pending(vcpu, irq_num);
1422 1422 else
1423   - vgic_dist_irq_clear(vcpu, irq_num);
  1423 + vgic_dist_irq_clear_pending(vcpu, irq_num);
1424 1424  
1425 1425 enabled = vgic_irq_is_enabled(vcpu, irq_num);
1426 1426  
... ... @@ -1429,7 +1429,7 @@
1429 1429 goto out;
1430 1430 }
1431 1431  
1432   - if (is_level && vgic_irq_is_active(vcpu, irq_num)) {
  1432 + if (level_triggered && vgic_irq_is_active(vcpu, irq_num)) {
1433 1433 /*
1434 1434 * Level interrupt in progress, will be picked up
1435 1435 * when EOId.
... ... @@ -1466,7 +1466,7 @@
1466 1466 int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int irq_num,
1467 1467 bool level)
1468 1468 {
1469   - if (vgic_update_irq_state(kvm, cpuid, irq_num, level))
  1469 + if (vgic_update_irq_pending(kvm, cpuid, irq_num, level))
1470 1470 vgic_kick_vcpus(kvm);
1471 1471  
1472 1472 return 0;