Eric Lee / smarc-ti-linux-kernel

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Commit 3298a3511f1e73255a8dc023efd909e569eea037

Authored by Linus Torvalds
2 parents 5ce7aba976 acb7452369
Exists in master and in 20 other branches dlt-processor-sdk-linux-03.00.00.04, newt-ti-linux-3.12.y, processor-sdk-linux-01.00.00, processor-sdk-linux-02.00.01, smarc-ti-linux-3.12.10, smarc-ti-linux-3.12.y, smarc-ti-linux-3.14.y, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.12.y, ti-linux-3.14.y, ti-linux-3.15.y, ti-lsk-linux-4.1.y

Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC multiplatform support from Arnd Bergmann:
 "Converting more ARM platforms to multiplatform support.  This time,
  OMAP gets converted, which is a major step since this is by far the
  largest platform in terms of code size.  The same thing happens to the
  vt8500 platform."

* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  net: cwdavinci_cpdma: export symbols for cpsw
  remoteproc: omap: depend on OMAP_MBOX_FWK
  [media] davinci: do not include mach/hardware.h
  ARM: OMAP2+: Make sure files with omap initcalls include soc.h
  ARM: OMAP2+: Include soc.h to drm.c to fix compiling
  ARM: OMAP2+: Fix warning for hwspinlock omap_postcore_initcall
  ARM: multi_v7_defconfig: add ARCH_ZYNQ
  ARM: multi_v7_defconfig: remove unnecessary CONFIG_GPIOLIB
  arm: vt8500: Remove remaining mach includes
  arm: vt8500: Convert debug-macro.S to be multiplatform friendly
  arm: vt8500: Remove single platform Kconfig options
  ARM: OMAP2+: Remove now obsolete uncompress.h and debug-macro.S
  ARM: OMAP2+: Add minimal support for booting vexpress
  ARM: OMAP2+: Enable ARCH_MULTIPLATFORM support
  ARM: OMAP2+: Disable code that currently does not work with multiplaform
  ARM: OMAP2+: Add multiplatform debug_ll support
  ARM: OMAP: Fix dmaengine init for multiplatform
  ARM: OMAP: Fix i2c cmdline initcall for multiplatform
  ARM: OMAP2+: Use omap initcalls
  ARM: OMAP2+: Limit omap initcalls to omap only on multiplatform kernels

Showing 61 changed files Side-by-side Diff

... ... @@ -932,32 +932,24 @@
932 932 help
933 933 Support for TI's DaVinci platform.
934 934  
935   -config ARCH_OMAP
936   - bool "TI OMAP"
  935 +config ARCH_OMAP1
  936 + bool "TI OMAP1"
937 937 depends on MMU
938 938 select ARCH_HAS_CPUFREQ
939 939 select ARCH_HAS_HOLES_MEMORYMODEL
  940 + select ARCH_OMAP
940 941 select ARCH_REQUIRE_GPIOLIB
  942 + select CLKDEV_LOOKUP
941 943 select CLKSRC_MMIO
942 944 select GENERIC_CLOCKEVENTS
  945 + select GENERIC_IRQ_CHIP
943 946 select HAVE_CLK
  947 + select HAVE_IDE
  948 + select IRQ_DOMAIN
  949 + select NEED_MACH_IO_H if PCCARD
  950 + select NEED_MACH_MEMORY_H
944 951 help
945   - Support for TI's OMAP platform (OMAP1/2/3/4).
946   -
947   -config ARCH_VT8500_SINGLE
948   - bool "VIA/WonderMedia 85xx"
949   - select ARCH_HAS_CPUFREQ
950   - select ARCH_REQUIRE_GPIOLIB
951   - select CLKDEV_LOOKUP
952   - select COMMON_CLK
953   - select CPU_ARM926T
954   - select GENERIC_CLOCKEVENTS
955   - select HAVE_CLK
956   - select MULTI_IRQ_HANDLER
957   - select SPARSE_IRQ
958   - select USE_OF
959   - help
960   - Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  952 + Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
961 953  
962 954 endchoice
963 955  
arch/arm/Kconfig.debug
Diff comments   View file @ 3298a35
... ... @@ -291,6 +291,13 @@
291 291 Say Y here if you want kernel low-level debugging support
292 292 on MVEBU based platforms.
293 293  
  294 + config DEBUG_OMAP2PLUS_UART
  295 + bool "Kernel low-level debugging messages via OMAP2PLUS UART"
  296 + depends on ARCH_OMAP2PLUS
  297 + help
  298 + Say Y here if you want kernel low-level debugging support
  299 + on OMAP2PLUS based platforms.
  300 +
294 301 config DEBUG_PICOXCELL_UART
295 302 depends on ARCH_PICOXCELL
296 303 bool "Use PicoXcell UART for low-level debug"
... ... @@ -412,6 +419,13 @@
412 419 of the tiles using the RS1 memory map, including all new A-class
413 420 core tiles, FPGA-based SMMs and software models.
414 421  
  422 + config DEBUG_VT8500_UART0
  423 + bool "Use UART0 on VIA/Wondermedia SoCs"
  424 + depends on ARCH_VT8500
  425 + help
  426 + This option selects UART0 on VIA/Wondermedia System-on-a-chip
  427 + devices, including VT8500, WM8505, WM8650 and WM8850.
  428 +
415 429 config DEBUG_LL_UART_NONE
416 430 bool "No low-level debugging UART"
417 431 depends on !ARCH_MULTIPLATFORM
... ... @@ -461,6 +475,54 @@
461 475  
462 476 choice
463 477 prompt "Low-level debug console UART"
  478 + depends on DEBUG_OMAP2PLUS_UART
  479 +
  480 + config DEBUG_OMAP2UART1
  481 + bool "OMAP2/3/4 UART1 (omap2/3 sdp boards and some omap3 boards)"
  482 + help
  483 + This covers at least h4, 2430sdp, 3430sdp, 3630sdp,
  484 + omap3 torpedo and 3530 lv som.
  485 +
  486 + config DEBUG_OMAP2UART2
  487 + bool "OMAP2/3/4 UART2"
  488 +
  489 + config DEBUG_OMAP2UART3
  490 + bool "OMAP2 UART3 (n8x0)"
  491 +
  492 + config DEBUG_OMAP3UART3
  493 + bool "OMAP3 UART3 (most omap3 boards)"
  494 + help
  495 + This covers at least cm_t3x, beagle, crane, devkit8000,
  496 + igep00x0, ldp, n900, n9(50), pandora, overo, touchbook,
  497 + and 3517evm.
  498 +
  499 + config DEBUG_OMAP4UART3
  500 + bool "OMAP4/5 UART3 (omap4 blaze, panda, omap5 sevm)"
  501 +
  502 + config DEBUG_OMAP3UART4
  503 + bool "OMAP36XX UART4"
  504 +
  505 + config DEBUG_OMAP4UART4
  506 + bool "OMAP4/5 UART4"
  507 +
  508 + config DEBUG_TI81XXUART1
  509 + bool "TI81XX UART1 (ti8148evm)"
  510 +
  511 + config DEBUG_TI81XXUART2
  512 + bool "TI81XX UART2"
  513 +
  514 + config DEBUG_TI81XXUART3
  515 + bool "TI81XX UART3 (ti8168evm)"
  516 +
  517 + config DEBUG_AM33XXUART1
  518 + bool "AM33XX UART1"
  519 +
  520 + config DEBUG_ZOOM_UART
  521 + bool "Zoom2/3 UART"
  522 +endchoice
  523 +
  524 +choice
  525 + prompt "Low-level debug console UART"
464 526 depends on DEBUG_LL && DEBUG_TEGRA_UART
465 527  
466 528 config TEGRA_DEBUG_UART_AUTO_ODMDATA
467 529  
... ... @@ -501,11 +563,13 @@
501 563 DEBUG_IMX6Q_UART
502 564 default "debug/highbank.S" if DEBUG_HIGHBANK_UART
503 565 default "debug/mvebu.S" if DEBUG_MVEBU_UART
  566 + default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
504 567 default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
505 568 default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
506 569 default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
507 570 default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
508 571 DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
  572 + default "debug/vt8500.S" if DEBUG_VT8500_UART0
509 573 default "debug/tegra.S" if DEBUG_TEGRA_UART
510 574 default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
511 575 default "mach/debug-macro.S"
arch/arm/configs/multi_v7_defconfig
Diff comments   View file @ 3298a35
... ... @@ -8,6 +8,7 @@
8 8 CONFIG_ARCH_SOCFPGA=y
9 9 CONFIG_ARCH_SUNXI=y
10 10 # CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
  11 +CONFIG_ARCH_ZYNQ=y
11 12 CONFIG_ARM_ERRATA_754322=y
12 13 CONFIG_SMP=y
13 14 CONFIG_ARM_ARCH_TIMER=y
... ... @@ -39,7 +40,6 @@
39 40 CONFIG_I2C_DESIGNWARE_PLATFORM=y
40 41 CONFIG_SPI=y
41 42 CONFIG_SPI_PL022=y
42   -CONFIG_GPIOLIB=y
43 43 CONFIG_FB=y
44 44 CONFIG_FB_ARMCLCD=y
45 45 CONFIG_FRAMEBUFFER_CONSOLE=y
arch/arm/configs/omap2plus_defconfig
Diff comments   View file @ 3298a35
... ... @@ -20,9 +20,10 @@
20 20 CONFIG_MODVERSIONS=y
21 21 CONFIG_MODULE_SRCVERSION_ALL=y
22 22 # CONFIG_BLK_DEV_BSG is not set
23   -CONFIG_ARCH_OMAP=y
  23 +CONFIG_ARCH_OMAP2PLUS=y
24 24 CONFIG_OMAP_RESET_CLOCKS=y
25 25 CONFIG_OMAP_MUX_DEBUG=y
  26 +CONFIG_ARCH_VEXPRESS_CA9X4=y
26 27 CONFIG_ARM_THUMBEE=y
27 28 CONFIG_ARM_ERRATA_411920=y
28 29 CONFIG_NO_HZ=y
... ... @@ -121,6 +122,8 @@
121 122 CONFIG_SERIAL_8250_SHARE_IRQ=y
122 123 CONFIG_SERIAL_8250_DETECT_IRQ=y
123 124 CONFIG_SERIAL_8250_RSA=y
  125 +CONFIG_SERIAL_AMBA_PL011=y
  126 +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
124 127 CONFIG_HW_RANDOM=y
125 128 CONFIG_I2C_CHARDEV=y
126 129 CONFIG_SPI=y
... ... @@ -194,6 +197,7 @@
194 197 CONFIG_MMC=y
195 198 CONFIG_MMC_UNSAFE_RESUME=y
196 199 CONFIG_SDIO_UART=y
  200 +CONFIG_MMC_ARMMMCI=y
197 201 CONFIG_MMC_OMAP=y
198 202 CONFIG_MMC_OMAP_HS=y
199 203 CONFIG_RTC_CLASS=y
arch/arm/include/debug/omap2plus.S
Diff comments   View file @ 3298a35
  1 +/*
  2 + * Debugging macro include header
  3 + *
  4 + * Copyright (C) 1994-1999 Russell King
  5 + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
  6 + *
  7 + * This program is free software; you can redistribute it and/or modify
  8 + * it under the terms of the GNU General Public License version 2 as
  9 + * published by the Free Software Foundation.
  10 + *
  11 +*/
  12 +
  13 +#include <linux/serial_reg.h>
  14 +
  15 +/* OMAP2 serial ports */
  16 +#define OMAP2_UART1_BASE 0x4806a000
  17 +#define OMAP2_UART2_BASE 0x4806c000
  18 +#define OMAP2_UART3_BASE 0x4806e000
  19 +
  20 +/* OMAP3 serial ports */
  21 +#define OMAP3_UART1_BASE OMAP2_UART1_BASE
  22 +#define OMAP3_UART2_BASE OMAP2_UART2_BASE
  23 +#define OMAP3_UART3_BASE 0x49020000
  24 +#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
  25 +#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
  26 +
  27 +/* OMAP4 serial ports */
  28 +#define OMAP4_UART1_BASE OMAP2_UART1_BASE
  29 +#define OMAP4_UART2_BASE OMAP2_UART2_BASE
  30 +#define OMAP4_UART3_BASE 0x48020000
  31 +#define OMAP4_UART4_BASE 0x4806e000
  32 +
  33 +/* TI81XX serial ports */
  34 +#define TI81XX_UART1_BASE 0x48020000
  35 +#define TI81XX_UART2_BASE 0x48022000
  36 +#define TI81XX_UART3_BASE 0x48024000
  37 +
  38 +/* AM3505/3517 UART4 */
  39 +#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
  40 +
  41 +/* AM33XX serial port */
  42 +#define AM33XX_UART1_BASE 0x44E09000
  43 +
  44 +/* OMAP5 serial ports */
  45 +#define OMAP5_UART1_BASE OMAP2_UART1_BASE
  46 +#define OMAP5_UART2_BASE OMAP2_UART2_BASE
  47 +#define OMAP5_UART3_BASE OMAP4_UART3_BASE
  48 +#define OMAP5_UART4_BASE OMAP4_UART4_BASE
  49 +#define OMAP5_UART5_BASE 0x48066000
  50 +#define OMAP5_UART6_BASE 0x48068000
  51 +
  52 +/* External port on Zoom2/3 */
  53 +#define ZOOM_UART_BASE 0x10000000
  54 +#define ZOOM_UART_VIRT 0xfa400000
  55 +
  56 +#define OMAP_PORT_SHIFT 2
  57 +#define ZOOM_PORT_SHIFT 1
  58 +
  59 +#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
  60 +
  61 + .pushsection .data
  62 +omap_uart_phys: .word 0
  63 +omap_uart_virt: .word 0
  64 +omap_uart_lsr: .word 0
  65 + .popsection
  66 +
  67 + .macro addruart, rp, rv, tmp
  68 +
  69 + /* Use omap_uart_phys/virt if already configured */
  70 +10: adr \rp, 99f @ get effective addr of 99f
  71 + ldr \rv, [\rp] @ get absolute addr of 99f
  72 + sub \rv, \rv, \rp @ offset between the two
  73 + ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
  74 + sub \tmp, \rp, \rv @ make it effective
  75 + ldr \rp, [\tmp, #0] @ omap_uart_phys
  76 + ldr \rv, [\tmp, #4] @ omap_uart_virt
  77 + cmp \rp, #0 @ is port configured?
  78 + cmpne \rv, #0
  79 + bne 100f @ already configured
  80 +
  81 + /* Configure the UART offset from the phys/virt base */
  82 +#ifdef CONFIG_DEBUG_OMAP2UART1
  83 + mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
  84 + b 98f
  85 +#endif
  86 +#ifdef CONFIG_DEBUG_OMAP2UART2
  87 + mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
  88 + b 98f
  89 +#endif
  90 +#ifdef CONFIG_DEBUG_OMAP2UART3
  91 + mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
  92 + b 98f
  93 +#endif
  94 +#ifdef CONFIG_DEBUG_OMAP3UART3
  95 + mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
  96 + add \rp, \rp, #0x00fb0000
  97 + add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
  98 + b 98f
  99 +#endif
  100 +#ifdef CONFIG_DEBUG_OMAP4UART3
  101 + mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
  102 + b 98f
  103 +#endif
  104 +#ifdef CONFIG_DEBUG_OMAP3UART4
  105 + mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
  106 + add \rp, \rp, #0x00fb0000
  107 + add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
  108 + b 98f
  109 +#endif
  110 +#ifdef CONFIG_DEBUG_OMAP4UART4
  111 + mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
  112 + b 98f
  113 +#endif
  114 +#ifdef CONFIG_DEBUG_TI81XXUART1
  115 + mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
  116 + b 98f
  117 +#endif
  118 +#ifdef CONFIG_DEBUG_TI81XXUART2
  119 + mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
  120 + b 98f
  121 +#endif
  122 +#ifdef CONFIG_DEBUG_TI81XXUART3
  123 + mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
  124 + b 98f
  125 +#endif
  126 +#ifdef CONFIG_DEBUG_AM33XXUART1
  127 + ldr \rp, =AM33XX_UART1_BASE
  128 + and \rp, \rp, #0x00ffffff
  129 + b 97f
  130 +#endif
  131 +#ifdef CONFIG_DEBUG_ZOOM_UART
  132 + ldr \rp, =ZOOM_UART_BASE
  133 + str \rp, [\tmp, #0] @ omap_uart_phys
  134 + ldr \rp, =ZOOM_UART_VIRT
  135 + str \rp, [\tmp, #4] @ omap_uart_virt
  136 + mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
  137 + str \rp, [\tmp, #8] @ omap_uart_lsr
  138 +#endif
  139 + b 10b
  140 +
  141 + /* AM33XX: Store both phys and virt address for the uart */
  142 +97: add \rp, \rp, #0x44000000 @ phys base
  143 + str \rp, [\tmp, #0] @ omap_uart_phys
  144 + sub \rp, \rp, #0x44000000 @ phys base
  145 + add \rp, \rp, #0xf9000000 @ virt base
  146 + str \rp, [\tmp, #4] @ omap_uart_virt
  147 + mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
  148 + str \rp, [\tmp, #8] @ omap_uart_lsr
  149 +
  150 + b 10b
  151 +
  152 + /* Store both phys and virt address for the uart */
  153 +98: add \rp, \rp, #0x48000000 @ phys base
  154 + str \rp, [\tmp, #0] @ omap_uart_phys
  155 + sub \rp, \rp, #0x48000000 @ phys base
  156 + add \rp, \rp, #0xfa000000 @ virt base
  157 + str \rp, [\tmp, #4] @ omap_uart_virt
  158 + mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
  159 + str \rp, [\tmp, #8] @ omap_uart_lsr
  160 +
  161 + b 10b
  162 +
  163 + .align
  164 +99: .word .
  165 + .word omap_uart_phys
  166 + .ltorg
  167 +
  168 +100: /* Pass the UART_LSR reg address */
  169 + ldr \tmp, [\tmp, #8] @ omap_uart_lsr
  170 + add \rp, \rp, \tmp
  171 + add \rv, \rv, \tmp
  172 + .endm
  173 +
  174 + .macro senduart,rd,rx
  175 + orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
  176 + bic \rx, \rx, #0xff @ get base (THR) reg address
  177 + strb \rd, [\rx] @ send lower byte of rd
  178 + orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
  179 + bic \rd, \rd, #(0xff << 24) @ restore original rd
  180 + .endm
  181 +
  182 + .macro busyuart,rd,rx
  183 +1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
  184 + and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
  185 + teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
  186 + bne 1001b
  187 + .endm
  188 +
  189 + .macro waituart,rd,rx
  190 + .endm
arch/arm/include/debug/vt8500.S
Diff comments   View file @ 3298a35
  1 +/*
  2 + * Debugging macro include header
  3 + *
  4 + * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
  5 + * Moved from arch/arm/mach-vt8500/include/mach/debug-macro.S
  6 + * Minor changes for readability.
  7 + *
  8 + * This program is free software; you can redistribute it and/or modify
  9 + * it under the terms of the GNU General Public License version 2 as
  10 + * published by the Free Software Foundation.
  11 + */
  12 +
  13 +#define DEBUG_LL_PHYS_BASE 0xD8000000
  14 +#define DEBUG_LL_VIRT_BASE 0xF8000000
  15 +#define DEBUG_LL_UART_OFFSET 0x00200000
  16 +
  17 +#if defined(CONFIG_DEBUG_VT8500_UART0)
  18 + .macro addruart, rp, rv, tmp
  19 + mov \rp, #DEBUG_LL_UART_OFFSET
  20 + orr \rv, \rp, #DEBUG_LL_VIRT_BASE
  21 + orr \rp, \rp, #DEBUG_LL_PHYS_BASE
  22 + .endm
  23 +
  24 + .macro senduart,rd,rx
  25 + strb \rd, [\rx, #0]
  26 + .endm
  27 +
  28 + .macro busyuart,rd,rx
  29 +1001: ldr \rd, [\rx, #0x1c]
  30 + ands \rd, \rd, #0x2
  31 + bne 1001b
  32 + .endm
  33 +
  34 + .macro waituart,rd,rx
  35 + .endm
  36 +
  37 +#endif
arch/arm/mach-omap1/dma.c
Diff comments   View file @ 3298a35
... ... @@ -24,7 +24,7 @@
24 24 #include <linux/init.h>
25 25 #include <linux/device.h>
26 26 #include <linux/io.h>
27   -
  27 +#include <linux/dma-mapping.h>
28 28 #include <linux/omap-dma.h>
29 29 #include <mach/tc.h>
30 30  
31 31  
... ... @@ -270,11 +270,17 @@
270 270 return errata;
271 271 }
272 272  
  273 +static const struct platform_device_info omap_dma_dev_info = {
  274 + .name = "omap-dma-engine",
  275 + .id = -1,
  276 + .dma_mask = DMA_BIT_MASK(32),
  277 +};
  278 +
273 279 static int __init omap1_system_dma_init(void)
274 280 {
275 281 struct omap_system_dma_plat_info *p;
276 282 struct omap_dma_dev_attr *d;
277   - struct platform_device *pdev;
  283 + struct platform_device *pdev, *dma_pdev;
278 284 int ret;
279 285  
280 286 pdev = platform_device_alloc("omap_dma_system", 0);
281 287  
... ... @@ -380,8 +386,16 @@
380 386 dma_common_ch_start = CPC;
381 387 dma_common_ch_end = COLOR;
382 388  
  389 + dma_pdev = platform_device_register_full(&omap_dma_dev_info);
  390 + if (IS_ERR(dma_pdev)) {
  391 + ret = PTR_ERR(dma_pdev);
  392 + goto exit_release_pdev;
  393 + }
  394 +
383 395 return ret;
384 396  
  397 +exit_release_pdev:
  398 + platform_device_del(pdev);
385 399 exit_release_chan:
386 400 kfree(d->chan);
387 401 exit_release_d:
arch/arm/mach-omap1/i2c.c
Diff comments   View file @ 3298a35
... ... @@ -91,4 +91,10 @@
91 91  
92 92 return platform_device_register(pdev);
93 93 }
  94 +
  95 +static int __init omap_i2c_cmdline(void)
  96 +{
  97 + return omap_register_i2c_bus_cmdline();
  98 +}
  99 +subsys_initcall(omap_i2c_cmdline);
arch/arm/mach-omap2/Kconfig
Diff comments   View file @ 3298a35
  1 +config ARCH_OMAP
  2 + bool
  3 +
  4 +config ARCH_OMAP2PLUS
  5 + bool "TI OMAP2/3/4/5 SoCs with device tree support" if (ARCH_MULTI_V6 || ARCH_MULTI_V7)
  6 + select ARCH_HAS_CPUFREQ
  7 + select ARCH_HAS_HOLES_MEMORYMODEL
  8 + select ARCH_OMAP
  9 + select ARCH_REQUIRE_GPIOLIB
  10 + select CLKDEV_LOOKUP
  11 + select CLKSRC_MMIO
  12 + select GENERIC_CLOCKEVENTS
  13 + select GENERIC_IRQ_CHIP
  14 + select HAVE_CLK
  15 + select OMAP_DM_TIMER
  16 + select PINCTRL
  17 + select PROC_DEVICETREE if PROC_FS
  18 + select SPARSE_IRQ
  19 + select USE_OF
  20 + help
  21 + Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
  22 +
  23 +
1 24 if ARCH_OMAP2PLUS
2 25  
3 26 menu "TI OMAP2/3/4 Specific Features"
... ... @@ -397,7 +420,7 @@
397 420  
398 421 config OMAP4_ERRATA_I688
399 422 bool "OMAP4 errata: Async Bridge Corruption"
400   - depends on ARCH_OMAP4
  423 + depends on ARCH_OMAP4 && !ARCH_MULTIPLATFORM
401 424 select ARCH_HAS_BARRIERS
402 425 help
403 426 If a data is stalled inside asynchronous bridge because of back
arch/arm/mach-omap2/Makefile
Diff comments   View file @ 3298a35
... ... @@ -2,6 +2,9 @@
2 2 # Makefile for the linux kernel.
3 3 #
4 4  
  5 +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \
  6 + -I$(srctree)/arch/arm/plat-omap/include
  7 +
5 8 # Common support
6 9 obj-y := id.o io.o control.o mux.o devices.o fb.o serial.o gpmc.o timer.o pm.o \
7 10 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
arch/arm/mach-omap2/board-omap3beagle.c
Diff comments   View file @ 3298a35
... ... @@ -495,7 +495,7 @@
495 495 }
496 496 return 0;
497 497 }
498   -device_initcall(beagle_opp_init);
  498 +omap_device_initcall(beagle_opp_init);
499 499  
500 500 static void __init omap3_beagle_init(void)
501 501 {
arch/arm/mach-omap2/board-rx51-video.c
Diff comments   View file @ 3298a35
... ... @@ -18,6 +18,7 @@
18 18 #include <video/omapdss.h>
19 19 #include <linux/platform_data/spi-omap2-mcspi.h>
20 20  
  21 +#include "soc.h"
21 22 #include "board-rx51.h"
22 23  
23 24 #include "mux.h"
... ... @@ -85,6 +86,6 @@
85 86 return 0;
86 87 }
87 88  
88   -subsys_initcall(rx51_video_init);
  89 +omap_subsys_initcall(rx51_video_init);
89 90 #endif /* defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) */
arch/arm/mach-omap2/clock2xxx.c
Diff comments   View file @ 3298a35
... ... @@ -52,5 +52,5 @@
52 52 return ret;
53 53 }
54 54  
55   -arch_initcall(omap2xxx_clk_arch_init);
  55 +omap_arch_initcall(omap2xxx_clk_arch_init);
arch/arm/mach-omap2/clock3xxx.c
Diff comments   View file @ 3298a35
... ... @@ -94,5 +94,5 @@
94 94 return ret;
95 95 }
96 96  
97   -arch_initcall(omap3xxx_clk_arch_init);
  97 +omap_arch_initcall(omap3xxx_clk_arch_init);
arch/arm/mach-omap2/devices.c
Diff comments   View file @ 3298a35
... ... @@ -69,7 +69,7 @@
69 69  
70 70 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
71 71 }
72   -postcore_initcall(omap3_l3_init);
  72 +omap_postcore_initcall(omap3_l3_init);
73 73  
74 74 static int __init omap4_l3_init(void)
75 75 {
... ... @@ -104,7 +104,7 @@
104 104  
105 105 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
106 106 }
107   -postcore_initcall(omap4_l3_init);
  107 +omap_postcore_initcall(omap4_l3_init);
108 108  
109 109 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
110 110  
... ... @@ -779,5 +779,5 @@
779 779  
780 780 return 0;
781 781 }
782   -arch_initcall(omap2_init_devices);
  782 +omap_arch_initcall(omap2_init_devices);
arch/arm/mach-omap2/dma.c
Diff comments   View file @ 3298a35
... ... @@ -27,7 +27,7 @@
27 27 #include <linux/module.h>
28 28 #include <linux/init.h>
29 29 #include <linux/device.h>
30   -
  30 +#include <linux/dma-mapping.h>
31 31 #include <linux/omap-dma.h>
32 32  
33 33 #include "soc.h"
34 34  
35 35  
36 36  
... ... @@ -288,10 +288,27 @@
288 288 return 0;
289 289 }
290 290  
  291 +static const struct platform_device_info omap_dma_dev_info = {
  292 + .name = "omap-dma-engine",
  293 + .id = -1,
  294 + .dma_mask = DMA_BIT_MASK(32),
  295 +};
  296 +
291 297 static int __init omap2_system_dma_init(void)
292 298 {
293   - return omap_hwmod_for_each_by_class("dma",
  299 + struct platform_device *pdev;
  300 + int res;
  301 +
  302 + res = omap_hwmod_for_each_by_class("dma",
294 303 omap2_system_dma_init_dev, NULL);
  304 + if (res)
  305 + return res;
  306 +
  307 + pdev = platform_device_register_full(&omap_dma_dev_info);
  308 + if (IS_ERR(pdev))
  309 + return PTR_ERR(pdev);
  310 +
  311 + return res;
295 312 }
296   -arch_initcall(omap2_system_dma_init);
  313 +omap_arch_initcall(omap2_system_dma_init);
arch/arm/mach-omap2/drm.c
Diff comments   View file @ 3298a35
... ... @@ -63,7 +63,7 @@
63 63  
64 64 }
65 65  
66   -arch_initcall(omap_init_drm);
  66 +omap_arch_initcall(omap_init_drm);
67 67  
68 68 #endif
arch/arm/mach-omap2/emu.c
Diff comments   View file @ 3298a35
... ... @@ -47,5 +47,5 @@
47 47 return 0;
48 48 }
49 49  
50   -subsys_initcall(emu_init);
  50 +omap_subsys_initcall(emu_init);
arch/arm/mach-omap2/fb.c
Diff comments   View file @ 3298a35
... ... @@ -89,7 +89,7 @@
89 89 return 0;
90 90 }
91 91  
92   -arch_initcall(omap_init_vrfb);
  92 +omap_arch_initcall(omap_init_vrfb);
93 93 #endif
94 94  
95 95 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
... ... @@ -113,7 +113,7 @@
113 113 return platform_device_register(&omap_fb_device);
114 114 }
115 115  
116   -arch_initcall(omap_init_fb);
  116 +omap_arch_initcall(omap_init_fb);
117 117  
118 118 #endif
arch/arm/mach-omap2/gpio.c
Diff comments   View file @ 3298a35
... ... @@ -23,6 +23,7 @@
23 23 #include <linux/of.h>
24 24 #include <linux/platform_data/gpio-omap.h>
25 25  
  26 +#include "soc.h"
26 27 #include "omap_hwmod.h"
27 28 #include "omap_device.h"
28 29 #include "omap-pm.h"
... ... @@ -147,7 +148,7 @@
147 148 /*
148 149 * gpio_init needs to be done before
149 150 * machine_init functions access gpio APIs.
150   - * Hence gpio_init is a postcore_initcall.
  151 + * Hence gpio_init is a omap_postcore_initcall.
151 152 */
152 153 static int __init omap2_gpio_init(void)
153 154 {
... ... @@ -157,5 +158,5 @@
157 158  
158 159 return omap_hwmod_for_each_by_class("gpio", omap2_gpio_dev_init, NULL);
159 160 }
160   -postcore_initcall(omap2_gpio_init);
  161 +omap_postcore_initcall(omap2_gpio_init);
arch/arm/mach-omap2/gpmc.c
Diff comments   View file @ 3298a35
... ... @@ -1426,7 +1426,7 @@
1426 1426  
1427 1427 }
1428 1428  
1429   -postcore_initcall(gpmc_init);
  1429 +omap_postcore_initcall(gpmc_init);
1430 1430 module_exit(gpmc_exit);
1431 1431  
1432 1432 static int __init omap_gpmc_init(void)
... ... @@ -1453,7 +1453,7 @@
1453 1453  
1454 1454 return IS_ERR(pdev) ? PTR_ERR(pdev) : 0;
1455 1455 }
1456   -postcore_initcall(omap_gpmc_init);
  1456 +omap_postcore_initcall(omap_gpmc_init);
1457 1457  
1458 1458 static irqreturn_t gpmc_handle_irq(int irq, void *dev)
1459 1459 {
arch/arm/mach-omap2/hdq1w.c
Diff comments   View file @ 3298a35
... ... @@ -27,6 +27,7 @@
27 27 #include <linux/err.h>
28 28 #include <linux/platform_device.h>
29 29  
  30 +#include "soc.h"
30 31 #include "omap_hwmod.h"
31 32 #include "omap_device.h"
32 33 #include "hdq1w.h"
... ... @@ -93,5 +94,5 @@
93 94  
94 95 return 0;
95 96 }
96   -arch_initcall(omap_init_hdq);
  97 +omap_arch_initcall(omap_init_hdq);
arch/arm/mach-omap2/hwspinlock.c
Diff comments   View file @ 3298a35
... ... @@ -21,6 +21,7 @@
21 21 #include <linux/err.h>
22 22 #include <linux/hwspinlock.h>
23 23  
  24 +#include "soc.h"
24 25 #include "omap_hwmod.h"
25 26 #include "omap_device.h"
26 27  
... ... @@ -57,5 +58,5 @@
57 58 return retval;
58 59 }
59 60 /* early board code might need to reserve specific hwspinlock instances */
60   -postcore_initcall(hwspinlocks_init);
  61 +omap_postcore_initcall(hwspinlocks_init);
arch/arm/mach-omap2/i2c.c
Diff comments   View file @ 3298a35
... ... @@ -184,4 +184,10 @@
184 184  
185 185 return PTR_RET(pdev);
186 186 }
  187 +
  188 +static int __init omap_i2c_cmdline(void)
  189 +{
  190 + return omap_register_i2c_bus_cmdline();
  191 +}
  192 +omap_subsys_initcall(omap_i2c_cmdline);
arch/arm/mach-omap2/include/mach/debug-macro.S
View file @ 3298a35
1   -/* arch/arm/mach-omap2/include/mach/debug-macro.S
2   - *
3   - * Debugging macro include header
4   - *
5   - * Copyright (C) 1994-1999 Russell King
6   - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License version 2 as
10   - * published by the Free Software Foundation.
11   - *
12   -*/
13   -
14   -#include <linux/serial_reg.h>
15   -
16   -#include <mach/serial.h>
17   -
18   -#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
19   -
20   - .pushsection .data
21   -omap_uart_phys: .word 0
22   -omap_uart_virt: .word 0
23   -omap_uart_lsr: .word 0
24   - .popsection
25   -
26   - /*
27   - * Note that this code won't work if the bootloader passes
28   - * a wrong machine ID number in r1. To debug, just hardcode
29   - * the desired UART phys and virt addresses temporarily into
30   - * the omap_uart_phys and omap_uart_virt above.
31   - */
32   - .macro addruart, rp, rv, tmp
33   -
34   - /* Use omap_uart_phys/virt if already configured */
35   -10: adr \rp, 99f @ get effective addr of 99f
36   - ldr \rv, [\rp] @ get absolute addr of 99f
37   - sub \rv, \rv, \rp @ offset between the two
38   - ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
39   - sub \tmp, \rp, \rv @ make it effective
40   - ldr \rp, [\tmp, #0] @ omap_uart_phys
41   - ldr \rv, [\tmp, #4] @ omap_uart_virt
42   - cmp \rp, #0 @ is port configured?
43   - cmpne \rv, #0
44   - bne 100f @ already configured
45   -
46   - /* Check the debug UART configuration set in uncompress.h */
47   - mov \rp, pc
48   - ldr \rv, =OMAP_UART_INFO_OFS
49   - and \rp, \rp, #0xff000000
50   - ldr \rp, [\rp, \rv]
51   -
52   - /* Select the UART to use based on the UART1 scratchpad value */
53   - cmp \rp, #0 @ no port configured?
54   - beq 21f @ if none, try to use UART1
55   - cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1
56   - beq 21f @ configure OMAP2/3/4UART1
57   - cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2
58   - beq 22f @ configure OMAP2/3/4UART2
59   - cmp \rp, #OMAP2UART3 @ only on 24xx
60   - beq 23f @ configure OMAP2UART3
61   - cmp \rp, #OMAP3UART3 @ only on 34xx
62   - beq 33f @ configure OMAP3UART3
63   - cmp \rp, #OMAP4UART3 @ only on 44xx/54xx
64   - beq 43f @ configure OMAP4/5UART3
65   - cmp \rp, #OMAP3UART4 @ only on 36xx
66   - beq 34f @ configure OMAP3UART4
67   - cmp \rp, #OMAP4UART4 @ only on 44xx/54xx
68   - beq 44f @ configure OMAP4/5UART4
69   - cmp \rp, #TI81XXUART1 @ ti81Xx UART offsets different
70   - beq 81f @ configure UART1
71   - cmp \rp, #TI81XXUART2 @ ti81Xx UART offsets different
72   - beq 82f @ configure UART2
73   - cmp \rp, #TI81XXUART3 @ ti81Xx UART offsets different
74   - beq 83f @ configure UART3
75   - cmp \rp, #AM33XXUART1 @ AM33XX UART offsets different
76   - beq 84f @ configure UART1
77   - cmp \rp, #ZOOM_UART @ only on zoom2/3
78   - beq 95f @ configure ZOOM_UART
79   -
80   - /* Configure the UART offset from the phys/virt base */
81   -21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4
82   - b 98f
83   -22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4
84   - b 98f
85   -23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE)
86   - b 98f
87   -33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
88   - add \rp, \rp, #0x00fb0000
89   - add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE
90   - b 98f
91   -34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE)
92   - add \rp, \rp, #0x00fb0000
93   - add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE
94   - b 98f
95   -43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE)
96   - b 98f
97   -44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
98   - b 98f
99   -81: mov \rp, #UART_OFFSET(TI81XX_UART1_BASE)
100   - b 98f
101   -82: mov \rp, #UART_OFFSET(TI81XX_UART2_BASE)
102   - b 98f
103   -83: mov \rp, #UART_OFFSET(TI81XX_UART3_BASE)
104   - b 98f
105   -84: ldr \rp, =AM33XX_UART1_BASE
106   - and \rp, \rp, #0x00ffffff
107   - b 97f
108   -95: ldr \rp, =ZOOM_UART_BASE
109   - str \rp, [\tmp, #0] @ omap_uart_phys
110   - ldr \rp, =ZOOM_UART_VIRT
111   - str \rp, [\tmp, #4] @ omap_uart_virt
112   - mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
113   - str \rp, [\tmp, #8] @ omap_uart_lsr
114   - b 10b
115   -
116   - /* AM33XX: Store both phys and virt address for the uart */
117   -97: add \rp, \rp, #0x44000000 @ phys base
118   - str \rp, [\tmp, #0] @ omap_uart_phys
119   - sub \rp, \rp, #0x44000000 @ phys base
120   - add \rp, \rp, #0xf9000000 @ virt base
121   - str \rp, [\tmp, #4] @ omap_uart_virt
122   - mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
123   - str \rp, [\tmp, #8] @ omap_uart_lsr
124   -
125   - b 10b
126   -
127   - /* Store both phys and virt address for the uart */
128   -98: add \rp, \rp, #0x48000000 @ phys base
129   - str \rp, [\tmp, #0] @ omap_uart_phys
130   - sub \rp, \rp, #0x48000000 @ phys base
131   - add \rp, \rp, #0xfa000000 @ virt base
132   - str \rp, [\tmp, #4] @ omap_uart_virt
133   - mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
134   - str \rp, [\tmp, #8] @ omap_uart_lsr
135   -
136   - b 10b
137   -
138   - .align
139   -99: .word .
140   - .word omap_uart_phys
141   - .ltorg
142   -
143   -100: /* Pass the UART_LSR reg address */
144   - ldr \tmp, [\tmp, #8] @ omap_uart_lsr
145   - add \rp, \rp, \tmp
146   - add \rv, \rv, \tmp
147   - .endm
148   -
149   - .macro senduart,rd,rx
150   - orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
151   - bic \rx, \rx, #0xff @ get base (THR) reg address
152   - strb \rd, [\rx] @ send lower byte of rd
153   - orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
154   - bic \rd, \rd, #(0xff << 24) @ restore original rd
155   - .endm
156   -
157   - .macro busyuart,rd,rx
158   -1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
159   - and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
160   - teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
161   - bne 1001b
162   - .endm
163   -
164   - .macro waituart,rd,rx
165   - .endm
arch/arm/mach-omap2/include/mach/serial.h
Diff comments   View file @ 3298a35
... ... @@ -8,20 +8,6 @@
8 8 * GNU General Public License for more details.
9 9 */
10 10  
11   -/*
12   - * Memory entry used for the DEBUG_LL UART configuration, relative to
13   - * start of RAM. See also uncompress.h and debug-macro.S.
14   - *
15   - * Note that using a memory location for storing the UART configuration
16   - * has at least two limitations:
17   - *
18   - * 1. Kernel uncompress code cannot overlap OMAP_UART_INFO as the
19   - * uncompress code could then partially overwrite itself
20   - * 2. We assume printascii is called at least once before paging_init,
21   - * and addruart has a chance to read OMAP_UART_INFO
22   - */
23   -#define OMAP_UART_INFO_OFS 0x3ffc
24   -
25 11 /* OMAP2 serial ports */
26 12 #define OMAP2_UART1_BASE 0x4806a000
27 13 #define OMAP2_UART2_BASE 0x4806c000
... ... @@ -67,29 +53,6 @@
67 53 #define ZOOM_PORT_SHIFT 1
68 54  
69 55 #define OMAP24XX_BASE_BAUD (48000000/16)
70   -
71   -/*
72   - * DEBUG_LL port encoding stored into the UART1 scratchpad register by
73   - * decomp_setup in uncompress.h
74   - */
75   -#define OMAP2UART1 21
76   -#define OMAP2UART2 22
77   -#define OMAP2UART3 23
78   -#define OMAP3UART1 OMAP2UART1
79   -#define OMAP3UART2 OMAP2UART2
80   -#define OMAP3UART3 33
81   -#define OMAP3UART4 34 /* Only on 36xx */
82   -#define OMAP4UART1 OMAP2UART1
83   -#define OMAP4UART2 OMAP2UART2
84   -#define OMAP4UART3 43
85   -#define OMAP4UART4 44
86   -#define TI81XXUART1 81
87   -#define TI81XXUART2 82
88   -#define TI81XXUART3 83
89   -#define AM33XXUART1 84
90   -#define OMAP5UART3 OMAP4UART3
91   -#define OMAP5UART4 OMAP4UART4
92   -#define ZOOM_UART 95 /* Only on zoom2/3 */
93 56  
94 57 #ifndef __ASSEMBLER__
95 58  
arch/arm/mach-omap2/include/mach/uncompress.h
View file @ 3298a35
1   -/*
2   - * arch/arm/plat-omap/include/mach/uncompress.h
3   - *
4   - * Serial port stubs for kernel decompress status messages
5   - *
6   - * Initially based on:
7   - * linux-2.4.15-rmk1-dsplinux1.6/arch/arm/plat-omap/include/mach1510/uncompress.h
8   - * Copyright (C) 2000 RidgeRun, Inc.
9   - * Author: Greg Lonnon <glonnon@ridgerun.com>
10   - *
11   - * Rewritten by:
12   - * Author: <source@mvista.com>
13   - * 2004 (c) MontaVista Software, Inc.
14   - *
15   - * This file is licensed under the terms of the GNU General Public License
16   - * version 2. This program is licensed "as is" without any warranty of any
17   - * kind, whether express or implied.
18   - */
19   -
20   -#include <linux/types.h>
21   -#include <linux/serial_reg.h>
22   -
23   -#include <asm/memory.h>
24   -#include <asm/mach-types.h>
25   -
26   -#include <mach/serial.h>
27   -
28   -#define MDR1_MODE_MASK 0x07
29   -
30   -volatile u8 *uart_base;
31   -int uart_shift;
32   -
33   -/*
34   - * Store the DEBUG_LL uart number into memory.
35   - * See also debug-macro.S, and serial.c for related code.
36   - */
37   -static void set_omap_uart_info(unsigned char port)
38   -{
39   - /*
40   - * Get address of some.bss variable and round it down
41   - * a la CONFIG_AUTO_ZRELADDR.
42   - */
43   - u32 ram_start = (u32)&uart_shift & 0xf8000000;
44   - u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS);
45   - *uart_info = port;
46   -}
47   -
48   -static void putc(int c)
49   -{
50   - if (!uart_base)
51   - return;
52   -
53   - /* Check for UART 16x mode */
54   - if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0)
55   - return;
56   -
57   - while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE))
58   - barrier();
59   - uart_base[UART_TX << uart_shift] = c;
60   -}
61   -
62   -static inline void flush(void)
63   -{
64   -}
65   -
66   -/*
67   - * Macros to configure UART1 and debug UART
68   - */
69   -#define _DEBUG_LL_ENTRY(mach, dbg_uart, dbg_shft, dbg_id) \
70   - if (machine_is_##mach()) { \
71   - uart_base = (volatile u8 *)(dbg_uart); \
72   - uart_shift = (dbg_shft); \
73   - port = (dbg_id); \
74   - set_omap_uart_info(port); \
75   - break; \
76   - }
77   -
78   -#define DEBUG_LL_OMAP2(p, mach) \
79   - _DEBUG_LL_ENTRY(mach, OMAP2_UART##p##_BASE, OMAP_PORT_SHIFT, \
80   - OMAP2UART##p)
81   -
82   -#define DEBUG_LL_OMAP3(p, mach) \
83   - _DEBUG_LL_ENTRY(mach, OMAP3_UART##p##_BASE, OMAP_PORT_SHIFT, \
84   - OMAP3UART##p)
85   -
86   -#define DEBUG_LL_OMAP4(p, mach) \
87   - _DEBUG_LL_ENTRY(mach, OMAP4_UART##p##_BASE, OMAP_PORT_SHIFT, \
88   - OMAP4UART##p)
89   -
90   -#define DEBUG_LL_OMAP5(p, mach) \
91   - _DEBUG_LL_ENTRY(mach, OMAP5_UART##p##_BASE, OMAP_PORT_SHIFT, \
92   - OMAP5UART##p)
93   -/* Zoom2/3 shift is different for UART1 and external port */
94   -#define DEBUG_LL_ZOOM(mach) \
95   - _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
96   -
97   -#define DEBUG_LL_TI81XX(p, mach) \
98   - _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
99   - TI81XXUART##p)
100   -
101   -#define DEBUG_LL_AM33XX(p, mach) \
102   - _DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
103   - AM33XXUART##p)
104   -
105   -static inline void arch_decomp_setup(void)
106   -{
107   - int port = 0;
108   -
109   - /*
110   - * Initialize the port based on the machine ID from the bootloader.
111   - * Note that we're using macros here instead of switch statement
112   - * as machine_is functions are optimized out for the boards that
113   - * are not selected.
114   - */
115   - do {
116   - /* omap2 based boards using UART1 */
117   - DEBUG_LL_OMAP2(1, omap_2430sdp);
118   - DEBUG_LL_OMAP2(1, omap_apollon);
119   - DEBUG_LL_OMAP2(1, omap_h4);
120   -
121   - /* omap2 based boards using UART3 */
122   - DEBUG_LL_OMAP2(3, nokia_n800);
123   - DEBUG_LL_OMAP2(3, nokia_n810);
124   - DEBUG_LL_OMAP2(3, nokia_n810_wimax);
125   -
126   - /* omap3 based boards using UART1 */
127   - DEBUG_LL_OMAP2(1, omap3evm);
128   - DEBUG_LL_OMAP3(1, omap_3430sdp);
129   - DEBUG_LL_OMAP3(1, omap_3630sdp);
130   - DEBUG_LL_OMAP3(1, omap3530_lv_som);
131   - DEBUG_LL_OMAP3(1, omap3_torpedo);
132   -
133   - /* omap3 based boards using UART3 */
134   - DEBUG_LL_OMAP3(3, cm_t35);
135   - DEBUG_LL_OMAP3(3, cm_t3517);
136   - DEBUG_LL_OMAP3(3, cm_t3730);
137   - DEBUG_LL_OMAP3(3, craneboard);
138   - DEBUG_LL_OMAP3(3, devkit8000);
139   - DEBUG_LL_OMAP3(3, igep0020);
140   - DEBUG_LL_OMAP3(3, igep0030);
141   - DEBUG_LL_OMAP3(3, nokia_rm680);
142   - DEBUG_LL_OMAP3(3, nokia_rm696);
143   - DEBUG_LL_OMAP3(3, nokia_rx51);
144   - DEBUG_LL_OMAP3(3, omap3517evm);
145   - DEBUG_LL_OMAP3(3, omap3_beagle);
146   - DEBUG_LL_OMAP3(3, omap3_pandora);
147   - DEBUG_LL_OMAP3(3, omap_ldp);
148   - DEBUG_LL_OMAP3(3, overo);
149   - DEBUG_LL_OMAP3(3, touchbook);
150   -
151   - /* omap4 based boards using UART3 */
152   - DEBUG_LL_OMAP4(3, omap_4430sdp);
153   - DEBUG_LL_OMAP4(3, omap4_panda);
154   -
155   - /* omap5 based boards using UART3 */
156   - DEBUG_LL_OMAP5(3, omap5_sevm);
157   -
158   - /* zoom2/3 external uart */
159   - DEBUG_LL_ZOOM(omap_zoom2);
160   - DEBUG_LL_ZOOM(omap_zoom3);
161   -
162   - /* TI8168 base boards using UART3 */
163   - DEBUG_LL_TI81XX(3, ti8168evm);
164   -
165   - /* TI8148 base boards using UART1 */
166   - DEBUG_LL_TI81XX(1, ti8148evm);
167   -
168   - /* AM33XX base boards using UART1 */
169   - DEBUG_LL_AM33XX(1, am335xevm);
170   - } while (0);
171   -}
arch/arm/mach-omap2/mcbsp.c
Diff comments   View file @ 3298a35
... ... @@ -23,6 +23,7 @@
23 23  
24 24 #include <linux/omap-dma.h>
25 25  
  26 +#include "soc.h"
26 27 #include "omap_device.h"
27 28  
28 29 /*
... ... @@ -118,5 +119,5 @@
118 119  
119 120 return 0;
120 121 }
121   -arch_initcall(omap2_mcbsp_init);
  122 +omap_arch_initcall(omap2_mcbsp_init);
arch/arm/mach-omap2/omap-iommu.c
Diff comments   View file @ 3298a35
... ... @@ -16,6 +16,7 @@
16 16 #include <linux/slab.h>
17 17  
18 18 #include <linux/platform_data/iommu-omap.h>
  19 +#include "soc.h"
19 20 #include "omap_hwmod.h"
20 21 #include "omap_device.h"
21 22  
... ... @@ -61,7 +62,7 @@
61 62 return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL);
62 63 }
63 64 /* must be ready before omap3isp is probed */
64   -subsys_initcall(omap_iommu_init);
  65 +omap_subsys_initcall(omap_iommu_init);
65 66  
66 67 static void __exit omap_iommu_exit(void)
67 68 {
arch/arm/mach-omap2/omap2-restart.c
Diff comments   View file @ 3298a35
... ... @@ -13,6 +13,7 @@
13 13 #include <linux/clk.h>
14 14 #include <linux/io.h>
15 15  
  16 +#include "soc.h"
16 17 #include "common.h"
17 18 #include "prm2xxx.h"
18 19  
... ... @@ -62,5 +63,5 @@
62 63  
63 64 return 0;
64 65 }
65   -core_initcall(omap2xxx_common_look_up_clks_for_reset);
  66 +omap_core_initcall(omap2xxx_common_look_up_clks_for_reset);
arch/arm/mach-omap2/omap4-common.c
Diff comments   View file @ 3298a35
... ... @@ -226,7 +226,7 @@
226 226  
227 227 return 0;
228 228 }
229   -early_initcall(omap_l2_cache_init);
  229 +omap_early_initcall(omap_l2_cache_init);
230 230 #endif
231 231  
232 232 void __iomem *omap4_get_sar_ram_base(void)
... ... @@ -254,7 +254,7 @@
254 254  
255 255 return 0;
256 256 }
257   -early_initcall(omap4_sar_ram_init);
  257 +omap_early_initcall(omap4_sar_ram_init);
258 258  
259 259 void __init omap_gic_of_init(void)
260 260 {
arch/arm/mach-omap2/omap_device.c
Diff comments   View file @ 3298a35
... ... @@ -89,6 +89,7 @@
89 89 #include <linux/of.h>
90 90 #include <linux/notifier.h>
91 91  
  92 +#include "soc.h"
92 93 #include "omap_device.h"
93 94 #include "omap_hwmod.h"
94 95  
... ... @@ -1259,7 +1260,7 @@
1259 1260 bus_register_notifier(&platform_bus_type, &platform_nb);
1260 1261 return 0;
1261 1262 }
1262   -core_initcall(omap_device_init);
  1263 +omap_core_initcall(omap_device_init);
1263 1264  
1264 1265 /**
1265 1266 * omap_device_late_idle - idle devices without drivers
... ... @@ -1297,5 +1298,5 @@
1297 1298 bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
1298 1299 return 0;
1299 1300 }
1300   -late_initcall(omap_device_late_init);
  1301 +omap_late_initcall(omap_device_late_init);
arch/arm/mach-omap2/omap_hwmod.c
Diff comments   View file @ 3298a35
... ... @@ -3303,7 +3303,7 @@
3303 3303  
3304 3304 return 0;
3305 3305 }
3306   -core_initcall(omap_hwmod_setup_all);
  3306 +omap_core_initcall(omap_hwmod_setup_all);
3307 3307  
3308 3308 /**
3309 3309 * omap_hwmod_enable - enable an omap_hwmod
arch/arm/mach-omap2/omap_phy_internal.c
Diff comments   View file @ 3298a35
... ... @@ -63,7 +63,7 @@
63 63  
64 64 return 0;
65 65 }
66   -early_initcall(omap4430_phy_power_down);
  66 +omap_early_initcall(omap4430_phy_power_down);
67 67  
68 68 void am35x_musb_reset(void)
69 69 {
arch/arm/mach-omap2/opp3xxx_data.c
Diff comments   View file @ 3298a35
... ... @@ -168,5 +168,5 @@
168 168  
169 169 return r;
170 170 }
171   -device_initcall(omap3_opp_init);
  171 +omap_device_initcall(omap3_opp_init);
arch/arm/mach-omap2/opp4xxx_data.c
Diff comments   View file @ 3298a35
... ... @@ -177,5 +177,5 @@
177 177 ARRAY_SIZE(omap446x_opp_def_list));
178 178 return r;
179 179 }
180   -device_initcall(omap4_opp_init);
  180 +omap_device_initcall(omap4_opp_init);
arch/arm/mach-omap2/pm-debug.c
Diff comments   View file @ 3298a35
... ... @@ -279,7 +279,7 @@
279 279  
280 280 return 0;
281 281 }
282   -arch_initcall(pm_dbg_init);
  282 +omap_arch_initcall(pm_dbg_init);
283 283  
284 284 #endif
arch/arm/mach-omap2/pm.c
Diff comments   View file @ 3298a35
... ... @@ -336,7 +336,7 @@
336 336  
337 337 return 0;
338 338 }
339   -postcore_initcall(omap2_common_pm_init);
  339 +omap_postcore_initcall(omap2_common_pm_init);
340 340  
341 341 int __init omap2_common_pm_late_init(void)
342 342 {
arch/arm/mach-omap2/pmu.c
Diff comments   View file @ 3298a35
... ... @@ -89,5 +89,5 @@
89 89  
90 90 return omap2_init_pmu(oh_num, oh_names);
91 91 }
92   -subsys_initcall(omap_init_pmu);
  92 +omap_subsys_initcall(omap_init_pmu);
arch/arm/mach-omap2/prm3xxx.c
Diff comments   View file @ 3298a35
... ... @@ -427,7 +427,7 @@
427 427  
428 428 return ret;
429 429 }
430   -subsys_initcall(omap3xxx_prm_late_init);
  430 +omap_subsys_initcall(omap3xxx_prm_late_init);
431 431  
432 432 static void __exit omap3xxx_prm_exit(void)
433 433 {
arch/arm/mach-omap2/prm44xx.c
Diff comments   View file @ 3298a35
... ... @@ -665,7 +665,7 @@
665 665  
666 666 return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
667 667 }
668   -subsys_initcall(omap44xx_prm_late_init);
  668 +omap_subsys_initcall(omap44xx_prm_late_init);
669 669  
670 670 static void __exit omap44xx_prm_exit(void)
671 671 {
arch/arm/mach-omap2/serial.c
Diff comments   View file @ 3298a35
... ... @@ -254,7 +254,7 @@
254 254  
255 255 return 0;
256 256 }
257   -core_initcall(omap_serial_early_init);
  257 +omap_core_initcall(omap_serial_early_init);
258 258  
259 259 /**
260 260 * omap_serial_init_port() - initialize single serial port
arch/arm/mach-omap2/smartreflex-class3.c
Diff comments   View file @ 3298a35
... ... @@ -12,6 +12,7 @@
12 12 */
13 13  
14 14 #include <linux/power/smartreflex.h>
  15 +#include "soc.h"
15 16 #include "voltage.h"
16 17  
17 18 static int sr_class3_enable(struct omap_sr *sr)
... ... @@ -58,5 +59,5 @@
58 59 pr_info("SmartReflex Class3 initialized\n");
59 60 return sr_register_class(&class3_data);
60 61 }
61   -late_initcall(sr_class3_init);
  62 +omap_late_initcall(sr_class3_init);
arch/arm/mach-omap2/soc.h
Diff comments   View file @ 3298a35
... ... @@ -42,6 +42,9 @@
42 42 #undef MULTI_OMAP2
43 43 #undef OMAP_NAME
44 44  
  45 +#ifdef CONFIG_ARCH_MULTIPLATFORM
  46 +#define MULTI_OMAP2
  47 +#endif
45 48 #ifdef CONFIG_SOC_OMAP2420
46 49 # ifdef OMAP_NAME
47 50 # undef MULTI_OMAP2
... ... @@ -112,6 +115,11 @@
112 115 */
113 116 unsigned int omap_rev(void);
114 117  
  118 +static inline int soc_is_omap(void)
  119 +{
  120 + return omap_rev() != 0;
  121 +}
  122 +
115 123 /*
116 124 * Get the CPU revision for OMAP devices
117 125 */
... ... @@ -464,6 +472,27 @@
464 472 } \
465 473  
466 474 OMAP4_HAS_FEATURE(perf_silicon, PERF_SILICON)
  475 +
  476 +/*
  477 + * We need to make sure omap initcalls don't run when
  478 + * multiplatform kernels are booted on other SoCs.
  479 + */
  480 +#define omap_initcall(level, fn) \
  481 +static int __init __used __##fn(void) \
  482 +{ \
  483 + if (!soc_is_omap()) \
  484 + return 0; \
  485 + return fn(); \
  486 +} \
  487 +level(__##fn);
  488 +
  489 +#define omap_early_initcall(fn) omap_initcall(early_initcall, fn)
  490 +#define omap_core_initcall(fn) omap_initcall(core_initcall, fn)
  491 +#define omap_postcore_initcall(fn) omap_initcall(postcore_initcall, fn)
  492 +#define omap_arch_initcall(fn) omap_initcall(arch_initcall, fn)
  493 +#define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
  494 +#define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
  495 +#define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
467 496  
468 497 #endif /* __ASSEMBLY__ */
arch/arm/mach-omap2/timer.c
Diff comments   View file @ 3298a35
... ... @@ -719,7 +719,7 @@
719 719  
720 720 return 0;
721 721 }
722   -arch_initcall(omap2_dm_timer_init);
  722 +omap_arch_initcall(omap2_dm_timer_init);
723 723  
724 724 /**
725 725 * omap2_override_clocksource - clocksource override with user configuration
arch/arm/mach-omap2/wd_timer.c
Diff comments   View file @ 3298a35
... ... @@ -130,5 +130,5 @@
130 130 dev_name, oh->name);
131 131 return 0;
132 132 }
133   -subsys_initcall(omap_init_wdt);
  133 +omap_subsys_initcall(omap_init_wdt);
arch/arm/mach-vt8500/Kconfig
Diff comments   View file @ 3298a35
1 1 config ARCH_VT8500
2   - bool "VIA/WonderMedia 85xx" if ARCH_MULTI_V5
3   - default ARCH_VT8500_SINGLE
  2 + bool
4 3 select ARCH_HAS_CPUFREQ
5 4 select ARCH_REQUIRE_GPIOLIB
6 5 select CLKDEV_LOOKUP
7 6 select CLKSRC_OF
8   - select CPU_ARM926T
9 7 select GENERIC_CLOCKEVENTS
10 8 select HAVE_CLK
11 9 select VT8500_TIMER
12 10 help
13 11 Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  12 +
  13 +config ARCH_WM8505
  14 + bool "VIA/Wondermedia 85xx and WM8650"
  15 + depends on ARCH_MULTI_V5
  16 + select ARCH_VT8500
  17 + select CPU_ARM926T
  18 + help
arch/arm/mach-vt8500/include/mach/debug-macro.S
View file @ 3298a35
1   -/*
2   - * arch/arm/mach-vt8500/include/mach/debug-macro.S
3   - *
4   - * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5   - *
6   - * Debugging macro include header
7   - *
8   - * This program is free software; you can redistribute it and/or modify
9   - * it under the terms of the GNU General Public License version 2 as
10   - * published by the Free Software Foundation.
11   - *
12   -*/
13   -
14   - .macro addruart, rp, rv, tmp
15   - mov \rp, #0x00200000
16   - orr \rv, \rp, #0xf8000000
17   - orr \rp, \rp, #0xd8000000
18   - .endm
19   -
20   - .macro senduart,rd,rx
21   - strb \rd, [\rx, #0]
22   - .endm
23   -
24   - .macro busyuart,rd,rx
25   -1001: ldr \rd, [\rx, #0x1c]
26   - ands \rd, \rd, #0x2
27   - bne 1001b
28   - .endm
29   -
30   - .macro waituart,rd,rx
31   - .endm
arch/arm/mach-vt8500/include/mach/timex.h
View file @ 3298a35
1   -/*
2   - * arch/arm/mach-vt8500/include/mach/timex.h
3   - *
4   - * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
5   - *
6   - * This program is free software; you can redistribute it and/or modify
7   - * it under the terms of the GNU General Public License as published by
8   - * the Free Software Foundation; either version 2 of the License, or
9   - * (at your option) any later version.
10   - *
11   - * This program is distributed in the hope that it will be useful,
12   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
13   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14   - * GNU General Public License for more details.
15   - *
16   - * You should have received a copy of the GNU General Public License
17   - * along with this program; if not, write to the Free Software
18   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19   - */
20   -
21   -#ifndef MACH_TIMEX_H
22   -#define MACH_TIMEX_H
23   -
24   -#define CLOCK_TICK_RATE (3000000)
25   -
26   -#endif /* MACH_TIMEX_H */
arch/arm/mach-vt8500/include/mach/uncompress.h
View file @ 3298a35
1   -/* arch/arm/mach-vt8500/include/mach/uncompress.h
2   - *
3   - * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
4   - *
5   - * Based on arch/arm/mach-dove/include/mach/uncompress.h
6   - *
7   - * This software is licensed under the terms of the GNU General Public
8   - * License version 2, as published by the Free Software Foundation, and
9   - * may be copied, distributed, and modified under those terms.
10   - *
11   - * This program is distributed in the hope that it will be useful,
12   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
13   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14   - * GNU General Public License for more details.
15   - *
16   - */
17   -
18   -#define UART0_PHYS 0xd8200000
19   -#define UART0_ADDR(x) *(volatile unsigned char *)(UART0_PHYS + x)
20   -
21   -static void putc(const char c)
22   -{
23   - while (UART0_ADDR(0x1c) & 0x2)
24   - /* Tx busy, wait and poll */;
25   -
26   - UART0_ADDR(0) = c;
27   -}
28   -
29   -static void flush(void)
30   -{
31   -}
32   -
33   -/*
34   - * nothing to do
35   - */
36   -#define arch_decomp_setup()
arch/arm/plat-omap/Kconfig
Diff comments   View file @ 3298a35
... ... @@ -5,36 +5,6 @@
5 5 config ARCH_OMAP_OTG
6 6 bool
7 7  
8   -choice
9   - prompt "OMAP System Type"
10   - default ARCH_OMAP2PLUS
11   -
12   -config ARCH_OMAP1
13   - bool "TI OMAP1"
14   - select CLKDEV_LOOKUP
15   - select CLKSRC_MMIO
16   - select GENERIC_IRQ_CHIP
17   - select HAVE_IDE
18   - select IRQ_DOMAIN
19   - select NEED_MACH_IO_H if PCCARD
20   - select NEED_MACH_MEMORY_H
21   - help
22   - "Systems based on omap7xx, omap15xx or omap16xx"
23   -
24   -config ARCH_OMAP2PLUS
25   - bool "TI OMAP2/3/4"
26   - select CLKDEV_LOOKUP
27   - select GENERIC_IRQ_CHIP
28   - select OMAP_DM_TIMER
29   - select PINCTRL
30   - select PROC_DEVICETREE if PROC_FS
31   - select SPARSE_IRQ
32   - select USE_OF
33   - help
34   - "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
35   -
36   -endchoice
37   -
38 8 comment "OMAP Feature Selections"
39 9  
40 10 config OMAP_DEBUG_DEVICES
... ... @@ -118,7 +88,7 @@
118 88  
119 89 config OMAP_MBOX_FWK
120 90 tristate "Mailbox framework support"
121   - depends on ARCH_OMAP
  91 + depends on ARCH_OMAP && !ARCH_MULTIPLATFORM
122 92 help
123 93 Say Y here if you want to use OMAP Mailbox framework support for
124 94 DSP, IVA1.0 and IVA2 in OMAP1/2/3.
arch/arm/plat-omap/Makefile
Diff comments   View file @ 3298a35
... ... @@ -2,6 +2,8 @@
2 2 # Makefile for the linux kernel.
3 3 #
4 4  
  5 +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/arch/arm/plat-omap/include
  6 +
5 7 # Common support
6 8 obj-y := sram.o dma.o counter_32k.o
7 9 obj-m :=
arch/arm/plat-omap/i2c.c
Diff comments   View file @ 3298a35
... ... @@ -68,7 +68,7 @@
68 68 * Register busses defined in command line but that are not registered with
69 69 * omap_register_i2c_bus from board initialization code.
70 70 */
71   -static int __init omap_register_i2c_bus_cmdline(void)
  71 +int __init omap_register_i2c_bus_cmdline(void)
72 72 {
73 73 int i, err = 0;
74 74  
... ... @@ -83,7 +83,6 @@
83 83 out:
84 84 return err;
85 85 }
86   -subsys_initcall(omap_register_i2c_bus_cmdline);
87 86  
88 87 /**
89 88 * omap_register_i2c_bus - register I2C bus with device descriptors
arch/arm/plat-omap/include/plat/i2c.h
Diff comments   View file @ 3298a35
... ... @@ -32,10 +32,16 @@
32 32 extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
33 33 struct i2c_board_info const *info,
34 34 unsigned len);
  35 +extern int omap_register_i2c_bus_cmdline(void);
35 36 #else
36 37 static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
37 38 struct i2c_board_info const *info,
38 39 unsigned len)
  40 +{
  41 + return 0;
  42 +}
  43 +
  44 +static inline int omap_register_i2c_bus_cmdline(void)
39 45 {
40 46 return 0;
41 47 }
drivers/crypto/omap-sham.c
Diff comments   View file @ 3298a35
... ... @@ -38,7 +38,10 @@
38 38 #include <crypto/internal/hash.h>
39 39  
40 40 #include <linux/omap-dma.h>
  41 +
  42 +#ifdef CONFIG_ARCH_OMAP1
41 43 #include <mach/irqs.h>
  44 +#endif
42 45  
43 46 #define SHA_REG_DIGEST(x) (0x00 + ((x) * 0x04))
44 47 #define SHA_REG_DIN(x) (0x1C + ((x) * 0x04))
drivers/dma/omap-dma.c
Diff comments   View file @ 3298a35
... ... @@ -661,32 +661,14 @@
661 661 }
662 662 EXPORT_SYMBOL_GPL(omap_dma_filter_fn);
663 663  
664   -static struct platform_device *pdev;
665   -
666   -static const struct platform_device_info omap_dma_dev_info = {
667   - .name = "omap-dma-engine",
668   - .id = -1,
669   - .dma_mask = DMA_BIT_MASK(32),
670   -};
671   -
672 664 static int omap_dma_init(void)
673 665 {
674   - int rc = platform_driver_register(&omap_dma_driver);
675   -
676   - if (rc == 0) {
677   - pdev = platform_device_register_full(&omap_dma_dev_info);
678   - if (IS_ERR(pdev)) {
679   - platform_driver_unregister(&omap_dma_driver);
680   - rc = PTR_ERR(pdev);
681   - }
682   - }
683   - return rc;
  666 + return platform_driver_register(&omap_dma_driver);
684 667 }
685 668 subsys_initcall(omap_dma_init);
686 669  
687 670 static void __exit omap_dma_exit(void)
688 671 {
689   - platform_device_unregister(pdev);
690 672 platform_driver_unregister(&omap_dma_driver);
691 673 }
692 674 module_exit(omap_dma_exit);
drivers/media/platform/davinci/vpss.c
Diff comments   View file @ 3298a35
... ... @@ -25,7 +25,6 @@
25 25 #include <linux/spinlock.h>
26 26 #include <linux/compiler.h>
27 27 #include <linux/io.h>
28   -#include <mach/hardware.h>
29 28 #include <media/davinci/vpss.h>
30 29  
31 30 MODULE_LICENSE("GPL");
drivers/media/rc/Kconfig
Diff comments   View file @ 3298a35
... ... @@ -291,7 +291,7 @@
291 291  
292 292 config IR_RX51
293 293 tristate "Nokia N900 IR transmitter diode"
294   - depends on OMAP_DM_TIMER && LIRC
  294 + depends on OMAP_DM_TIMER && LIRC && !ARCH_MULTIPLATFORM
295 295 ---help---
296 296 Say Y or M here if you want to enable support for the IR
297 297 transmitter diode built in the Nokia N900 (RX51) device.
drivers/net/ethernet/ti/davinci_cpdma.c
Diff comments   View file @ 3298a35
... ... @@ -492,11 +492,13 @@
492 492 spin_unlock_irqrestore(&ctlr->lock, flags);
493 493 return 0;
494 494 }
  495 +EXPORT_SYMBOL_GPL(cpdma_ctlr_int_ctrl);
495 496  
496 497 void cpdma_ctlr_eoi(struct cpdma_ctlr *ctlr, u32 value)
497 498 {
498 499 dma_reg_write(ctlr, CPDMA_MACEOIVECTOR, value);
499 500 }
  501 +EXPORT_SYMBOL_GPL(cpdma_ctlr_eoi);
500 502  
501 503 struct cpdma_chan *cpdma_chan_create(struct cpdma_ctlr *ctlr, int chan_num,
502 504 cpdma_handler_fn handler)
... ... @@ -1028,4 +1030,5 @@
1028 1030 spin_unlock_irqrestore(&ctlr->lock, flags);
1029 1031 return ret;
1030 1032 }
  1033 +EXPORT_SYMBOL_GPL(cpdma_control_set);
drivers/remoteproc/Kconfig
Diff comments   View file @ 3298a35
... ... @@ -12,8 +12,8 @@
12 12 depends on HAS_DMA
13 13 depends on ARCH_OMAP4
14 14 depends on OMAP_IOMMU
  15 + depends on OMAP_MBOX_FWK
15 16 select REMOTEPROC
16   - select OMAP_MBOX_FWK
17 17 select RPMSG
18 18 help
19 19 Say y here to support OMAP's remote processors (dual M3
drivers/staging/tidspbridge/Kconfig
Diff comments   View file @ 3298a35
... ... @@ -4,7 +4,7 @@
4 4  
5 5 menuconfig TIDSPBRIDGE
6 6 tristate "DSP Bridge driver"
7   - depends on ARCH_OMAP3
  7 + depends on ARCH_OMAP3 && !ARCH_MULTIPLATFORM
8 8 select OMAP_MBOX_FWK
9 9 help
10 10 DSP/BIOS Bridge is designed for platforms that contain a GPP and