Eric Lee / smarc-ti-linux-kernel

Download as
Browse Code ยป

Commit 32bf87e3697cf2f730b8fbf47cad903ceef718a2

Authored by Andres Salomon
Committed by Linus Torvalds
1 parent 22af89aa0c
Exists in master and in 20 other branches dlt-processor-sdk-linux-03.00.00.04, newt-ti-linux-3.12.y, processor-sdk-linux-01.00.00, processor-sdk-linux-02.00.01, smarc-ti-linux-3.12.10, smarc-ti-linux-3.12.y, smarc-ti-linux-3.14.y, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.12.y, ti-linux-3.14.y, ti-linux-3.15.y, ti-lsk-linux-4.1.y

x86: geode: MSR cleanup 

This cleans up a few MSR-using drivers in the following manner:
  - Ensures MSRs are all defined in asm/geode.h, rather than in misc
    places
  - Makes the naming consistent; cs553[56] ones begin with MSR_,
    GX-specific ones start with MSR_GX_, and LX-specific ones start
    with MSR_LX_.  Also, make the names match the data sheet.
  - Use MSR names rather than numbers in source code
  - Document the fact that the LX's MSR_PADSEL has the wrong value
    in the data sheet.  That's, uh, good to note.

Signed-off-by: Andres Salomon <dilinger@debian.org>
Acked-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 8 changed files with 32 additions and 31 deletions Side-by-side Diff

arch/x86/kernel/mfgpt_32.c
Diff comments   View file @ 32bf87e
... ... @@ -63,7 +63,7 @@
63 63  
64 64 /* The following udocumented bit resets the MFGPT timers */
65 65 val = 0xFF; dummy = 0;
66   - wrmsr(0x5140002B, val, dummy);
  66 + wrmsr(MSR_MFGPT_SETUP, val, dummy);
67 67 return 1;
68 68 }
69 69 __setup("mfgptfix", mfgpt_fix);
70 70  
71 71  
... ... @@ -127,17 +127,17 @@
127 127 * 6; that is, resets for 7 and 8 will be ignored. Is this
128 128 * a problem? -dilinger
129 129 */
130   - msr = MFGPT_NR_MSR;
  130 + msr = MSR_MFGPT_NR;
131 131 mask = 1 << (timer + 24);
132 132 break;
133 133  
134 134 case MFGPT_EVENT_NMI:
135   - msr = MFGPT_NR_MSR;
  135 + msr = MSR_MFGPT_NR;
136 136 mask = 1 << (timer + shift);
137 137 break;
138 138  
139 139 case MFGPT_EVENT_IRQ:
140   - msr = MFGPT_IRQ_MSR;
  140 + msr = MSR_MFGPT_IRQ;
141 141 mask = 1 << (timer + shift);
142 142 break;
143 143  
drivers/video/geode/display_gx.h
Diff comments   View file @ 32bf87e
... ... @@ -17,7 +17,6 @@
17 17 extern struct geode_dc_ops gx_dc_ops;
18 18  
19 19 /* MSR that tells us if a TFT or CRT is attached */
20   -#define GLD_MSR_CONFIG 0xC0002001
21 20 #define GLD_MSR_CONFIG_DM_FP 0x40
22 21  
23 22 /* Display controller registers */
drivers/video/geode/gxfb_core.c
Diff comments   View file @ 32bf87e
... ... @@ -30,6 +30,7 @@
30 30 #include <linux/fb.h>
31 31 #include <linux/init.h>
32 32 #include <linux/pci.h>
  33 +#include <asm/geode.h>
33 34  
34 35 #include "geodefb.h"
35 36 #include "display_gx.h"
... ... @@ -326,7 +327,7 @@
326 327  
327 328 /* Figure out if this is a TFT or CRT part */
328 329  
329   - rdmsrl(GLD_MSR_CONFIG, val);
  330 + rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
330 331  
331 332 if ((val & GLD_MSR_CONFIG_DM_FP) == GLD_MSR_CONFIG_DM_FP)
332 333 par->enable_crt = 0;
drivers/video/geode/lxfb.h
Diff comments   View file @ 32bf87e
... ... @@ -31,14 +31,6 @@
31 31  
32 32 /* MSRS */
33 33  
34   -#define MSR_LX_GLD_CONFIG 0x48002001
35   -#define MSR_LX_GLCP_DOTPLL 0x4c000015
36   -#define MSR_LX_DF_PADSEL 0x48002011
37   -#define MSR_LX_DC_SPARE 0x80000011
38   -#define MSR_LX_DF_GLCONFIG 0x48002001
39   -
40   -#define MSR_LX_GLIU0_P2D_RO0 0x10000029
41   -
42 34 #define GLCP_DOTPLL_RESET (1 << 0)
43 35 #define GLCP_DOTPLL_BYPASS (1 << 15)
44 36 #define GLCP_DOTPLL_HALFPIX (1 << 24)
drivers/video/geode/lxfb_ops.c
Diff comments   View file @ 32bf87e
... ... @@ -13,6 +13,7 @@
13 13 #include <linux/fb.h>
14 14 #include <linux/uaccess.h>
15 15 #include <linux/delay.h>
  16 +#include <asm/geode.h>
16 17  
17 18 #include "lxfb.h"
18 19  
... ... @@ -101,7 +102,7 @@
101 102 u32 dotpll_lo, dotpll_hi;
102 103 int i;
103 104  
104   - rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
  105 + rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
105 106  
106 107 if ((dotpll_lo & GLCP_DOTPLL_LOCK) && (dotpll_hi == pllval))
107 108 return;
... ... @@ -110,7 +111,7 @@
110 111 dotpll_lo &= ~(GLCP_DOTPLL_BYPASS | GLCP_DOTPLL_HALFPIX);
111 112 dotpll_lo |= GLCP_DOTPLL_RESET;
112 113  
113   - wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
  114 + wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
114 115  
115 116 /* Wait 100us for the PLL to lock */
116 117  
... ... @@ -119,7 +120,7 @@
119 120 /* Now, loop for the lock bit */
120 121  
121 122 for (i = 0; i < 1000; i++) {
122   - rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
  123 + rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
123 124 if (dotpll_lo & GLCP_DOTPLL_LOCK)
124 125 break;
125 126 }
... ... @@ -127,7 +128,7 @@
127 128 /* Clear the reset bit */
128 129  
129 130 dotpll_lo &= ~GLCP_DOTPLL_RESET;
130   - wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
  131 + wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
131 132 }
132 133  
133 134 /* Set the clock based on the frequency specified by the current mode */
... ... @@ -255,7 +256,7 @@
255 256 msrlo = DF_DEFAULT_TFT_PAD_SEL_LOW;
256 257 msrhi = DF_DEFAULT_TFT_PAD_SEL_HIGH;
257 258  
258   - wrmsr(MSR_LX_DF_PADSEL, msrlo, msrhi);
  259 + wrmsr(MSR_LX_MSR_PADSEL, msrlo, msrhi);
259 260 }
260 261  
261 262 if (par->output & OUTPUT_CRT) {
... ... @@ -321,7 +322,7 @@
321 322  
322 323 /* Set output mode */
323 324  
324   - rdmsrl(MSR_LX_DF_GLCONFIG, msrval);
  325 + rdmsrl(MSR_LX_GLD_MSR_CONFIG, msrval);
325 326 msrval &= ~DF_CONFIG_OUTPUT_MASK;
326 327  
327 328 if (par->output & OUTPUT_PANEL) {
... ... @@ -335,7 +336,7 @@
335 336 msrval |= DF_OUTPUT_CRT;
336 337 }
337 338  
338   - wrmsrl(MSR_LX_DF_GLCONFIG, msrval);
  339 + wrmsrl(MSR_LX_GLD_MSR_CONFIG, msrval);
339 340  
340 341 /* Clear the various buffers */
341 342 /* FIXME: Adjust for panning here */
342 343  
... ... @@ -383,13 +384,13 @@
383 384  
384 385 /* Set default watermark values */
385 386  
386   - rdmsrl(MSR_LX_DC_SPARE, msrval);
  387 + rdmsrl(MSR_LX_SPARE_MSR, msrval);
387 388  
388 389 msrval &= ~(DC_SPARE_DISABLE_CFIFO_HGO | DC_SPARE_VFIFO_ARB_SELECT |
389 390 DC_SPARE_LOAD_WM_LPEN_MASK | DC_SPARE_WM_LPEN_OVRD |
390 391 DC_SPARE_DISABLE_INIT_VID_PRI | DC_SPARE_DISABLE_VFIFO_WM);
391 392 msrval |= DC_SPARE_DISABLE_VFIFO_WM | DC_SPARE_DISABLE_INIT_VID_PRI;
392   - wrmsrl(MSR_LX_DC_SPARE, msrval);
  393 + wrmsrl(MSR_LX_SPARE_MSR, msrval);
393 394  
394 395 gcfg = DC_GCFG_DFLE; /* Display fifo enable */
395 396 gcfg |= 0xB600; /* Set default priority */
drivers/video/geode/video_gx.c
Diff comments   View file @ 32bf87e
... ... @@ -16,6 +16,7 @@
16 16 #include <asm/io.h>
17 17 #include <asm/delay.h>
18 18 #include <asm/msr.h>
  19 +#include <asm/geode.h>
19 20  
20 21 #include "geodefb.h"
21 22 #include "video_gx.h"
22 23  
... ... @@ -184,10 +185,10 @@
184 185  
185 186 /* Set up the DF pad select MSR */
186 187  
187   - rdmsrl(GX_VP_MSR_PAD_SELECT, val);
  188 + rdmsrl(MSR_GX_MSR_PADSEL, val);
188 189 val &= ~GX_VP_PAD_SELECT_MASK;
189 190 val |= GX_VP_PAD_SELECT_TFT;
190   - wrmsrl(GX_VP_MSR_PAD_SELECT, val);
  191 + wrmsrl(MSR_GX_MSR_PADSEL, val);
191 192  
192 193 /* Turn off the panel */
193 194  
drivers/video/geode/video_gx.h
Diff comments   View file @ 32bf87e
... ... @@ -14,7 +14,6 @@
14 14 extern struct geode_vid_ops gx_vid_ops;
15 15  
16 16 /* GX Flatpanel control MSR */
17   -#define GX_VP_MSR_PAD_SELECT 0xC0002011
18 17 #define GX_VP_PAD_SELECT_MASK 0x3FFFFFFF
19 18 #define GX_VP_PAD_SELECT_TFT 0x1FFFFFFF
20 19  
21 20  
... ... @@ -59,12 +58,10 @@
59 58  
60 59 /* Geode GX clock control MSRs */
61 60  
62   -#define MSR_GLCP_SYS_RSTPLL 0x4c000014
63 61 # define MSR_GLCP_SYS_RSTPLL_DOTPREDIV2 (0x0000000000000002ull)
64 62 # define MSR_GLCP_SYS_RSTPLL_DOTPREMULT2 (0x0000000000000004ull)
65 63 # define MSR_GLCP_SYS_RSTPLL_DOTPOSTDIV3 (0x0000000000000008ull)
66 64  
67   -#define MSR_GLCP_DOTPLL 0x4c000015
68 65 # define MSR_GLCP_DOTPLL_DOTRESET (0x0000000000000001ull)
69 66 # define MSR_GLCP_DOTPLL_BYPASS (0x0000000000008000ull)
70 67 # define MSR_GLCP_DOTPLL_LOCK (0x0000000002000000ull)
include/asm-x86/geode.h
Diff comments   View file @ 32bf87e
... ... @@ -30,7 +30,11 @@
30 30  
31 31 /* MSRS */
32 32  
33   -#define GX_GLCP_SYS_RSTPLL 0x4C000014
  33 +#define MSR_LX_GLD_MSR_CONFIG 0x48002001
  34 +#define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
  35 + * sheet has the wrong value */
  36 +#define MSR_GLCP_SYS_RSTPLL 0x4C000014
  37 +#define MSR_GLCP_DOTPLL 0x4C000015
34 38  
35 39 #define MSR_LBAR_SMB 0x5140000B
36 40 #define MSR_LBAR_GPIO 0x5140000C
... ... @@ -45,8 +49,14 @@
45 49 #define MSR_PIC_ZSEL_LOW 0x51400022
46 50 #define MSR_PIC_ZSEL_HIGH 0x51400023
47 51  
48   -#define MFGPT_IRQ_MSR 0x51400028
49   -#define MFGPT_NR_MSR 0x51400029
  52 +#define MSR_MFGPT_IRQ 0x51400028
  53 +#define MSR_MFGPT_NR 0x51400029
  54 +#define MSR_MFGPT_SETUP 0x5140002B
  55 +
  56 +#define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
  57 +
  58 +#define MSR_GX_GLD_MSR_CONFIG 0xC0002001
  59 +#define MSR_GX_MSR_PADSEL 0xC0002011
50 60  
51 61 /* Resource Sizes */
52 62