Commit 373a3cf744c774478f44921c50011b896ab08f9d
1 parent
2f551c8456
Exists in
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20 other branches
drm/i915: call drm_encoder_init first
Later initialisation of the encoder often requires that drm_encoder_init() has already been called, for instance, initialiasing the DDC buses. Yet another recent regression, as 819f3fb7 depended upon these fixes which I missed when cherry-picking. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Showing 4 changed files with 18 additions and 12 deletions Side-by-side Diff
drivers/gpu/drm/i915/intel_crt.c
... | ... | @@ -548,6 +548,10 @@ |
548 | 548 | if (!intel_encoder->ddc_bus) { |
549 | 549 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
550 | 550 | "failed.\n"); |
551 | + drm_connector_cleanup(&intel_connector->base); | |
552 | + kfree(intel_connector); | |
553 | + drm_encoder_cleanup(&intel_encoder->base); | |
554 | + kfree(intel_encoder); | |
551 | 555 | return; |
552 | 556 | } |
553 | 557 |
drivers/gpu/drm/i915/intel_dvo.c
... | ... | @@ -360,6 +360,8 @@ |
360 | 360 | } |
361 | 361 | |
362 | 362 | intel_encoder = &intel_dvo->base; |
363 | + drm_encoder_init(dev, &intel_encoder->base, | |
364 | + &intel_dvo_enc_funcs, encoder_type); | |
363 | 365 | |
364 | 366 | /* Set up the DDC bus */ |
365 | 367 | intel_encoder->ddc_bus = intel_i2c_create(intel_encoder, |
... | ... | @@ -428,8 +430,6 @@ |
428 | 430 | connector->interlace_allowed = false; |
429 | 431 | connector->doublescan_allowed = false; |
430 | 432 | |
431 | - drm_encoder_init(dev, &intel_encoder->base, | |
432 | - &intel_dvo_enc_funcs, encoder_type); | |
433 | 433 | drm_encoder_helper_add(&intel_encoder->base, |
434 | 434 | &intel_dvo_helper_funcs); |
435 | 435 | |
... | ... | @@ -456,6 +456,7 @@ |
456 | 456 | if (i2cbus != NULL) |
457 | 457 | intel_i2c_destroy(i2cbus); |
458 | 458 | free_intel: |
459 | + drm_encoder_cleanup(&intel_encoder->base); | |
459 | 460 | kfree(intel_dvo); |
460 | 461 | kfree(intel_connector); |
461 | 462 | } |
drivers/gpu/drm/i915/intel_hdmi.c
... | ... | @@ -228,6 +228,9 @@ |
228 | 228 | } |
229 | 229 | |
230 | 230 | intel_encoder = &intel_hdmi->base; |
231 | + drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, | |
232 | + DRM_MODE_ENCODER_TMDS); | |
233 | + | |
231 | 234 | connector = &intel_connector->base; |
232 | 235 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
233 | 236 | DRM_MODE_CONNECTOR_HDMIA); |
... | ... | @@ -272,8 +275,6 @@ |
272 | 275 | |
273 | 276 | intel_hdmi->sdvox_reg = sdvox_reg; |
274 | 277 | |
275 | - drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, | |
276 | - DRM_MODE_ENCODER_TMDS); | |
277 | 278 | drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs); |
278 | 279 | |
279 | 280 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
... | ... | @@ -291,6 +292,7 @@ |
291 | 292 | return; |
292 | 293 | |
293 | 294 | err_connector: |
295 | + drm_encoder_cleanup(&intel_encoder->base); | |
294 | 296 | drm_connector_cleanup(connector); |
295 | 297 | kfree(intel_hdmi); |
296 | 298 | kfree(intel_connector); |
drivers/gpu/drm/i915/intel_sdvo.c
... | ... | @@ -2552,6 +2552,8 @@ |
2552 | 2552 | |
2553 | 2553 | intel_encoder = &intel_sdvo->base; |
2554 | 2554 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2555 | + /* encoder type will be decided later */ | |
2556 | + drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); | |
2555 | 2557 | |
2556 | 2558 | if (HAS_PCH_SPLIT(dev)) { |
2557 | 2559 | i2c_reg = PCH_GPIOE; |
2558 | 2560 | |
2559 | 2561 | |
2560 | 2562 | |
2561 | 2563 | |
... | ... | @@ -2606,31 +2608,29 @@ |
2606 | 2608 | /* Wrap with our custom algo which switches to DDC mode */ |
2607 | 2609 | intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; |
2608 | 2610 | |
2609 | - /* encoder type will be decided later */ | |
2610 | - drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0); | |
2611 | 2611 | drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs); |
2612 | 2612 | |
2613 | 2613 | /* In default case sdvo lvds is false */ |
2614 | 2614 | if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps)) |
2615 | - goto err_enc; | |
2615 | + goto err_i2c; | |
2616 | 2616 | |
2617 | 2617 | if (intel_sdvo_output_setup(intel_sdvo, |
2618 | 2618 | intel_sdvo->caps.output_flags) != true) { |
2619 | 2619 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", |
2620 | 2620 | IS_SDVOB(sdvo_reg) ? 'B' : 'C'); |
2621 | - goto err_enc; | |
2621 | + goto err_i2c; | |
2622 | 2622 | } |
2623 | 2623 | |
2624 | 2624 | intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg); |
2625 | 2625 | |
2626 | 2626 | /* Set the input timing to the screen. Assume always input 0. */ |
2627 | 2627 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2628 | - goto err_enc; | |
2628 | + goto err_i2c; | |
2629 | 2629 | |
2630 | 2630 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2631 | 2631 | &intel_sdvo->pixel_clock_min, |
2632 | 2632 | &intel_sdvo->pixel_clock_max)) |
2633 | - goto err_enc; | |
2633 | + goto err_i2c; | |
2634 | 2634 | |
2635 | 2635 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2636 | 2636 | "clock range %dMHz - %dMHz, " |
2637 | 2637 | |
... | ... | @@ -2650,14 +2650,13 @@ |
2650 | 2650 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2651 | 2651 | return true; |
2652 | 2652 | |
2653 | -err_enc: | |
2654 | - drm_encoder_cleanup(&intel_encoder->base); | |
2655 | 2653 | err_i2c: |
2656 | 2654 | if (intel_encoder->ddc_bus != NULL) |
2657 | 2655 | intel_i2c_destroy(intel_encoder->ddc_bus); |
2658 | 2656 | if (intel_encoder->i2c_bus != NULL) |
2659 | 2657 | intel_i2c_destroy(intel_encoder->i2c_bus); |
2660 | 2658 | err_inteloutput: |
2659 | + drm_encoder_cleanup(&intel_encoder->base); | |
2661 | 2660 | kfree(intel_sdvo); |
2662 | 2661 | |
2663 | 2662 | return false; |