Eric Lee / smarc-ti-linux-kernel

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Commit 3c5dafe43d1e36b70606d3baef8d7f24c0883343

Authored by Andy Shevchenko
Committed by Greg Kroah-Hartman
1 parent 1401ebda89
Exists in smarct4x-processor-sdk-linux-03.00.00.04 and in 2 other branches dlt-processor-sdk-linux-03.00.00.04, smarct3x-processor-sdk-linux-03.00.00.04

serial: 8250_mid: use proper bar for DNV platform 

commit 107e15fc1f8d6ef69eac5f175971252f76e82f0d upstream.

Unlike Intel Medfield and Tangier platforms DNV uses PCI BAR0 for IO compatible
resources and BAR1 for MMIO. We need latter in a way to support DMA. Introduce
an additional field in the internal structure and pass PCI BAR based on device
ID.

Reported-by: "Lai, Poey Seng" <poey.seng.lai@intel.com>
Fixes: 6ede6dcd87aa ("serial: 8250_mid: add support for DMA engine handling from UART MMIO")
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 11 additions and 3 deletions Inline Diff

drivers/tty/serial/8250/8250_mid.c
Diff comments   View file @ 3c5dafe
1 /* 1 /*
2 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs 2 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
3 * 3 *
4 * Copyright (C) 2015 Intel Corporation 4 * Copyright (C) 2015 Intel Corporation
5 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com> 5 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12 #include <linux/rational.h> 12 #include <linux/rational.h>
13 #include <linux/module.h> 13 #include <linux/module.h>
14 #include <linux/pci.h> 14 #include <linux/pci.h>
15 15
16 #include <linux/dma/hsu.h> 16 #include <linux/dma/hsu.h>
17 #include <linux/8250_pci.h>
17 18
18 #include "8250.h" 19 #include "8250.h"
19 20
20 #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b 21 #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
21 #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c 22 #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
22 #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d 23 #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
23 #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191 24 #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
24 #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8 25 #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
25 26
26 /* Intel MID Specific registers */ 27 /* Intel MID Specific registers */
27 #define INTEL_MID_UART_PS 0x30 28 #define INTEL_MID_UART_PS 0x30
28 #define INTEL_MID_UART_MUL 0x34 29 #define INTEL_MID_UART_MUL 0x34
29 #define INTEL_MID_UART_DIV 0x38 30 #define INTEL_MID_UART_DIV 0x38
30 31
31 struct mid8250; 32 struct mid8250;
32 33
33 struct mid8250_board { 34 struct mid8250_board {
35 unsigned int flags;
34 unsigned long freq; 36 unsigned long freq;
35 unsigned int base_baud; 37 unsigned int base_baud;
36 int (*setup)(struct mid8250 *, struct uart_port *p); 38 int (*setup)(struct mid8250 *, struct uart_port *p);
37 void (*exit)(struct mid8250 *); 39 void (*exit)(struct mid8250 *);
38 }; 40 };
39 41
40 struct mid8250 { 42 struct mid8250 {
41 int line; 43 int line;
42 int dma_index; 44 int dma_index;
43 struct pci_dev *dma_dev; 45 struct pci_dev *dma_dev;
44 struct uart_8250_dma dma; 46 struct uart_8250_dma dma;
45 struct mid8250_board *board; 47 struct mid8250_board *board;
46 struct hsu_dma_chip dma_chip; 48 struct hsu_dma_chip dma_chip;
47 }; 49 };
48 50
49 /*****************************************************************************/ 51 /*****************************************************************************/
50 52
51 static int pnw_setup(struct mid8250 *mid, struct uart_port *p) 53 static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
52 { 54 {
53 struct pci_dev *pdev = to_pci_dev(p->dev); 55 struct pci_dev *pdev = to_pci_dev(p->dev);
54 56
55 switch (pdev->device) { 57 switch (pdev->device) {
56 case PCI_DEVICE_ID_INTEL_PNW_UART1: 58 case PCI_DEVICE_ID_INTEL_PNW_UART1:
57 mid->dma_index = 0; 59 mid->dma_index = 0;
58 break; 60 break;
59 case PCI_DEVICE_ID_INTEL_PNW_UART2: 61 case PCI_DEVICE_ID_INTEL_PNW_UART2:
60 mid->dma_index = 1; 62 mid->dma_index = 1;
61 break; 63 break;
62 case PCI_DEVICE_ID_INTEL_PNW_UART3: 64 case PCI_DEVICE_ID_INTEL_PNW_UART3:
63 mid->dma_index = 2; 65 mid->dma_index = 2;
64 break; 66 break;
65 default: 67 default:
66 return -EINVAL; 68 return -EINVAL;
67 } 69 }
68 70
69 mid->dma_dev = pci_get_slot(pdev->bus, 71 mid->dma_dev = pci_get_slot(pdev->bus,
70 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3)); 72 PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
71 return 0; 73 return 0;
72 } 74 }
73 75
74 static int tng_setup(struct mid8250 *mid, struct uart_port *p) 76 static int tng_setup(struct mid8250 *mid, struct uart_port *p)
75 { 77 {
76 struct pci_dev *pdev = to_pci_dev(p->dev); 78 struct pci_dev *pdev = to_pci_dev(p->dev);
77 int index = PCI_FUNC(pdev->devfn); 79 int index = PCI_FUNC(pdev->devfn);
78 80
79 /* Currently no support for HSU port0 */ 81 /* Currently no support for HSU port0 */
80 if (index-- == 0) 82 if (index-- == 0)
81 return -ENODEV; 83 return -ENODEV;
82 84
83 mid->dma_index = index; 85 mid->dma_index = index;
84 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0)); 86 mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
85 return 0; 87 return 0;
86 } 88 }
87 89
88 static int dnv_handle_irq(struct uart_port *p) 90 static int dnv_handle_irq(struct uart_port *p)
89 { 91 {
90 struct mid8250 *mid = p->private_data; 92 struct mid8250 *mid = p->private_data;
91 int ret; 93 int ret;
92 94
93 ret = hsu_dma_irq(&mid->dma_chip, 0); 95 ret = hsu_dma_irq(&mid->dma_chip, 0);
94 ret |= hsu_dma_irq(&mid->dma_chip, 1); 96 ret |= hsu_dma_irq(&mid->dma_chip, 1);
95 97
96 /* For now, letting the HW generate separate interrupt for the UART */ 98 /* For now, letting the HW generate separate interrupt for the UART */
97 if (ret) 99 if (ret)
98 return ret; 100 return ret;
99 101
100 return serial8250_handle_irq(p, serial_port_in(p, UART_IIR)); 102 return serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
101 } 103 }
102 104
103 #define DNV_DMA_CHAN_OFFSET 0x80 105 #define DNV_DMA_CHAN_OFFSET 0x80
104 106
105 static int dnv_setup(struct mid8250 *mid, struct uart_port *p) 107 static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
106 { 108 {
107 struct hsu_dma_chip *chip = &mid->dma_chip; 109 struct hsu_dma_chip *chip = &mid->dma_chip;
108 struct pci_dev *pdev = to_pci_dev(p->dev); 110 struct pci_dev *pdev = to_pci_dev(p->dev);
111 unsigned int bar = FL_GET_BASE(mid->board->flags);
109 int ret; 112 int ret;
110 113
111 chip->dev = &pdev->dev; 114 chip->dev = &pdev->dev;
112 chip->irq = pdev->irq; 115 chip->irq = pdev->irq;
113 chip->regs = p->membase; 116 chip->regs = p->membase;
114 chip->length = pci_resource_len(pdev, 0); 117 chip->length = pci_resource_len(pdev, bar);
115 chip->offset = DNV_DMA_CHAN_OFFSET; 118 chip->offset = DNV_DMA_CHAN_OFFSET;
116 119
117 /* Falling back to PIO mode if DMA probing fails */ 120 /* Falling back to PIO mode if DMA probing fails */
118 ret = hsu_dma_probe(chip); 121 ret = hsu_dma_probe(chip);
119 if (ret) 122 if (ret)
120 return 0; 123 return 0;
121 124
122 mid->dma_dev = pdev; 125 mid->dma_dev = pdev;
123 126
124 p->handle_irq = dnv_handle_irq; 127 p->handle_irq = dnv_handle_irq;
125 return 0; 128 return 0;
126 } 129 }
127 130
128 static void dnv_exit(struct mid8250 *mid) 131 static void dnv_exit(struct mid8250 *mid)
129 { 132 {
130 if (!mid->dma_dev) 133 if (!mid->dma_dev)
131 return; 134 return;
132 hsu_dma_remove(&mid->dma_chip); 135 hsu_dma_remove(&mid->dma_chip);
133 } 136 }
134 137
135 /*****************************************************************************/ 138 /*****************************************************************************/
136 139
137 static void mid8250_set_termios(struct uart_port *p, 140 static void mid8250_set_termios(struct uart_port *p,
138 struct ktermios *termios, 141 struct ktermios *termios,
139 struct ktermios *old) 142 struct ktermios *old)
140 { 143 {
141 unsigned int baud = tty_termios_baud_rate(termios); 144 unsigned int baud = tty_termios_baud_rate(termios);
142 struct mid8250 *mid = p->private_data; 145 struct mid8250 *mid = p->private_data;
143 unsigned short ps = 16; 146 unsigned short ps = 16;
144 unsigned long fuart = baud * ps; 147 unsigned long fuart = baud * ps;
145 unsigned long w = BIT(24) - 1; 148 unsigned long w = BIT(24) - 1;
146 unsigned long mul, div; 149 unsigned long mul, div;
147 150
148 if (mid->board->freq < fuart) { 151 if (mid->board->freq < fuart) {
149 /* Find prescaler value that satisfies Fuart < Fref */ 152 /* Find prescaler value that satisfies Fuart < Fref */
150 if (mid->board->freq > baud) 153 if (mid->board->freq > baud)
151 ps = mid->board->freq / baud; /* baud rate too high */ 154 ps = mid->board->freq / baud; /* baud rate too high */
152 else 155 else
153 ps = 1; /* PLL case */ 156 ps = 1; /* PLL case */
154 fuart = baud * ps; 157 fuart = baud * ps;
155 } else { 158 } else {
156 /* Get Fuart closer to Fref */ 159 /* Get Fuart closer to Fref */
157 fuart *= rounddown_pow_of_two(mid->board->freq / fuart); 160 fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
158 } 161 }
159 162
160 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div); 163 rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
161 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */ 164 p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
162 165
163 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */ 166 writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
164 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */ 167 writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
165 writel(div, p->membase + INTEL_MID_UART_DIV); 168 writel(div, p->membase + INTEL_MID_UART_DIV);
166 169
167 serial8250_do_set_termios(p, termios, old); 170 serial8250_do_set_termios(p, termios, old);
168 } 171 }
169 172
170 static bool mid8250_dma_filter(struct dma_chan *chan, void *param) 173 static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
171 { 174 {
172 struct hsu_dma_slave *s = param; 175 struct hsu_dma_slave *s = param;
173 176
174 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id) 177 if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
175 return false; 178 return false;
176 179
177 chan->private = s; 180 chan->private = s;
178 return true; 181 return true;
179 } 182 }
180 183
181 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port) 184 static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
182 { 185 {
183 struct uart_8250_dma *dma = &mid->dma; 186 struct uart_8250_dma *dma = &mid->dma;
184 struct device *dev = port->port.dev; 187 struct device *dev = port->port.dev;
185 struct hsu_dma_slave *rx_param; 188 struct hsu_dma_slave *rx_param;
186 struct hsu_dma_slave *tx_param; 189 struct hsu_dma_slave *tx_param;
187 190
188 if (!mid->dma_dev) 191 if (!mid->dma_dev)
189 return 0; 192 return 0;
190 193
191 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL); 194 rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
192 if (!rx_param) 195 if (!rx_param)
193 return -ENOMEM; 196 return -ENOMEM;
194 197
195 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL); 198 tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
196 if (!tx_param) 199 if (!tx_param)
197 return -ENOMEM; 200 return -ENOMEM;
198 201
199 rx_param->chan_id = mid->dma_index * 2 + 1; 202 rx_param->chan_id = mid->dma_index * 2 + 1;
200 tx_param->chan_id = mid->dma_index * 2; 203 tx_param->chan_id = mid->dma_index * 2;
201 204
202 dma->rxconf.src_maxburst = 64; 205 dma->rxconf.src_maxburst = 64;
203 dma->txconf.dst_maxburst = 64; 206 dma->txconf.dst_maxburst = 64;
204 207
205 rx_param->dma_dev = &mid->dma_dev->dev; 208 rx_param->dma_dev = &mid->dma_dev->dev;
206 tx_param->dma_dev = &mid->dma_dev->dev; 209 tx_param->dma_dev = &mid->dma_dev->dev;
207 210
208 dma->fn = mid8250_dma_filter; 211 dma->fn = mid8250_dma_filter;
209 dma->rx_param = rx_param; 212 dma->rx_param = rx_param;
210 dma->tx_param = tx_param; 213 dma->tx_param = tx_param;
211 214
212 port->dma = dma; 215 port->dma = dma;
213 return 0; 216 return 0;
214 } 217 }
215 218
216 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id) 219 static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
217 { 220 {
218 struct uart_8250_port uart; 221 struct uart_8250_port uart;
219 struct mid8250 *mid; 222 struct mid8250 *mid;
223 unsigned int bar;
220 int ret; 224 int ret;
221 225
222 ret = pcim_enable_device(pdev); 226 ret = pcim_enable_device(pdev);
223 if (ret) 227 if (ret)
224 return ret; 228 return ret;
225 229
226 pci_set_master(pdev); 230 pci_set_master(pdev);
227 231
228 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL); 232 mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
229 if (!mid) 233 if (!mid)
230 return -ENOMEM; 234 return -ENOMEM;
231 235
232 mid->board = (struct mid8250_board *)id->driver_data; 236 mid->board = (struct mid8250_board *)id->driver_data;
237 bar = FL_GET_BASE(mid->board->flags);
233 238
234 memset(&uart, 0, sizeof(struct uart_8250_port)); 239 memset(&uart, 0, sizeof(struct uart_8250_port));
235 240
236 uart.port.dev = &pdev->dev; 241 uart.port.dev = &pdev->dev;
237 uart.port.irq = pdev->irq; 242 uart.port.irq = pdev->irq;
238 uart.port.private_data = mid; 243 uart.port.private_data = mid;
239 uart.port.type = PORT_16750; 244 uart.port.type = PORT_16750;
240 uart.port.iotype = UPIO_MEM; 245 uart.port.iotype = UPIO_MEM;
241 uart.port.uartclk = mid->board->base_baud * 16; 246 uart.port.uartclk = mid->board->base_baud * 16;
242 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; 247 uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
243 uart.port.set_termios = mid8250_set_termios; 248 uart.port.set_termios = mid8250_set_termios;
244 249
245 uart.port.mapbase = pci_resource_start(pdev, 0); 250 uart.port.mapbase = pci_resource_start(pdev, bar);
246 uart.port.membase = pcim_iomap(pdev, 0, 0); 251 uart.port.membase = pcim_iomap(pdev, bar, 0);
247 if (!uart.port.membase) 252 if (!uart.port.membase)
248 return -ENOMEM; 253 return -ENOMEM;
249 254
250 if (mid->board->setup) { 255 if (mid->board->setup) {
251 ret = mid->board->setup(mid, &uart.port); 256 ret = mid->board->setup(mid, &uart.port);
252 if (ret) 257 if (ret)
253 return ret; 258 return ret;
254 } 259 }
255 260
256 ret = mid8250_dma_setup(mid, &uart); 261 ret = mid8250_dma_setup(mid, &uart);
257 if (ret) 262 if (ret)
258 goto err; 263 goto err;
259 264
260 ret = serial8250_register_8250_port(&uart); 265 ret = serial8250_register_8250_port(&uart);
261 if (ret < 0) 266 if (ret < 0)
262 goto err; 267 goto err;
263 268
264 mid->line = ret; 269 mid->line = ret;
265 270
266 pci_set_drvdata(pdev, mid); 271 pci_set_drvdata(pdev, mid);
267 return 0; 272 return 0;
268 err: 273 err:
269 if (mid->board->exit) 274 if (mid->board->exit)
270 mid->board->exit(mid); 275 mid->board->exit(mid);
271 return ret; 276 return ret;
272 } 277 }
273 278
274 static void mid8250_remove(struct pci_dev *pdev) 279 static void mid8250_remove(struct pci_dev *pdev)
275 { 280 {
276 struct mid8250 *mid = pci_get_drvdata(pdev); 281 struct mid8250 *mid = pci_get_drvdata(pdev);
277 282
278 if (mid->board->exit) 283 if (mid->board->exit)
279 mid->board->exit(mid); 284 mid->board->exit(mid);
280 285
281 serial8250_unregister_port(mid->line); 286 serial8250_unregister_port(mid->line);
282 } 287 }
283 288
284 static const struct mid8250_board pnw_board = { 289 static const struct mid8250_board pnw_board = {
290 .flags = FL_BASE0,
285 .freq = 50000000, 291 .freq = 50000000,
286 .base_baud = 115200, 292 .base_baud = 115200,
287 .setup = pnw_setup, 293 .setup = pnw_setup,
288 }; 294 };
289 295
290 static const struct mid8250_board tng_board = { 296 static const struct mid8250_board tng_board = {
297 .flags = FL_BASE0,
291 .freq = 38400000, 298 .freq = 38400000,
292 .base_baud = 1843200, 299 .base_baud = 1843200,
293 .setup = tng_setup, 300 .setup = tng_setup,
294 }; 301 };
295 302
296 static const struct mid8250_board dnv_board = { 303 static const struct mid8250_board dnv_board = {
304 .flags = FL_BASE1,
297 .freq = 133333333, 305 .freq = 133333333,
298 .base_baud = 115200, 306 .base_baud = 115200,
299 .setup = dnv_setup, 307 .setup = dnv_setup,
300 .exit = dnv_exit, 308 .exit = dnv_exit,
301 }; 309 };
302 310
303 #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board } 311 #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
304 312
305 static const struct pci_device_id pci_ids[] = { 313 static const struct pci_device_id pci_ids[] = {
306 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board), 314 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
307 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board), 315 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
308 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board), 316 MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
309 MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board), 317 MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
310 MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board), 318 MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
311 { }, 319 { },
312 }; 320 };
313 MODULE_DEVICE_TABLE(pci, pci_ids); 321 MODULE_DEVICE_TABLE(pci, pci_ids);
314 322
315 static struct pci_driver mid8250_pci_driver = { 323 static struct pci_driver mid8250_pci_driver = {
316 .name = "8250_mid", 324 .name = "8250_mid",
317 .id_table = pci_ids, 325 .id_table = pci_ids,
318 .probe = mid8250_probe, 326 .probe = mid8250_probe,
319 .remove = mid8250_remove, 327 .remove = mid8250_remove,
320 }; 328 };
321 329
322 module_pci_driver(mid8250_pci_driver); 330 module_pci_driver(mid8250_pci_driver);
323 331
324 MODULE_AUTHOR("Intel Corporation"); 332 MODULE_AUTHOR("Intel Corporation");
325 MODULE_LICENSE("GPL v2"); 333 MODULE_LICENSE("GPL v2");
326 MODULE_DESCRIPTION("Intel MID UART driver"); 334 MODULE_DESCRIPTION("Intel MID UART driver");
327 335