Commit 3c5dafe43d1e36b70606d3baef8d7f24c0883343
Committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
1 parent
1401ebda89
Exists in
smarct4x-processor-sdk-linux-03.00.00.04
and in
2 other branches
serial: 8250_mid: use proper bar for DNV platform
commit 107e15fc1f8d6ef69eac5f175971252f76e82f0d upstream. Unlike Intel Medfield and Tangier platforms DNV uses PCI BAR0 for IO compatible resources and BAR1 for MMIO. We need latter in a way to support DMA. Introduce an additional field in the internal structure and pass PCI BAR based on device ID. Reported-by: "Lai, Poey Seng" <poey.seng.lai@intel.com> Fixes: 6ede6dcd87aa ("serial: 8250_mid: add support for DMA engine handling from UART MMIO") Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Showing 1 changed file with 11 additions and 3 deletions Side-by-side Diff
drivers/tty/serial/8250/8250_mid.c
| ... | ... | @@ -14,6 +14,7 @@ |
| 14 | 14 | #include <linux/pci.h> |
| 15 | 15 | |
| 16 | 16 | #include <linux/dma/hsu.h> |
| 17 | +#include <linux/8250_pci.h> | |
| 17 | 18 | |
| 18 | 19 | #include "8250.h" |
| 19 | 20 | |
| ... | ... | @@ -31,6 +32,7 @@ |
| 31 | 32 | struct mid8250; |
| 32 | 33 | |
| 33 | 34 | struct mid8250_board { |
| 35 | + unsigned int flags; | |
| 34 | 36 | unsigned long freq; |
| 35 | 37 | unsigned int base_baud; |
| 36 | 38 | int (*setup)(struct mid8250 *, struct uart_port *p); |
| 37 | 39 | |
| ... | ... | @@ -106,12 +108,13 @@ |
| 106 | 108 | { |
| 107 | 109 | struct hsu_dma_chip *chip = &mid->dma_chip; |
| 108 | 110 | struct pci_dev *pdev = to_pci_dev(p->dev); |
| 111 | + unsigned int bar = FL_GET_BASE(mid->board->flags); | |
| 109 | 112 | int ret; |
| 110 | 113 | |
| 111 | 114 | chip->dev = &pdev->dev; |
| 112 | 115 | chip->irq = pdev->irq; |
| 113 | 116 | chip->regs = p->membase; |
| 114 | - chip->length = pci_resource_len(pdev, 0); | |
| 117 | + chip->length = pci_resource_len(pdev, bar); | |
| 115 | 118 | chip->offset = DNV_DMA_CHAN_OFFSET; |
| 116 | 119 | |
| 117 | 120 | /* Falling back to PIO mode if DMA probing fails */ |
| ... | ... | @@ -217,6 +220,7 @@ |
| 217 | 220 | { |
| 218 | 221 | struct uart_8250_port uart; |
| 219 | 222 | struct mid8250 *mid; |
| 223 | + unsigned int bar; | |
| 220 | 224 | int ret; |
| 221 | 225 | |
| 222 | 226 | ret = pcim_enable_device(pdev); |
| ... | ... | @@ -230,6 +234,7 @@ |
| 230 | 234 | return -ENOMEM; |
| 231 | 235 | |
| 232 | 236 | mid->board = (struct mid8250_board *)id->driver_data; |
| 237 | + bar = FL_GET_BASE(mid->board->flags); | |
| 233 | 238 | |
| 234 | 239 | memset(&uart, 0, sizeof(struct uart_8250_port)); |
| 235 | 240 | |
| ... | ... | @@ -242,8 +247,8 @@ |
| 242 | 247 | uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
| 243 | 248 | uart.port.set_termios = mid8250_set_termios; |
| 244 | 249 | |
| 245 | - uart.port.mapbase = pci_resource_start(pdev, 0); | |
| 246 | - uart.port.membase = pcim_iomap(pdev, 0, 0); | |
| 250 | + uart.port.mapbase = pci_resource_start(pdev, bar); | |
| 251 | + uart.port.membase = pcim_iomap(pdev, bar, 0); | |
| 247 | 252 | if (!uart.port.membase) |
| 248 | 253 | return -ENOMEM; |
| 249 | 254 | |
| 250 | 255 | |
| 251 | 256 | |
| ... | ... | @@ -282,18 +287,21 @@ |
| 282 | 287 | } |
| 283 | 288 | |
| 284 | 289 | static const struct mid8250_board pnw_board = { |
| 290 | + .flags = FL_BASE0, | |
| 285 | 291 | .freq = 50000000, |
| 286 | 292 | .base_baud = 115200, |
| 287 | 293 | .setup = pnw_setup, |
| 288 | 294 | }; |
| 289 | 295 | |
| 290 | 296 | static const struct mid8250_board tng_board = { |
| 297 | + .flags = FL_BASE0, | |
| 291 | 298 | .freq = 38400000, |
| 292 | 299 | .base_baud = 1843200, |
| 293 | 300 | .setup = tng_setup, |
| 294 | 301 | }; |
| 295 | 302 | |
| 296 | 303 | static const struct mid8250_board dnv_board = { |
| 304 | + .flags = FL_BASE1, | |
| 297 | 305 | .freq = 133333333, |
| 298 | 306 | .base_baud = 115200, |
| 299 | 307 | .setup = dnv_setup, |