Commit 3cbc8e24056ead0ffbe187a3c70df6c0d64aafb9
1 parent
60b9cb6bfa
Exists in
ti-linux-3.14.y
and in
2 other branches
ARM: dts: OMAP5+: separate the cpu thermal zone definition from omap4
OMAP4 has a finer counter granularity, which allows for a delay of 1000ms in the thermal zone polling intervals. OMAP5/DRA7 have different counter mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal zone accordingly for OMAP5/DRA7. Signed-off-by: Tero Kristo <t-kristo@ti.com>
Showing 4 changed files with 44 additions and 3 deletions Side-by-side Diff
arch/arm/boot/dts/dra72x.dtsi
arch/arm/boot/dts/dra74x.dtsi
arch/arm/boot/dts/omap5-cpu-thermal.dtsi
| 1 | +/* | |
| 2 | + * Device Tree Source for OMAP4/5 SoC CPU thermal | |
| 3 | + * | |
| 4 | + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
| 5 | + * Contact: Tero Kristo <t-kristo@ti.com> | |
| 6 | + * | |
| 7 | + * This file is licensed under the terms of the GNU General Public License | |
| 8 | + * version 2. This program is licensed "as is" without any warranty of any | |
| 9 | + * kind, whether express or implied. | |
| 10 | + */ | |
| 11 | + | |
| 12 | +#include <dt-bindings/thermal/thermal.h> | |
| 13 | + | |
| 14 | +cpu_thermal: cpu_thermal { | |
| 15 | + polling-delay-passive = <250>; /* milliseconds */ | |
| 16 | + polling-delay = <500>; /* milliseconds */ | |
| 17 | + | |
| 18 | + /* sensor ID */ | |
| 19 | + thermal-sensors = <&bandgap 0>; | |
| 20 | + | |
| 21 | + trips { | |
| 22 | + cpu_alert0: cpu_alert { | |
| 23 | + temperature = <100000>; /* millicelsius */ | |
| 24 | + hysteresis = <2000>; /* millicelsius */ | |
| 25 | + type = "passive"; | |
| 26 | + }; | |
| 27 | + cpu_crit: cpu_crit { | |
| 28 | + temperature = <125000>; /* millicelsius */ | |
| 29 | + hysteresis = <2000>; /* millicelsius */ | |
| 30 | + type = "critical"; | |
| 31 | + }; | |
| 32 | + }; | |
| 33 | + | |
| 34 | + cooling-maps { | |
| 35 | + map0 { | |
| 36 | + trip = <&cpu_alert0>; | |
| 37 | + cooling-device = | |
| 38 | + <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | +}; |