Commit 420b94697722512a2c0732970dc1530197a49adb

Authored by Alexandre Courbot
Committed by Ben Skeggs
1 parent 0b681687fe

support for platform devices

Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead
of PCI to which Nouveau is tightly dependent. This patch allows Nouveau
to handle platform devices by:

- abstracting PCI-dependent functions that were typically used for
  resource querying and page mapping,
- introducing a nv_device_is_pci() function that allows to make
  PCI-dependent code conditional,
- providing a nouveau_drm_platform_probe() function that takes a GPU
  platform device to be probed.

Core code as well as engine/subdev drivers are updated wherever possible
to make use of these functions. Some older drivers are too dependent on
PCI to be properly updated, but all newer code on which future chips may
depend should at least be runnable with platform devices.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

Showing 35 changed files with 305 additions and 127 deletions Side-by-side Diff

drivers/gpu/drm/nouveau/core/engine/device/base.c
... ... @@ -131,8 +131,8 @@
131 131 if (ret)
132 132 return ret;
133 133  
134   - mmio_base = pci_resource_start(device->pdev, 0);
135   - mmio_size = pci_resource_len(device->pdev, 0);
  134 + mmio_base = nv_device_resource_start(device, 0);
  135 + mmio_size = nv_device_resource_len(device, 0);
136 136  
137 137 /* translate api disable mask into internal mapping */
138 138 disable = args->debug0;
... ... @@ -448,6 +448,72 @@
448 448 nouveau_engine_destroy(&device->base);
449 449 }
450 450  
  451 +resource_size_t
  452 +nv_device_resource_start(struct nouveau_device *device, unsigned int bar)
  453 +{
  454 + if (nv_device_is_pci(device)) {
  455 + return pci_resource_start(device->pdev, bar);
  456 + } else {
  457 + struct resource *res;
  458 + res = platform_get_resource(device->platformdev,
  459 + IORESOURCE_MEM, bar);
  460 + if (!res)
  461 + return 0;
  462 + return res->start;
  463 + }
  464 +}
  465 +
  466 +resource_size_t
  467 +nv_device_resource_len(struct nouveau_device *device, unsigned int bar)
  468 +{
  469 + if (nv_device_is_pci(device)) {
  470 + return pci_resource_len(device->pdev, bar);
  471 + } else {
  472 + struct resource *res;
  473 + res = platform_get_resource(device->platformdev,
  474 + IORESOURCE_MEM, bar);
  475 + if (!res)
  476 + return 0;
  477 + return resource_size(res);
  478 + }
  479 +}
  480 +
  481 +dma_addr_t
  482 +nv_device_map_page(struct nouveau_device *device, struct page *page)
  483 +{
  484 + dma_addr_t ret;
  485 +
  486 + if (nv_device_is_pci(device)) {
  487 + ret = pci_map_page(device->pdev, page, 0, PAGE_SIZE,
  488 + PCI_DMA_BIDIRECTIONAL);
  489 + if (pci_dma_mapping_error(device->pdev, ret))
  490 + ret = 0;
  491 + } else {
  492 + ret = page_to_phys(page);
  493 + }
  494 +
  495 + return ret;
  496 +}
  497 +
  498 +void
  499 +nv_device_unmap_page(struct nouveau_device *device, dma_addr_t addr)
  500 +{
  501 + if (nv_device_is_pci(device))
  502 + pci_unmap_page(device->pdev, addr, PAGE_SIZE,
  503 + PCI_DMA_BIDIRECTIONAL);
  504 +}
  505 +
  506 +int
  507 +nv_device_get_irq(struct nouveau_device *device, bool stall)
  508 +{
  509 + if (nv_device_is_pci(device)) {
  510 + return device->pdev->irq;
  511 + } else {
  512 + return platform_get_irq_byname(device->platformdev,
  513 + stall ? "stall" : "nonstall");
  514 + }
  515 +}
  516 +
451 517 static struct nouveau_oclass
452 518 nouveau_device_oclass = {
453 519 .handle = NV_ENGINE(DEVICE, 0x00),
... ... @@ -459,8 +525,8 @@
459 525 };
460 526  
461 527 int
462   -nouveau_device_create_(struct pci_dev *pdev, u64 name, const char *sname,
463   - const char *cfg, const char *dbg,
  528 +nouveau_device_create_(void *dev, enum nv_bus_type type, u64 name,
  529 + const char *sname, const char *cfg, const char *dbg,
464 530 int length, void **pobject)
465 531 {
466 532 struct nouveau_device *device;
... ... @@ -478,7 +544,14 @@
478 544 if (ret)
479 545 goto done;
480 546  
481   - device->pdev = pdev;
  547 + switch (type) {
  548 + case NOUVEAU_BUS_PCI:
  549 + device->pdev = dev;
  550 + break;
  551 + case NOUVEAU_BUS_PLATFORM:
  552 + device->platformdev = dev;
  553 + break;
  554 + }
482 555 device->handle = name;
483 556 device->cfgopt = cfg;
484 557 device->dbgopt = dbg;
drivers/gpu/drm/nouveau/core/engine/falcon.c
... ... @@ -119,7 +119,7 @@
119 119 snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03x",
120 120 device->chipset, falcon->addr >> 12);
121 121  
122   - ret = request_firmware(&fw, name, &device->pdev->dev);
  122 + ret = request_firmware(&fw, name, nv_device_base(device));
123 123 if (ret == 0) {
124 124 falcon->code.data = vmemdup(fw->data, fw->size);
125 125 falcon->code.size = fw->size;
... ... @@ -138,7 +138,7 @@
138 138 snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03xd",
139 139 device->chipset, falcon->addr >> 12);
140 140  
141   - ret = request_firmware(&fw, name, &device->pdev->dev);
  141 + ret = request_firmware(&fw, name, nv_device_base(device));
142 142 if (ret) {
143 143 nv_error(falcon, "unable to load firmware data\n");
144 144 return ret;
... ... @@ -153,7 +153,7 @@
153 153 snprintf(name, sizeof(name), "nouveau/nv%02x_fuc%03xc",
154 154 device->chipset, falcon->addr >> 12);
155 155  
156   - ret = request_firmware(&fw, name, &device->pdev->dev);
  156 + ret = request_firmware(&fw, name, nv_device_base(device));
157 157 if (ret) {
158 158 nv_error(falcon, "unable to load firmware code\n");
159 159 return ret;
drivers/gpu/drm/nouveau/core/engine/fifo/base.c
... ... @@ -86,7 +86,7 @@
86 86 }
87 87  
88 88 /* map fifo control registers */
89   - chan->user = ioremap(pci_resource_start(device->pdev, bar) + addr +
  89 + chan->user = ioremap(nv_device_resource_start(device, bar) + addr +
90 90 (chan->chid * size), size);
91 91 if (!chan->user)
92 92 return -EFAULT;
drivers/gpu/drm/nouveau/core/engine/graph/nv20.c
... ... @@ -349,7 +349,7 @@
349 349 nv_wr32(priv, NV10_PGRAPH_SURFACE, tmp);
350 350  
351 351 /* begin RAM config */
352   - vramsz = pci_resource_len(nv_device(priv)->pdev, 0) - 1;
  352 + vramsz = nv_device_resource_len(nv_device(priv), 0) - 1;
353 353 nv_wr32(priv, 0x4009A4, nv_rd32(priv, 0x100200));
354 354 nv_wr32(priv, 0x4009A8, nv_rd32(priv, 0x100204));
355 355 nv_wr32(priv, NV10_PGRAPH_RDI_INDEX, 0x00EA0000);
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c
... ... @@ -484,7 +484,7 @@
484 484 engine->tile_prog(engine, i);
485 485  
486 486 /* begin RAM config */
487   - vramsz = pci_resource_len(nv_device(priv)->pdev, 0) - 1;
  487 + vramsz = nv_device_resource_len(nv_device(priv), 0) - 1;
488 488 switch (nv_device(priv)->chipset) {
489 489 case 0x40:
490 490 nv_wr32(priv, 0x4009A4, nv_rd32(priv, 0x100200));
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
... ... @@ -1091,10 +1091,10 @@
1091 1091 int ret;
1092 1092  
1093 1093 snprintf(f, sizeof(f), "nouveau/nv%02x_%s", device->chipset, fwname);
1094   - ret = request_firmware(&fw, f, &device->pdev->dev);
  1094 + ret = request_firmware(&fw, f, nv_device_base(device));
1095 1095 if (ret) {
1096 1096 snprintf(f, sizeof(f), "nouveau/%s", fwname);
1097   - ret = request_firmware(&fw, f, &device->pdev->dev);
  1097 + ret = request_firmware(&fw, f, nv_device_base(device));
1098 1098 if (ret) {
1099 1099 nv_error(priv, "failed to load %s\n", fwname);
1100 1100 return ret;
drivers/gpu/drm/nouveau/core/engine/xtensa.c
... ... @@ -112,7 +112,7 @@
112 112 snprintf(name, sizeof(name), "nouveau/nv84_xuc%03x",
113 113 xtensa->addr >> 12);
114 114  
115   - ret = request_firmware(&fw, name, &device->pdev->dev);
  115 + ret = request_firmware(&fw, name, nv_device_base(device));
116 116 if (ret) {
117 117 nv_warn(xtensa, "unable to load firmware %s\n", name);
118 118 return ret;
drivers/gpu/drm/nouveau/core/include/core/device.h
... ... @@ -66,6 +66,7 @@
66 66 struct list_head head;
67 67  
68 68 struct pci_dev *pdev;
  69 + struct platform_device *platformdev;
69 70 u64 handle;
70 71  
71 72 const char *cfgopt;
... ... @@ -141,6 +142,34 @@
141 142 device->pdev->subsystem_vendor == ven &&
142 143 device->pdev->subsystem_device == sub;
143 144 }
  145 +
  146 +static inline bool
  147 +nv_device_is_pci(struct nouveau_device *device)
  148 +{
  149 + return device->pdev != NULL;
  150 +}
  151 +
  152 +static inline struct device *
  153 +nv_device_base(struct nouveau_device *device)
  154 +{
  155 + return nv_device_is_pci(device) ? &device->pdev->dev :
  156 + &device->platformdev->dev;
  157 +}
  158 +
  159 +resource_size_t
  160 +nv_device_resource_start(struct nouveau_device *device, unsigned int bar);
  161 +
  162 +resource_size_t
  163 +nv_device_resource_len(struct nouveau_device *device, unsigned int bar);
  164 +
  165 +dma_addr_t
  166 +nv_device_map_page(struct nouveau_device *device, struct page *page);
  167 +
  168 +void
  169 +nv_device_unmap_page(struct nouveau_device *device, dma_addr_t addr);
  170 +
  171 +int
  172 +nv_device_get_irq(struct nouveau_device *device, bool stall);
144 173  
145 174 #endif
drivers/gpu/drm/nouveau/core/include/engine/device.h
... ... @@ -3,11 +3,20 @@
3 3  
4 4 #include <core/device.h>
5 5  
6   -#define nouveau_device_create(p,n,s,c,d,u) \
7   - nouveau_device_create_((p), (n), (s), (c), (d), sizeof(**u), (void **)u)
  6 +struct platform_device;
8 7  
9   -int nouveau_device_create_(struct pci_dev *, u64 name, const char *sname,
10   - const char *cfg, const char *dbg, int, void **);
  8 +enum nv_bus_type {
  9 + NOUVEAU_BUS_PCI,
  10 + NOUVEAU_BUS_PLATFORM,
  11 +};
  12 +
  13 +#define nouveau_device_create(p,t,n,s,c,d,u) \
  14 + nouveau_device_create_((void *)(p), (t), (n), (s), (c), (d), \
  15 + sizeof(**u), (void **)u)
  16 +
  17 +int nouveau_device_create_(void *, enum nv_bus_type type, u64 name,
  18 + const char *sname, const char *cfg, const char *dbg,
  19 + int, void **);
11 20  
12 21 int nv04_identify(struct nouveau_device *);
13 22 int nv10_identify(struct nouveau_device *);
drivers/gpu/drm/nouveau/core/include/subdev/mc.h
... ... @@ -12,6 +12,7 @@
12 12 struct nouveau_mc {
13 13 struct nouveau_subdev base;
14 14 bool use_msi;
  15 + unsigned int irq;
15 16 };
16 17  
17 18 static inline struct nouveau_mc *
drivers/gpu/drm/nouveau/core/os.h
... ... @@ -5,6 +5,7 @@
5 5 #include <linux/slab.h>
6 6 #include <linux/mutex.h>
7 7 #include <linux/pci.h>
  8 +#include <linux/platform_device.h>
8 9 #include <linux/printk.h>
9 10 #include <linux/bitops.h>
10 11 #include <linux/firmware.h>
... ... @@ -22,17 +23,6 @@
22 23 #include <linux/pm_runtime.h>
23 24  
24 25 #include <asm/unaligned.h>
25   -
26   -static inline int
27   -ffsll(u64 mask)
28   -{
29   - int i;
30   - for (i = 0; i < 64; i++) {
31   - if (mask & (1ULL << i))
32   - return i + 1;
33   - }
34   - return 0;
35   -}
36 26  
37 27 #ifndef ioread32_native
38 28 #ifdef __BIG_ENDIAN
drivers/gpu/drm/nouveau/core/subdev/bar/base.c
... ... @@ -118,8 +118,8 @@
118 118 if (ret)
119 119 return ret;
120 120  
121   - bar->iomem = ioremap(pci_resource_start(device->pdev, 3),
122   - pci_resource_len(device->pdev, 3));
  121 + bar->iomem = ioremap(nv_device_resource_start(device, 3),
  122 + nv_device_resource_len(device, 3));
123 123 return 0;
124 124 }
125 125  
drivers/gpu/drm/nouveau/core/subdev/bar/nv50.c
... ... @@ -139,7 +139,7 @@
139 139  
140 140 /* BAR3 */
141 141 start = 0x0100000000ULL;
142   - limit = start + pci_resource_len(device->pdev, 3);
  142 + limit = start + nv_device_resource_len(device, 3);
143 143  
144 144 ret = nouveau_vm_new(device, start, limit, start, &vm);
145 145 if (ret)
... ... @@ -173,7 +173,7 @@
173 173  
174 174 /* BAR1 */
175 175 start = 0x0000000000ULL;
176   - limit = start + pci_resource_len(device->pdev, 1);
  176 + limit = start + nv_device_resource_len(device, 1);
177 177  
178 178 ret = nouveau_vm_new(device, start, limit--, start, &vm);
179 179 if (ret)
drivers/gpu/drm/nouveau/core/subdev/bar/nvc0.c
... ... @@ -84,7 +84,6 @@
84 84 struct nouveau_object **pobject)
85 85 {
86 86 struct nouveau_device *device = nv_device(parent);
87   - struct pci_dev *pdev = device->pdev;
88 87 struct nvc0_bar_priv *priv;
89 88 struct nouveau_gpuobj *mem;
90 89 struct nouveau_vm *vm;
91 90  
... ... @@ -107,14 +106,14 @@
107 106 if (ret)
108 107 return ret;
109 108  
110   - ret = nouveau_vm_new(device, 0, pci_resource_len(pdev, 3), 0, &vm);
  109 + ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 3), 0, &vm);
111 110 if (ret)
112 111 return ret;
113 112  
114 113 atomic_inc(&vm->engref[NVDEV_SUBDEV_BAR]);
115 114  
116 115 ret = nouveau_gpuobj_new(nv_object(priv), NULL,
117   - (pci_resource_len(pdev, 3) >> 12) * 8,
  116 + (nv_device_resource_len(device, 3) >> 12) * 8,
118 117 0x1000, NVOBJ_FLAG_ZERO_ALLOC,
119 118 &vm->pgt[0].obj[0]);
120 119 vm->pgt[0].refcount[0] = 1;
... ... @@ -128,8 +127,8 @@
128 127  
129 128 nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[0].pgd->addr));
130 129 nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[0].pgd->addr));
131   - nv_wo32(mem, 0x0208, lower_32_bits(pci_resource_len(pdev, 3) - 1));
132   - nv_wo32(mem, 0x020c, upper_32_bits(pci_resource_len(pdev, 3) - 1));
  130 + nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 3) - 1));
  131 + nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 3) - 1));
133 132  
134 133 /* BAR1 */
135 134 ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x1000, 0, 0,
... ... @@ -143,7 +142,7 @@
143 142 if (ret)
144 143 return ret;
145 144  
146   - ret = nouveau_vm_new(device, 0, pci_resource_len(pdev, 1), 0, &vm);
  145 + ret = nouveau_vm_new(device, 0, nv_device_resource_len(device, 1), 0, &vm);
147 146 if (ret)
148 147 return ret;
149 148  
... ... @@ -156,8 +155,8 @@
156 155  
157 156 nv_wo32(mem, 0x0200, lower_32_bits(priv->bar[1].pgd->addr));
158 157 nv_wo32(mem, 0x0204, upper_32_bits(priv->bar[1].pgd->addr));
159   - nv_wo32(mem, 0x0208, lower_32_bits(pci_resource_len(pdev, 1) - 1));
160   - nv_wo32(mem, 0x020c, upper_32_bits(pci_resource_len(pdev, 1) - 1));
  158 + nv_wo32(mem, 0x0208, lower_32_bits(nv_device_resource_len(device, 1) - 1));
  159 + nv_wo32(mem, 0x020c, upper_32_bits(nv_device_resource_len(device, 1) - 1));
161 160  
162 161 priv->base.alloc = nouveau_bar_alloc;
163 162 priv->base.kmap = nvc0_bar_kmap;
drivers/gpu/drm/nouveau/core/subdev/devinit/fbmem.h
... ... @@ -24,6 +24,8 @@
24 24 *
25 25 */
26 26  
  27 +#include <core/device.h>
  28 +
27 29 #define NV04_PFB_BOOT_0 0x00100000
28 30 # define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003
29 31 # define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
30 32  
... ... @@ -60,10 +62,10 @@
60 62 # define NV10_PFB_REFCTRL_VALID_1 (1 << 31)
61 63  
62 64 static inline struct io_mapping *
63   -fbmem_init(struct pci_dev *pdev)
  65 +fbmem_init(struct nouveau_device *dev)
64 66 {
65   - return io_mapping_create_wc(pci_resource_start(pdev, 1),
66   - pci_resource_len(pdev, 1));
  67 + return io_mapping_create_wc(nv_device_resource_start(dev, 1),
  68 + nv_device_resource_len(dev, 1));
67 69 }
68 70  
69 71 static inline void
drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c
... ... @@ -38,7 +38,7 @@
38 38 int i;
39 39  
40 40 /* Map the framebuffer aperture */
41   - fb = fbmem_init(nv_device(priv)->pdev);
  41 + fb = fbmem_init(nv_device(priv));
42 42 if (!fb) {
43 43 nv_error(priv, "failed to map fb\n");
44 44 return;
drivers/gpu/drm/nouveau/core/subdev/devinit/nv05.c
... ... @@ -53,7 +53,7 @@
53 53 int i, v;
54 54  
55 55 /* Map the framebuffer aperture */
56   - fb = fbmem_init(nv_device(priv)->pdev);
  56 + fb = fbmem_init(nv_device(priv));
57 57 if (!fb) {
58 58 nv_error(priv, "failed to map fb\n");
59 59 return;
drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c
... ... @@ -46,7 +46,7 @@
46 46 mem_width_count = 2;
47 47  
48 48 /* Map the framebuffer aperture */
49   - fb = fbmem_init(nv_device(priv)->pdev);
  49 + fb = fbmem_init(nv_device(priv));
50 50 if (!fb) {
51 51 nv_error(priv, "failed to map fb\n");
52 52 return;
drivers/gpu/drm/nouveau/core/subdev/devinit/nv20.c
... ... @@ -37,7 +37,7 @@
37 37 struct io_mapping *fb;
38 38  
39 39 /* Map the framebuffer aperture */
40   - fb = fbmem_init(nv_device(priv)->pdev);
  40 + fb = fbmem_init(nv_device(priv));
41 41 if (!fb) {
42 42 nv_error(priv, "failed to map fb\n");
43 43 return;
drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
... ... @@ -250,10 +250,8 @@
250 250  
251 251 priv->r100c08_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
252 252 if (priv->r100c08_page) {
253   - priv->r100c08 = pci_map_page(device->pdev, priv->r100c08_page,
254   - 0, PAGE_SIZE,
255   - PCI_DMA_BIDIRECTIONAL);
256   - if (pci_dma_mapping_error(device->pdev, priv->r100c08))
  253 + priv->r100c08 = nv_device_map_page(device, priv->r100c08_page);
  254 + if (!priv->r100c08)
257 255 nv_warn(priv, "failed 0x100c08 page map\n");
258 256 } else {
259 257 nv_warn(priv, "failed 0x100c08 page alloc\n");
... ... @@ -270,8 +268,7 @@
270 268 struct nv50_fb_priv *priv = (void *)object;
271 269  
272 270 if (priv->r100c08_page) {
273   - pci_unmap_page(device->pdev, priv->r100c08, PAGE_SIZE,
274   - PCI_DMA_BIDIRECTIONAL);
  271 + nv_device_unmap_page(device, priv->r100c08);
275 272 __free_page(priv->r100c08_page);
276 273 }
277 274  
drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
... ... @@ -70,8 +70,7 @@
70 70 struct nvc0_fb_priv *priv = (void *)object;
71 71  
72 72 if (priv->r100c10_page) {
73   - pci_unmap_page(device->pdev, priv->r100c10, PAGE_SIZE,
74   - PCI_DMA_BIDIRECTIONAL);
  73 + nv_device_unmap_page(device, priv->r100c10);
75 74 __free_page(priv->r100c10_page);
76 75 }
77 76  
... ... @@ -94,10 +93,8 @@
94 93  
95 94 priv->r100c10_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
96 95 if (priv->r100c10_page) {
97   - priv->r100c10 = pci_map_page(device->pdev, priv->r100c10_page,
98   - 0, PAGE_SIZE,
99   - PCI_DMA_BIDIRECTIONAL);
100   - if (pci_dma_mapping_error(device->pdev, priv->r100c10))
  96 + priv->r100c10 = nv_device_map_page(device, priv->r100c10_page);
  97 + if (!priv->r100c10)
101 98 return -EFAULT;
102 99 }
103 100  
drivers/gpu/drm/nouveau/core/subdev/i2c/base.c
... ... @@ -111,7 +111,7 @@
111 111 snprintf(port->adapter.name, sizeof(port->adapter.name),
112 112 "nouveau-%s-%d", device->name, index);
113 113 port->adapter.owner = THIS_MODULE;
114   - port->adapter.dev.parent = &device->pdev->dev;
  114 + port->adapter.dev.parent = nv_device_base(device);
115 115 port->index = index;
116 116 port->func = func;
117 117 i2c_set_adapdata(&port->adapter, i2c);
drivers/gpu/drm/nouveau/core/subdev/instmem/nv40.c
... ... @@ -50,7 +50,6 @@
50 50 struct nouveau_object **pobject)
51 51 {
52 52 struct nouveau_device *device = nv_device(parent);
53   - struct pci_dev *pdev = device->pdev;
54 53 struct nv04_instmem_priv *priv;
55 54 int ret, bar, vs;
56 55  
57 56  
... ... @@ -60,13 +59,13 @@
60 59 return ret;
61 60  
62 61 /* map bar */
63   - if (pci_resource_len(pdev, 2))
  62 + if (nv_device_resource_len(device, 2))
64 63 bar = 2;
65 64 else
66 65 bar = 3;
67 66  
68   - priv->iomem = ioremap(pci_resource_start(pdev, bar),
69   - pci_resource_len(pdev, bar));
  67 + priv->iomem = ioremap(nv_device_resource_start(device, bar),
  68 + nv_device_resource_len(device, bar));
70 69 if (!priv->iomem) {
71 70 nv_error(priv, "unable to map PRAMIN BAR\n");
72 71 return -EFAULT;
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
... ... @@ -93,7 +93,7 @@
93 93 {
94 94 struct nouveau_device *device = nv_device(object);
95 95 struct nouveau_mc *pmc = (void *)object;
96   - free_irq(device->pdev->irq, pmc);
  96 + free_irq(pmc->irq, pmc);
97 97 if (pmc->use_msi)
98 98 pci_disable_msi(device->pdev);
99 99 nouveau_subdev_destroy(&pmc->base);
100 100  
101 101  
102 102  
103 103  
104 104  
... ... @@ -114,33 +114,44 @@
114 114 if (ret)
115 115 return ret;
116 116  
117   - switch (device->pdev->device & 0x0ff0) {
118   - case 0x00f0:
119   - case 0x02e0:
120   - /* BR02? NFI how these would be handled yet exactly */
121   - break;
122   - default:
123   - switch (device->chipset) {
124   - case 0xaa: break; /* reported broken, nv also disable it */
125   - default:
126   - pmc->use_msi = true;
  117 + if (nv_device_is_pci(device))
  118 + switch (device->pdev->device & 0x0ff0) {
  119 + case 0x00f0:
  120 + case 0x02e0:
  121 + /* BR02? NFI how these would be handled yet exactly */
127 122 break;
  123 + default:
  124 + switch (device->chipset) {
  125 + case 0xaa:
  126 + /* reported broken, nv also disable it */
  127 + break;
  128 + default:
  129 + pmc->use_msi = true;
  130 + break;
128 131 }
129   - }
130 132  
131   - pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI", pmc->use_msi);
132   - if (pmc->use_msi && oclass->msi_rearm) {
133   - pmc->use_msi = pci_enable_msi(device->pdev) == 0;
134   - if (pmc->use_msi) {
135   - nv_info(pmc, "MSI interrupts enabled\n");
136   - oclass->msi_rearm(pmc);
  133 + pmc->use_msi = nouveau_boolopt(device->cfgopt, "NvMSI",
  134 + pmc->use_msi);
  135 +
  136 + if (pmc->use_msi && oclass->msi_rearm) {
  137 + pmc->use_msi = pci_enable_msi(device->pdev) == 0;
  138 + if (pmc->use_msi) {
  139 + nv_info(pmc, "MSI interrupts enabled\n");
  140 + oclass->msi_rearm(pmc);
  141 + }
  142 + } else {
  143 + pmc->use_msi = false;
137 144 }
138   - } else {
139   - pmc->use_msi = false;
140 145 }
141 146  
142   - ret = request_irq(device->pdev->irq, nouveau_mc_intr,
143   - IRQF_SHARED, "nouveau", pmc);
  147 + ret = nv_device_get_irq(device, true);
  148 + if (ret < 0)
  149 + return ret;
  150 + pmc->irq = ret;
  151 +
  152 + ret = request_irq(pmc->irq, nouveau_mc_intr, IRQF_SHARED, "nouveau",
  153 + pmc);
  154 +
144 155 if (ret < 0)
145 156 return ret;
146 157  
drivers/gpu/drm/nouveau/core/subdev/mxm/base.c
... ... @@ -96,7 +96,7 @@
96 96 acpi_handle handle;
97 97 int rev;
98 98  
99   - handle = ACPI_HANDLE(&device->pdev->dev);
  99 + handle = ACPI_HANDLE(nv_device_base(device));
100 100 if (!handle)
101 101 return false;
102 102  
drivers/gpu/drm/nouveau/nouveau_abi16.c
... ... @@ -180,12 +180,21 @@
180 180 getparam->value = device->chipset;
181 181 break;
182 182 case NOUVEAU_GETPARAM_PCI_VENDOR:
183   - getparam->value = dev->pdev->vendor;
  183 + if (nv_device_is_pci(device))
  184 + getparam->value = dev->pdev->vendor;
  185 + else
  186 + getparam->value = 0;
184 187 break;
185 188 case NOUVEAU_GETPARAM_PCI_DEVICE:
186   - getparam->value = dev->pdev->device;
  189 + if (nv_device_is_pci(device))
  190 + getparam->value = dev->pdev->device;
  191 + else
  192 + getparam->value = 0;
187 193 break;
188 194 case NOUVEAU_GETPARAM_BUS_TYPE:
  195 + if (!nv_device_is_pci(device))
  196 + getparam->value = 3;
  197 + else
189 198 if (drm_pci_device_is_agp(dev))
190 199 getparam->value = 0;
191 200 else
drivers/gpu/drm/nouveau/nouveau_agp.c
... ... @@ -75,7 +75,7 @@
75 75 {
76 76 struct drm_device *dev = drm->dev;
77 77  
78   - if (!drm_pci_device_is_agp(dev) || !dev->agp)
  78 + if (!dev->pdev || !drm_pci_device_is_agp(dev) || !dev->agp)
79 79 return false;
80 80  
81 81 if (drm->agp.stat == UNKNOWN) {
drivers/gpu/drm/nouveau/nouveau_bios.c
... ... @@ -2069,6 +2069,10 @@
2069 2069 struct nvbios *bios = &drm->vbios;
2070 2070 int ret;
2071 2071  
  2072 + /* only relevant for PCI devices */
  2073 + if (!dev->pdev)
  2074 + return 0;
  2075 +
2072 2076 if (!NVInitVBIOS(dev))
2073 2077 return -ENODEV;
2074 2078  
drivers/gpu/drm/nouveau/nouveau_bo.c
... ... @@ -1255,7 +1255,7 @@
1255 1255 /* fallthrough, tiled memory */
1256 1256 case TTM_PL_VRAM:
1257 1257 mem->bus.offset = mem->start << PAGE_SHIFT;
1258   - mem->bus.base = pci_resource_start(dev->pdev, 1);
  1258 + mem->bus.base = nv_device_resource_start(nouveau_dev(dev), 1);
1259 1259 mem->bus.is_iomem = true;
1260 1260 if (nv_device(drm->device)->card_type >= NV_50) {
1261 1261 struct nouveau_bar *bar = nouveau_bar(drm->device);
... ... @@ -1293,7 +1293,7 @@
1293 1293 struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1294 1294 struct nouveau_bo *nvbo = nouveau_bo(bo);
1295 1295 struct nouveau_device *device = nv_device(drm->device);
1296   - u32 mappable = pci_resource_len(device->pdev, 1) >> PAGE_SHIFT;
  1296 + u32 mappable = nv_device_resource_len(device, 1) >> PAGE_SHIFT;
1297 1297 int ret;
1298 1298  
1299 1299 /* as long as the bo isn't in vram, and isn't tiled, we've got
... ... @@ -1331,6 +1331,7 @@
1331 1331 {
1332 1332 struct ttm_dma_tt *ttm_dma = (void *)ttm;
1333 1333 struct nouveau_drm *drm;
  1334 + struct nouveau_device *device;
1334 1335 struct drm_device *dev;
1335 1336 unsigned i;
1336 1337 int r;
... ... @@ -1348,6 +1349,7 @@
1348 1349 }
1349 1350  
1350 1351 drm = nouveau_bdev(ttm->bdev);
  1352 + device = nv_device(drm->device);
1351 1353 dev = drm->dev;
1352 1354  
1353 1355 #if __OS_HAS_AGP
1354 1356  
... ... @@ -1368,13 +1370,12 @@
1368 1370 }
1369 1371  
1370 1372 for (i = 0; i < ttm->num_pages; i++) {
1371   - ttm_dma->dma_address[i] = pci_map_page(dev->pdev, ttm->pages[i],
1372   - 0, PAGE_SIZE,
1373   - PCI_DMA_BIDIRECTIONAL);
1374   - if (pci_dma_mapping_error(dev->pdev, ttm_dma->dma_address[i])) {
  1373 + ttm_dma->dma_address[i] = nv_device_map_page(device,
  1374 + ttm->pages[i]);
  1375 + if (!ttm_dma->dma_address[i]) {
1375 1376 while (--i) {
1376   - pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1377   - PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
  1377 + nv_device_unmap_page(device,
  1378 + ttm_dma->dma_address[i]);
1378 1379 ttm_dma->dma_address[i] = 0;
1379 1380 }
1380 1381 ttm_pool_unpopulate(ttm);
... ... @@ -1389,6 +1390,7 @@
1389 1390 {
1390 1391 struct ttm_dma_tt *ttm_dma = (void *)ttm;
1391 1392 struct nouveau_drm *drm;
  1393 + struct nouveau_device *device;
1392 1394 struct drm_device *dev;
1393 1395 unsigned i;
1394 1396 bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
... ... @@ -1397,6 +1399,7 @@
1397 1399 return;
1398 1400  
1399 1401 drm = nouveau_bdev(ttm->bdev);
  1402 + device = nv_device(drm->device);
1400 1403 dev = drm->dev;
1401 1404  
1402 1405 #if __OS_HAS_AGP
... ... @@ -1415,8 +1418,7 @@
1415 1418  
1416 1419 for (i = 0; i < ttm->num_pages; i++) {
1417 1420 if (ttm_dma->dma_address[i]) {
1418   - pci_unmap_page(dev->pdev, ttm_dma->dma_address[i],
1419   - PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
  1421 + nv_device_unmap_page(device, ttm_dma->dma_address[i]);
1420 1422 }
1421 1423 }
1422 1424  
drivers/gpu/drm/nouveau/nouveau_chan.c
... ... @@ -154,7 +154,7 @@
154 154 * nfi why this exists, it came from the -nv ddx.
155 155 */
156 156 args.flags = NV_DMA_TARGET_PCI | NV_DMA_ACCESS_RDWR;
157   - args.start = pci_resource_start(device->pdev, 1);
  157 + args.start = nv_device_resource_start(device, 1);
158 158 args.limit = args.start + limit;
159 159 } else {
160 160 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
drivers/gpu/drm/nouveau/nouveau_display.c
... ... @@ -419,6 +419,7 @@
419 419 nouveau_display_create(struct drm_device *dev)
420 420 {
421 421 struct nouveau_drm *drm = nouveau_drm(dev);
  422 + struct nouveau_device *device = nouveau_dev(dev);
422 423 struct nouveau_display *disp;
423 424 int ret, gen;
424 425  
... ... @@ -459,7 +460,7 @@
459 460 }
460 461  
461 462 dev->mode_config.funcs = &nouveau_mode_config_funcs;
462   - dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  463 + dev->mode_config.fb_base = nv_device_resource_start(device, 1);
463 464  
464 465 dev->mode_config.min_width = 0;
465 466 dev->mode_config.min_height = 0;
drivers/gpu/drm/nouveau/nouveau_drm.c
... ... @@ -82,7 +82,7 @@
82 82 static struct drm_driver driver;
83 83  
84 84 static u64
85   -nouveau_name(struct pci_dev *pdev)
  85 +nouveau_pci_name(struct pci_dev *pdev)
86 86 {
87 87 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
88 88 name |= pdev->bus->number << 16;
89 89  
90 90  
... ... @@ -90,15 +90,30 @@
90 90 return name | PCI_FUNC(pdev->devfn);
91 91 }
92 92  
  93 +static u64
  94 +nouveau_platform_name(struct platform_device *platformdev)
  95 +{
  96 + return platformdev->id;
  97 +}
  98 +
  99 +static u64
  100 +nouveau_name(struct drm_device *dev)
  101 +{
  102 + if (dev->pdev)
  103 + return nouveau_pci_name(dev->pdev);
  104 + else
  105 + return nouveau_platform_name(dev->platformdev);
  106 +}
  107 +
93 108 static int
94   -nouveau_cli_create(struct pci_dev *pdev, const char *name,
  109 +nouveau_cli_create(u64 name, const char *sname,
95 110 int size, void **pcli)
96 111 {
97 112 struct nouveau_cli *cli;
98 113 int ret;
99 114  
100 115 *pcli = NULL;
101   - ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  116 + ret = nouveau_client_create_(sname, name, nouveau_config,
102 117 nouveau_debug, size, pcli);
103 118 cli = *pcli;
104 119 if (ret) {
... ... @@ -282,7 +297,8 @@
282 297 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
283 298 kfree(aper);
284 299  
285   - ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  300 + ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
  301 + nouveau_pci_name(pdev), pci_name(pdev),
286 302 nouveau_config, nouveau_debug, &device);
287 303 if (ret)
288 304 return ret;
... ... @@ -305,6 +321,12 @@
305 321 {
306 322 struct pci_dev *pdev = drm->dev->pdev;
307 323  
  324 + if (!pdev) {
  325 + DRM_INFO("not a PCI device; no HDMI");
  326 + drm->hdmi_device = NULL;
  327 + return;
  328 + }
  329 +
308 330 /* subfunction one is a hdmi audio device? */
309 331 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
310 332 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
... ... @@ -330,7 +352,8 @@
330 352 struct nouveau_drm *drm;
331 353 int ret;
332 354  
333   - ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  355 + ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
  356 + (void **)&drm);
334 357 if (ret)
335 358 return ret;
336 359  
... ... @@ -346,7 +369,7 @@
346 369 /* make sure AGP controller is in a consistent state before we
347 370 * (possibly) execute vbios init tables (see nouveau_agp.h)
348 371 */
349   - if (drm_pci_device_is_agp(dev) && dev->agp) {
  372 + if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
350 373 /* dummy device object, doesn't init anything, but allows
351 374 * agp code access to registers
352 375 */
... ... @@ -672,7 +695,6 @@
672 695 static int
673 696 nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
674 697 {
675   - struct pci_dev *pdev = dev->pdev;
676 698 struct nouveau_drm *drm = nouveau_drm(dev);
677 699 struct nouveau_cli *cli;
678 700 char name[32], tmpname[TASK_COMM_LEN];
... ... @@ -686,7 +708,9 @@
686 708 get_task_comm(tmpname, current);
687 709 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
688 710  
689   - ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  711 + ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
  712 + (void **)&cli);
  713 +
690 714 if (ret)
691 715 goto out_suspend;
692 716  
... ... @@ -974,6 +998,25 @@
974 998 .remove = nouveau_drm_remove,
975 999 .driver.pm = &nouveau_pm_ops,
976 1000 };
  1001 +
  1002 +int nouveau_drm_platform_probe(struct platform_device *pdev)
  1003 +{
  1004 + struct nouveau_device *device;
  1005 + int ret;
  1006 +
  1007 + ret = nouveau_device_create(pdev, NOUVEAU_BUS_PLATFORM,
  1008 + nouveau_platform_name(pdev),
  1009 + dev_name(&pdev->dev), nouveau_config,
  1010 + nouveau_debug, &device);
  1011 +
  1012 + ret = drm_platform_init(&driver, pdev);
  1013 + if (ret) {
  1014 + nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  1015 + return ret;
  1016 + }
  1017 +
  1018 + return ret;
  1019 +}
977 1020  
978 1021 static int __init
979 1022 nouveau_drm_init(void)
drivers/gpu/drm/nouveau/nouveau_sysfs.c
... ... @@ -30,7 +30,7 @@
30 30 static inline struct drm_device *
31 31 drm_device(struct device *d)
32 32 {
33   - return pci_get_drvdata(to_pci_dev(d));
  33 + return dev_get_drvdata(d);
34 34 }
35 35  
36 36 #define snappendf(p,r,f,a...) do { \
37 37  
... ... @@ -132,9 +132,10 @@
132 132 {
133 133 struct nouveau_sysfs *sysfs = nouveau_sysfs(dev);
134 134 struct nouveau_drm *drm = nouveau_drm(dev);
  135 + struct nouveau_device *device = nv_device(drm->device);
135 136  
136 137 if (sysfs->ctrl) {
137   - device_remove_file(&dev->pdev->dev, &dev_attr_pstate);
  138 + device_remove_file(nv_device_base(device), &dev_attr_pstate);
138 139 nouveau_object_del(nv_object(drm), NVDRM_DEVICE, NVDRM_CONTROL);
139 140 }
140 141  
... ... @@ -146,6 +147,7 @@
146 147 nouveau_sysfs_init(struct drm_device *dev)
147 148 {
148 149 struct nouveau_drm *drm = nouveau_drm(dev);
  150 + struct nouveau_device *device = nv_device(drm->device);
149 151 struct nouveau_sysfs *sysfs;
150 152 int ret;
151 153  
... ... @@ -156,7 +158,7 @@
156 158 ret = nouveau_object_new(nv_object(drm), NVDRM_DEVICE, NVDRM_CONTROL,
157 159 NV_CONTROL_CLASS, NULL, 0, &sysfs->ctrl);
158 160 if (ret == 0)
159   - device_create_file(&dev->pdev->dev, &dev_attr_pstate);
  161 + device_create_file(nv_device_base(device), &dev_attr_pstate);
160 162  
161 163 return 0;
162 164 }
drivers/gpu/drm/nouveau/nouveau_ttm.c
... ... @@ -354,21 +354,26 @@
354 354 nouveau_ttm_init(struct nouveau_drm *drm)
355 355 {
356 356 struct drm_device *dev = drm->dev;
  357 + struct nouveau_device *device = nv_device(drm->device);
357 358 u32 bits;
358 359 int ret;
359 360  
360 361 bits = nouveau_vmmgr(drm->device)->dma_bits;
361   - if ( drm->agp.stat == ENABLED ||
362   - !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
363   - bits = 32;
  362 + if (nv_device_is_pci(device)) {
  363 + if (drm->agp.stat == ENABLED ||
  364 + !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
  365 + bits = 32;
364 366  
365   - ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
366   - if (ret)
367   - return ret;
  367 + ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
  368 + if (ret)
  369 + return ret;
368 370  
369   - ret = pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
370   - if (ret)
371   - pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(32));
  371 + ret = pci_set_consistent_dma_mask(dev->pdev,
  372 + DMA_BIT_MASK(bits));
  373 + if (ret)
  374 + pci_set_consistent_dma_mask(dev->pdev,
  375 + DMA_BIT_MASK(32));
  376 + }
372 377  
373 378 ret = nouveau_ttm_global_init(drm);
374 379 if (ret)
... ... @@ -396,8 +401,8 @@
396 401 return ret;
397 402 }
398 403  
399   - drm->ttm.mtrr = arch_phys_wc_add(pci_resource_start(dev->pdev, 1),
400   - pci_resource_len(dev->pdev, 1));
  404 + drm->ttm.mtrr = arch_phys_wc_add(nv_device_resource_start(device, 1),
  405 + nv_device_resource_len(device, 1));
401 406  
402 407 /* GART init */
403 408 if (drm->agp.stat != ENABLED) {
drivers/gpu/drm/nouveau/nouveau_vga.c
... ... @@ -84,6 +84,11 @@
84 84 {
85 85 struct drm_device *dev = drm->dev;
86 86 bool runtime = false;
  87 +
  88 + /* only relevant for PCI devices */
  89 + if (!dev->pdev)
  90 + return;
  91 +
87 92 vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode);
88 93  
89 94 if (nouveau_runtime_pm == 1)