Commit 42345d63fd7f46e86ab7ecf90754e7e35213cd1d

Authored by Linus Torvalds

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "Radeon and amdkfd fixes.

  Radeon ones mostly for oops in some test/benchmark functions since
  fencing changes, and one regression fix for old GPUs,

  There is one cirrus regression fix, the 32bpp broke userspace, so this
  hides it behind a module option for the few users who care.

  I'm off for a few days, so this is probably the final pull I have, if
  I see fixes from Intel I'll forward the pull as I should have email"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/cirrus: Limit modes depending on bpp option
  drm/radeon: fix the crash in test functions
  drm/radeon: fix the crash in benchmark functions
  drm/radeon: properly set vm fragment size for TN/RL
  drm/radeon: don't init gpuvm if accel is disabled (v3)
  drm/radeon: fix PLLs on RS880 and older v2
  drm/amdkfd: Don't create BUG due to incorrect user parameter
  drm/amdkfd: max num of queues can't be 0
  drm/amdkfd: Fix bug in accounting of queues

Showing 13 changed files Side-by-side Diff

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
... ... @@ -822,7 +822,7 @@
822 822 * Unconditionally decrement this counter, regardless of the queue's
823 823 * type.
824 824 */
825   - dqm->total_queue_count++;
  825 + dqm->total_queue_count--;
826 826 pr_debug("Total of %d queues are accountable so far\n",
827 827 dqm->total_queue_count);
828 828 mutex_unlock(&dqm->lock);
drivers/gpu/drm/amd/amdkfd/kfd_module.c
... ... @@ -95,10 +95,10 @@
95 95 }
96 96  
97 97 /* Verify module parameters */
98   - if ((max_num_of_queues_per_device < 0) ||
  98 + if ((max_num_of_queues_per_device < 1) ||
99 99 (max_num_of_queues_per_device >
100 100 KFD_MAX_NUM_OF_QUEUES_PER_DEVICE)) {
101   - pr_err("kfd: max_num_of_queues_per_device must be between 0 to KFD_MAX_NUM_OF_QUEUES_PER_DEVICE\n");
  101 + pr_err("kfd: max_num_of_queues_per_device must be between 1 to KFD_MAX_NUM_OF_QUEUES_PER_DEVICE\n");
102 102 return -1;
103 103 }
104 104  
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c
... ... @@ -315,7 +315,11 @@
315 315 BUG_ON(!pqm);
316 316  
317 317 pqn = get_queue_by_qid(pqm, qid);
318   - BUG_ON(!pqn);
  318 + if (!pqn) {
  319 + pr_debug("amdkfd: No queue %d exists for update operation\n",
  320 + qid);
  321 + return -EFAULT;
  322 + }
319 323  
320 324 pqn->q->properties.queue_address = p->queue_address;
321 325 pqn->q->properties.queue_size = p->queue_size;
drivers/gpu/drm/cirrus/cirrus_drv.c
... ... @@ -16,9 +16,12 @@
16 16 #include "cirrus_drv.h"
17 17  
18 18 int cirrus_modeset = -1;
  19 +int cirrus_bpp = 24;
19 20  
20 21 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
21 22 module_param_named(modeset, cirrus_modeset, int, 0400);
  23 +MODULE_PARM_DESC(bpp, "Max bits-per-pixel (default:24)");
  24 +module_param_named(bpp, cirrus_bpp, int, 0400);
22 25  
23 26 /*
24 27 * This is the generic driver code. This binds the driver to the drm core,
drivers/gpu/drm/cirrus/cirrus_drv.h
... ... @@ -262,5 +262,8 @@
262 262  
263 263 int cirrus_bo_push_sysram(struct cirrus_bo *bo);
264 264 int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
  265 +
  266 +extern int cirrus_bpp;
  267 +
265 268 #endif /* __CIRRUS_DRV_H__ */
drivers/gpu/drm/cirrus/cirrus_main.c
... ... @@ -320,6 +320,8 @@
320 320 const int max_pitch = 0x1FF << 3; /* (4096 - 1) & ~111b bytes */
321 321 const int max_size = cdev->mc.vram_size;
322 322  
  323 + if (bpp > cirrus_bpp)
  324 + return false;
323 325 if (bpp > 32)
324 326 return false;
325 327  
drivers/gpu/drm/cirrus/cirrus_mode.c
... ... @@ -501,8 +501,13 @@
501 501 int count;
502 502  
503 503 /* Just add a static list of modes */
504   - count = drm_add_modes_noedid(connector, 1280, 1024);
505   - drm_set_preferred_mode(connector, 1024, 768);
  504 + if (cirrus_bpp <= 24) {
  505 + count = drm_add_modes_noedid(connector, 1280, 1024);
  506 + drm_set_preferred_mode(connector, 1024, 768);
  507 + } else {
  508 + count = drm_add_modes_noedid(connector, 800, 600);
  509 + drm_set_preferred_mode(connector, 800, 600);
  510 + }
506 511 return count;
507 512 }
508 513  
drivers/gpu/drm/radeon/radeon_benchmark.c
... ... @@ -34,7 +34,8 @@
34 34  
35 35 static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
36 36 uint64_t saddr, uint64_t daddr,
37   - int flag, int n)
  37 + int flag, int n,
  38 + struct reservation_object *resv)
38 39 {
39 40 unsigned long start_jiffies;
40 41 unsigned long end_jiffies;
41 42  
... ... @@ -47,12 +48,12 @@
47 48 case RADEON_BENCHMARK_COPY_DMA:
48 49 fence = radeon_copy_dma(rdev, saddr, daddr,
49 50 size / RADEON_GPU_PAGE_SIZE,
50   - NULL);
  51 + resv);
51 52 break;
52 53 case RADEON_BENCHMARK_COPY_BLIT:
53 54 fence = radeon_copy_blit(rdev, saddr, daddr,
54 55 size / RADEON_GPU_PAGE_SIZE,
55   - NULL);
  56 + resv);
56 57 break;
57 58 default:
58 59 DRM_ERROR("Unknown copy method\n");
... ... @@ -120,7 +121,8 @@
120 121  
121 122 if (rdev->asic->copy.dma) {
122 123 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
123   - RADEON_BENCHMARK_COPY_DMA, n);
  124 + RADEON_BENCHMARK_COPY_DMA, n,
  125 + dobj->tbo.resv);
124 126 if (time < 0)
125 127 goto out_cleanup;
126 128 if (time > 0)
... ... @@ -130,7 +132,8 @@
130 132  
131 133 if (rdev->asic->copy.blit) {
132 134 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
133   - RADEON_BENCHMARK_COPY_BLIT, n);
  135 + RADEON_BENCHMARK_COPY_BLIT, n,
  136 + dobj->tbo.resv);
134 137 if (time < 0)
135 138 goto out_cleanup;
136 139 if (time > 0)
drivers/gpu/drm/radeon/radeon_display.c
... ... @@ -960,6 +960,9 @@
960 960 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&
961 961 pll->flags & RADEON_PLL_USE_REF_DIV)
962 962 ref_div_max = pll->reference_div;
  963 + else if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP)
  964 + /* fix for problems on RS880 */
  965 + ref_div_max = min(pll->max_ref_div, 7u);
963 966 else
964 967 ref_div_max = pll->max_ref_div;
965 968  
drivers/gpu/drm/radeon/radeon_gem.c
... ... @@ -146,7 +146,8 @@
146 146 struct radeon_bo_va *bo_va;
147 147 int r;
148 148  
149   - if (rdev->family < CHIP_CAYMAN) {
  149 + if ((rdev->family < CHIP_CAYMAN) ||
  150 + (!rdev->accel_working)) {
150 151 return 0;
151 152 }
152 153  
... ... @@ -176,7 +177,8 @@
176 177 struct radeon_bo_va *bo_va;
177 178 int r;
178 179  
179   - if (rdev->family < CHIP_CAYMAN) {
  180 + if ((rdev->family < CHIP_CAYMAN) ||
  181 + (!rdev->accel_working)) {
180 182 return;
181 183 }
182 184  
drivers/gpu/drm/radeon/radeon_kms.c
... ... @@ -605,14 +605,14 @@
605 605 return -ENOMEM;
606 606 }
607 607  
608   - vm = &fpriv->vm;
609   - r = radeon_vm_init(rdev, vm);
610   - if (r) {
611   - kfree(fpriv);
612   - return r;
613   - }
614   -
615 608 if (rdev->accel_working) {
  609 + vm = &fpriv->vm;
  610 + r = radeon_vm_init(rdev, vm);
  611 + if (r) {
  612 + kfree(fpriv);
  613 + return r;
  614 + }
  615 +
616 616 r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false);
617 617 if (r) {
618 618 radeon_vm_fini(rdev, vm);
619 619  
... ... @@ -668,9 +668,9 @@
668 668 radeon_vm_bo_rmv(rdev, vm->ib_bo_va);
669 669 radeon_bo_unreserve(rdev->ring_tmp_bo.bo);
670 670 }
  671 + radeon_vm_fini(rdev, vm);
671 672 }
672 673  
673   - radeon_vm_fini(rdev, vm);
674 674 kfree(fpriv);
675 675 file_priv->driver_priv = NULL;
676 676 }
drivers/gpu/drm/radeon/radeon_test.c
... ... @@ -119,11 +119,11 @@
119 119 if (ring == R600_RING_TYPE_DMA_INDEX)
120 120 fence = radeon_copy_dma(rdev, gtt_addr, vram_addr,
121 121 size / RADEON_GPU_PAGE_SIZE,
122   - NULL);
  122 + vram_obj->tbo.resv);
123 123 else
124 124 fence = radeon_copy_blit(rdev, gtt_addr, vram_addr,
125 125 size / RADEON_GPU_PAGE_SIZE,
126   - NULL);
  126 + vram_obj->tbo.resv);
127 127 if (IS_ERR(fence)) {
128 128 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
129 129 r = PTR_ERR(fence);
130 130  
... ... @@ -170,11 +170,11 @@
170 170 if (ring == R600_RING_TYPE_DMA_INDEX)
171 171 fence = radeon_copy_dma(rdev, vram_addr, gtt_addr,
172 172 size / RADEON_GPU_PAGE_SIZE,
173   - NULL);
  173 + vram_obj->tbo.resv);
174 174 else
175 175 fence = radeon_copy_blit(rdev, vram_addr, gtt_addr,
176 176 size / RADEON_GPU_PAGE_SIZE,
177   - NULL);
  177 + vram_obj->tbo.resv);
178 178 if (IS_ERR(fence)) {
179 179 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
180 180 r = PTR_ERR(fence);
drivers/gpu/drm/radeon/radeon_vm.c
... ... @@ -743,9 +743,11 @@
743 743 */
744 744  
745 745 /* NI is optimized for 256KB fragments, SI and newer for 64KB */
746   - uint64_t frag_flags = rdev->family == CHIP_CAYMAN ?
  746 + uint64_t frag_flags = ((rdev->family == CHIP_CAYMAN) ||
  747 + (rdev->family == CHIP_ARUBA)) ?
747 748 R600_PTE_FRAG_256KB : R600_PTE_FRAG_64KB;
748   - uint64_t frag_align = rdev->family == CHIP_CAYMAN ? 0x200 : 0x80;
  749 + uint64_t frag_align = ((rdev->family == CHIP_CAYMAN) ||
  750 + (rdev->family == CHIP_ARUBA)) ? 0x200 : 0x80;
749 751  
750 752 uint64_t frag_start = ALIGN(pe_start, frag_align);
751 753 uint64_t frag_end = pe_end & ~(frag_align - 1);