Commit 46fc4c909339f5a84d1679045297d9d2fb596987
Committed by
John W. Linville
John W. Linville
1 parent
25b5632fb3
Exists in
master
and in
20 other branches
ssb: implement spurious tone avoidance
And make use of it in b43. This fixes a regression introduced with 49d55cef5b1925a5c1efb6aaddaa40fc7c693335 b43: N-PHY: implement spurious tone avoidance This commit made BCM4322 use only MCS 0 on channel 13, which of course resulted in performance drop (down to 0.7Mb/s). Reported-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: Stable <stable@vger.kernel.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Showing 3 changed files with 33 additions and 1 deletions Side-by-side Diff
drivers/net/wireless/b43/phy_n.c
drivers/ssb/driver_chipcommon_pmu.c
| ... | ... | @@ -675,4 +675,33 @@ |
| 675 | 675 | return 0; |
| 676 | 676 | } |
| 677 | 677 | } |
| 678 | + | |
| 679 | +void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid) | |
| 680 | +{ | |
| 681 | + u32 pmu_ctl = 0; | |
| 682 | + | |
| 683 | + switch (cc->dev->bus->chip_id) { | |
| 684 | + case 0x4322: | |
| 685 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100070); | |
| 686 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x1014140a); | |
| 687 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888854); | |
| 688 | + if (spuravoid == 1) | |
| 689 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05201828); | |
| 690 | + else | |
| 691 | + ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x05001828); | |
| 692 | + pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD; | |
| 693 | + break; | |
| 694 | + case 43222: | |
| 695 | + /* TODO: BCM43222 requires updating PLLs too */ | |
| 696 | + return; | |
| 697 | + default: | |
| 698 | + ssb_printk(KERN_ERR PFX | |
| 699 | + "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", | |
| 700 | + cc->dev->bus->chip_id); | |
| 701 | + return; | |
| 702 | + } | |
| 703 | + | |
| 704 | + chipco_set32(cc, SSB_CHIPCO_PMU_CTL, pmu_ctl); | |
| 705 | +} | |
| 706 | +EXPORT_SYMBOL_GPL(ssb_pmu_spuravoid_pllupdate); |
include/linux/ssb/ssb_driver_chipcommon.h
| ... | ... | @@ -219,6 +219,7 @@ |
| 219 | 219 | #define SSB_CHIPCO_PMU_CTL 0x0600 /* PMU control */ |
| 220 | 220 | #define SSB_CHIPCO_PMU_CTL_ILP_DIV 0xFFFF0000 /* ILP div mask */ |
| 221 | 221 | #define SSB_CHIPCO_PMU_CTL_ILP_DIV_SHIFT 16 |
| 222 | +#define SSB_CHIPCO_PMU_CTL_PLL_UPD 0x00000400 | |
| 222 | 223 | #define SSB_CHIPCO_PMU_CTL_NOILPONW 0x00000200 /* No ILP on wait */ |
| 223 | 224 | #define SSB_CHIPCO_PMU_CTL_HTREQEN 0x00000100 /* HT req enable */ |
| 224 | 225 | #define SSB_CHIPCO_PMU_CTL_ALPREQEN 0x00000080 /* ALP req enable */ |
| ... | ... | @@ -667,6 +668,7 @@ |
| 667 | 668 | void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc, |
| 668 | 669 | enum ssb_pmu_ldo_volt_id id, u32 voltage); |
| 669 | 670 | void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on); |
| 671 | +void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid); | |
| 670 | 672 | |
| 671 | 673 | #endif /* LINUX_SSB_CHIPCO_H_ */ |