Commit 4b3f686d4aa8ad815dc68a4e8fabd05b1ebb9f2c

Authored by Matt LaPlante
Committed by Adrian Bunk
1 parent bf6ee0ae49

Attack of "the the"s in arch

The patch below corrects multiple occurances of "the the"
typos across several files, both in source comments and KConfig files.
There is no actual code changed, only text.  Note this only affects the /arch
directory, and I believe I could find many more elsewhere. :)

Signed-off-by: Adrian Bunk <bunk@stusta.de>

Showing 14 changed files with 18 additions and 18 deletions Side-by-side Diff

arch/arm/mach-lh7a40x/arch-lpd7a40x.c
... ... @@ -164,7 +164,7 @@
164 164 /* CPLD doesn't have ack capability, but some devices may */
165 165  
166 166 #if defined (CPLD_INTMASK_TOUCH)
167   - /* The touch control *must* mask the the interrupt because the
  167 + /* The touch control *must* mask the interrupt because the
168 168 * interrupt bit is read by the driver to determine if the pen
169 169 * is still down. */
170 170 if (irq == IRQ_TOUCH)
... ... @@ -682,7 +682,7 @@
682 682 depends on ACPI
683 683 default n
684 684 ---help---
685   - This enables the the kernel to boot on EFI platforms using
  685 + This enables the kernel to boot on EFI platforms using
686 686 system configuration information passed to it from the firmware.
687 687 This also enables the kernel to use any EFI runtime services that are
688 688 available (such as the EFI variable services).
arch/i386/pci/fixup.c
... ... @@ -393,7 +393,7 @@
393 393 * We pretend to bring them out of full D3 state, and restore the proper
394 394 * IRQ, PCI cache line size, and BARs, otherwise the device won't function
395 395 * properly. In some cases, the device will generate an interrupt on
396   - * the wrong IRQ line, causing any devices sharing the the line it's
  396 + * the wrong IRQ line, causing any devices sharing the line it's
397 397 * *supposed* to use to be disabled by the kernel's IRQ debug code.
398 398 */
399 399 static u16 toshiba_line_size;
arch/ia64/sn/kernel/xpnet.c
... ... @@ -225,7 +225,7 @@
225 225 skb_put(skb, (msg->size - msg->leadin_ignore - msg->tailout_ignore));
226 226  
227 227 /*
228   - * Move the data over from the the other side.
  228 + * Move the data over from the other side.
229 229 */
230 230 if ((XPNET_VERSION_MINOR(msg->version) == 1) &&
231 231 (msg->embedded_bytes != 0)) {
arch/m68knommu/Kconfig
... ... @@ -495,7 +495,7 @@
495 495 hex "Address of the base of system vectors"
496 496 default "0"
497 497 help
498   - Define the address of the the system vectors. Commonly this is
  498 + Define the address of the system vectors. Commonly this is
499 499 put at the start of RAM, but it doesn't have to be. On ColdFire
500 500 platforms this address is programmed into the VBR register, thus
501 501 actually setting the address to use.
arch/mips/mm/tlbex.c
... ... @@ -1211,7 +1211,7 @@
1211 1211 * Overflow check: For the 64bit handler, we need at least one
1212 1212 * free instruction slot for the wrap-around branch. In worst
1213 1213 * case, if the intended insertion point is a delay slot, we
1214   - * need three, with the the second nop'ed and the third being
  1214 + * need three, with the second nop'ed and the third being
1215 1215 * unused.
1216 1216 */
1217 1217 #ifdef CONFIG_32BIT
arch/parisc/kernel/entry.S
... ... @@ -941,8 +941,8 @@
941 941 * to "proper" values now (otherwise we'll wind up restoring
942 942 * whatever was last stored in the task structure, which might
943 943 * be inconsistent if an interrupt occured while on the gateway
944   - * page) Note that we may be "trashing" values the user put in
945   - * them, but we don't support the the user changing them.
  944 + * page). Note that we may be "trashing" values the user put in
  945 + * them, but we don't support the user changing them.
946 946 */
947 947  
948 948 STREG %r0,PT_SR2(%r16)
arch/powerpc/Kconfig
... ... @@ -1002,7 +1002,7 @@
1002 1002 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1003 1003 help
1004 1004 This option allows you to set the base virtual address
1005   - of the the consistent memory pool. This pool of virtual
  1005 + of the consistent memory pool. This pool of virtual
1006 1006 memory is used to make consistent memory allocations.
1007 1007  
1008 1008 config CONSISTENT_START
... ... @@ -1013,7 +1013,7 @@
1013 1013 bool "Set custom consistent memory pool size"
1014 1014 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1015 1015 help
1016   - This option allows you to set the size of the the
  1016 + This option allows you to set the size of the
1017 1017 consistent memory pool. This pool of virtual memory
1018 1018 is used to make consistent memory allocations.
1019 1019  
... ... @@ -1345,7 +1345,7 @@
1345 1345 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1346 1346 help
1347 1347 This option allows you to set the base virtual address
1348   - of the the consistent memory pool. This pool of virtual
  1348 + of the consistent memory pool. This pool of virtual
1349 1349 memory is used to make consistent memory allocations.
1350 1350  
1351 1351 config CONSISTENT_START
... ... @@ -1356,7 +1356,7 @@
1356 1356 bool "Set custom consistent memory pool size"
1357 1357 depends on ADVANCED_OPTIONS && NOT_COHERENT_CACHE
1358 1358 help
1359   - This option allows you to set the size of the the
  1359 + This option allows you to set the size of the
1360 1360 consistent memory pool. This pool of virtual memory
1361 1361 is used to make consistent memory allocations.
1362 1362  
... ... @@ -102,7 +102,7 @@
102 102 define archhelp
103 103 echo '* linux - Binary kernel image (./linux) - for backward'
104 104 echo ' compatibility only, this creates a hard link to the'
105   - echo ' real kernel binary, the the "vmlinux" binary you'
  105 + echo ' real kernel binary, the "vmlinux" binary you'
106 106 echo ' find in the kernel root.'
107 107 endef
108 108  
arch/um/drivers/line.c
... ... @@ -497,7 +497,7 @@
497 497 }
498 498  
499 499 /* Common setup code for both startup command line and mconsole initialization.
500   - * @lines contains the the array (of size @num) to modify;
  500 + * @lines contains the array (of size @num) to modify;
501 501 * @init is the setup string;
502 502 */
503 503  
arch/um/include/sysdep-x86_64/ptrace_user.h
... ... @@ -55,7 +55,7 @@
55 55 #define PTRACE_OLDSETOPTIONS 21
56 56 #endif
57 57  
58   -/* These are before the system call, so the the system call number is RAX
  58 +/* These are before the system call, so the system call number is RAX
59 59 * rather than ORIG_RAX, and arg4 is R10 rather than RCX
60 60 */
61 61 #define REGS_SYSCALL_NR PT_INDEX(RAX)
arch/v850/kernel/entry.S
... ... @@ -195,7 +195,7 @@
195 195 sst.w lp, PTO+PT_GPR(GPR_LP)[ep]; \
196 196 type ## _STATE_SAVER
197 197 /* Pop a register state pushed by PUSH_STATE, except for the stack pointer,
198   - from the the stack. */
  198 + from the stack. */
199 199 #define POP_STATE(type) \
200 200 mov sp, ep; \
201 201 type ## _STATE_RESTORER; \
arch/xtensa/lib/usercopy.S
... ... @@ -5,10 +5,10 @@
5 5 *
6 6 * DO NOT COMBINE this function with <arch/xtensa/lib/hal/memcopy.S>.
7 7 * It needs to remain separate and distinct. The hal files are part
8   - * of the the Xtensa link-time HAL, and those files may differ per
  8 + * of the Xtensa link-time HAL, and those files may differ per
9 9 * processor configuration. Patching the kernel for another
10 10 * processor configuration includes replacing the hal files, and we
11   - * could loose the special functionality for accessing user-space
  11 + * could lose the special functionality for accessing user-space
12 12 * memory during such a patch. We sacrifice a little code space here
13 13 * in favor to simplify code maintenance.
14 14 *