HACK: ARM: DRA7: PM: Disable CPUIDLE

NOTE: We will not support CPUIDLE for DRA7 for the current release.

It does seem that allowing MPU to hit CSWR in the middle of active
usecase causes DSS to generate underflows, Audio to generate glitches.

Initially, it was suspected to be 'CDDS: OMAP5430-2.0BUG00954'
(OMAPS00292300)
Description:
(note: this is regularization of a problem open since 29-Jun-12)
We are observing that when we enabled cpuidle (where MPU can hit
CSWR state), we are observing DSS FIFO underflow error. After some
debugging we found that if we enable DSS->EMIF static dependency
(OR disable emif HW_AUTO), we no longer see this issue. This is a
temporary hack to work around the problem and definitely cannot be a
solution.

WA:
At OPP_NOM use fast_lock=0 and keep MDLL clock always on (clock gating
disabled)

But, it was quickly determined that even after deny_idle of EMIF or
applying DSS to EMIF static dependency, this issue is not resolved.

Further, on J6eco: Why does hitting the 0x4d000000 address range on
j6eco appears to clean the underflows up? We dont have clear answers or
a root cause yet.

So, disabling CPU_IDLE for now. revert this hack after rootcause. Also
note a related side effect of not having CPUIDLE is marked here:
http://marc.info/?l=linux-omap&m=141046424815199&w=2
Which is also valid for DRA7 and OMAP5 and is under investigation.

See bugs: D-01233, D-01739  s/w discussions.

Signed-off-by: Nishanth Menon <nm@ti.com>