x86, VisWS: turn into generic arch, use generic mpparse code

Signed-off-by: Ingo Molnar <mingo@elte.hu>

x86, VisWS: turn into generic arch, use generic mpparse code
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Ingo Molnar
1 parent 31ac409a79
Showing 4 changed files with 102 additions and 95 deletions Side-by-side Diff
arch/x86/Kconfig
arch/x86/mach-visws/Makefile
arch/x86/mach-visws/mpparse.c
arch/x86/mach-visws/setup_visws.c
@@ -238,7 +238,7 @@
 config X86_MPPARSE
 	def_bool y
 	bool "Enable MPS table"
-	depends on X86_LOCAL_APIC && !X86_VISWS
+	depends on X86_LOCAL_APIC
 	help
 	  For old smp systems that do not have proper acpi support. Newer systems
 	  (esp with 64bit cpus) with acpi support, MADT and DSDT will override it
@@ -247,7 +247,7 @@
 if !ACPI
 config X86_MPPARSE
 	def_bool y
-	depends on X86_LOCAL_APIC && !X86_VISWS
+	depends on X86_LOCAL_APIC
 endif
  
 choice
@@ -5,5 +5,4 @@
 obj-y				:= setup.o setup_visws.o traps.o
  
 obj-$(CONFIG_X86_VISWS_APIC)	+= visws_apic.o
-obj-$(CONFIG_X86_LOCAL_APIC)	+= mpparse.o
-
-#include <linux/init.h>
-#include <linux/smp.h>
-
-#include <asm/smp.h>
-#include <asm/io.h>
-
-#include "cobalt.h"
-#include "mach_apic.h"
-
-extern unsigned int __cpuinitdata maxcpus;
-
-/*
- * The Visual Workstation is Intel MP compliant in the hardware
- * sense, but it doesn't have a BIOS(-configuration table).
- * No problem for Linux.
- */
-
-static void __init MP_processor_info (struct mpc_config_processor *m)
-{
-	int ver, logical_apicid;
-	physid_mask_t apic_cpus;
-
-	if (!(m->mpc_cpuflag & CPU_ENABLED))
-		return;
-
-	logical_apicid = m->mpc_apicid;
-	printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
-	       m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
-	       m->mpc_apicid,
-	       (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
-	       (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
-	       m->mpc_apicver);
-
-	if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
-		boot_cpu_physical_apicid = m->mpc_apicid;
-
-	ver = m->mpc_apicver;
-	if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) {
-		printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
-			m->mpc_apicid, MAX_APICS);
-		return;
-	}
-
-	apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
-	physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
-	/*
-	 * Validate version
-	 */
-	if (ver == 0x0) {
-		printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
-			"fixing up to 0x10. (tell your hw vendor)\n",
-			m->mpc_apicid);
-		ver = 0x10;
-	}
-	apic_version[m->mpc_apicid] = ver;
-}
-
-void __init find_smp_config(void)
-{
-	struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
-	unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
-
-	if (ncpus > CO_CPU_MAX) {
-		printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
-			ncpus, mp);
-
-		ncpus = CO_CPU_MAX;
-	}
-
-	if (ncpus > maxcpus)
-		ncpus = maxcpus;
-
-#ifdef CONFIG_X86_LOCAL_APIC
-	smp_found_config = 1;
-#endif
-	while (ncpus--)
-		MP_processor_info(mp++);
-
-	mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
-}
-
-void __init get_smp_config (void)
-{
-}
@@ -13,13 +13,18 @@
 #include <asm/reboot.h>
 #include <asm/setup.h>
 #include <asm/e820.h>
+#include <asm/smp.h>
 #include <asm/io.h>
  
 #include <mach_ipi.h>
  
 #include "cobalt.h"
 #include "piix4.h"
+#include "mach_apic.h"
  
+#include <linux/init.h>
+#include <linux/smp.h>
+
 char visws_board_type	= -1;
 char visws_board_rev	= -1;
  
@@ -126,6 +131,88 @@
 	outl(PIIX_SPECIAL_STOP, 0xCFC);
 }
  
+static int __init visws_get_smp_config_quirk(unsigned int early)
+{
+	/*
+	 * Prevent MP-table parsing by the generic code:
+	 */
+	return 1;
+}
+
+extern unsigned int __cpuinitdata maxcpus;
+
+/*
+ * The Visual Workstation is Intel MP compliant in the hardware
+ * sense, but it doesn't have a BIOS(-configuration table).
+ * No problem for Linux.
+ */
+
+static void __init MP_processor_info (struct mpc_config_processor *m)
+{
+	int ver, logical_apicid;
+	physid_mask_t apic_cpus;
+
+	if (!(m->mpc_cpuflag & CPU_ENABLED))
+		return;
+
+	logical_apicid = m->mpc_apicid;
+	printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
+	       m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
+	       m->mpc_apicid,
+	       (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
+	       (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
+	       m->mpc_apicver);
+
+	if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
+		boot_cpu_physical_apicid = m->mpc_apicid;
+
+	ver = m->mpc_apicver;
+	if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) {
+		printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
+			m->mpc_apicid, MAX_APICS);
+		return;
+	}
+
+	apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
+	physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
+	/*
+	 * Validate version
+	 */
+	if (ver == 0x0) {
+		printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
+			"fixing up to 0x10. (tell your hw vendor)\n",
+			m->mpc_apicid);
+		ver = 0x10;
+	}
+	apic_version[m->mpc_apicid] = ver;
+}
+
+int __init visws_find_smp_config_quirk(unsigned int reserve)
+{
+	struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
+	unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
+
+	if (ncpus > CO_CPU_MAX) {
+		printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
+			ncpus, mp);
+
+		ncpus = CO_CPU_MAX;
+	}
+
+	if (ncpus > maxcpus)
+		ncpus = maxcpus;
+
+#ifdef CONFIG_X86_LOCAL_APIC
+	smp_found_config = 1;
+#endif
+	while (ncpus--)
+		MP_processor_info(mp++);
+
+	mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
+
+	return 1;
+}
+
 extern int visws_trap_init_quirk(void);
  
 void __init visws_early_detect(void)
  
  
  
@@ -141,26 +228,32 @@
 	/*
 	 * Install special quirks for timer, interrupt and memory setup:
 	 */
-	arch_time_init_quirk = visws_time_init_quirk;
-	arch_pre_intr_init_quirk = visws_pre_intr_init_quirk;
-	arch_memory_setup_quirk = visws_memory_setup_quirk;
+	arch_time_init_quirk		= visws_time_init_quirk;
+	arch_pre_intr_init_quirk	= visws_pre_intr_init_quirk;
+	arch_memory_setup_quirk		= visws_memory_setup_quirk;
  
 	/*
 	 * Fall back to generic behavior for traps:
 	 */
-	arch_intr_init_quirk = NULL;
-	arch_trap_init_quirk = visws_trap_init_quirk;
+	arch_intr_init_quirk		= NULL;
+	arch_trap_init_quirk		= visws_trap_init_quirk;
  
 	/*
 	 * Install reboot quirks:
 	 */
-	pm_power_off = visws_machine_power_off;
-	machine_ops.emergency_restart = visws_machine_emergency_restart;
+	pm_power_off			= visws_machine_power_off;
+	machine_ops.emergency_restart	= visws_machine_emergency_restart;
  
 	/*
 	 * Do not use broadcast IPIs:
 	 */
 	no_broadcast = 0;
+
+	/*
+	 * Override generic MP-table parsing:
+	 */
+	mach_get_smp_config_quirk	= visws_get_smp_config_quirk;
+	mach_find_smp_config_quirk	= visws_find_smp_config_quirk;
  
 	/*
 	 * Get Board rev.
...	...	@@ -238,7 +238,7 @@
238	238	config X86_MPPARSE
239	239	def_bool y
240	240	bool "Enable MPS table"
241		- depends on X86_LOCAL_APIC && !X86_VISWS
	241	+ depends on X86_LOCAL_APIC
242	242	help
243	243	For old smp systems that do not have proper acpi support. Newer systems
244	244	(esp with 64bit cpus) with acpi support, MADT and DSDT will override it
...	...	@@ -247,7 +247,7 @@
247	247	if !ACPI
248	248	config X86_MPPARSE
249	249	def_bool y
250		- depends on X86_LOCAL_APIC && !X86_VISWS
	250	+ depends on X86_LOCAL_APIC
251	251	endif
252	252
253	253	choice
...	...	@@ -5,5 +5,4 @@
5	5	obj-y := setup.o setup_visws.o traps.o
6	6
7	7	obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o
8		-obj-$(CONFIG_X86_LOCAL_APIC) += mpparse.o
1		-
2		-#include <linux/init.h>
3		-#include <linux/smp.h>
4		-
5		-#include <asm/smp.h>
6		-#include <asm/io.h>
7		-
8		-#include "cobalt.h"
9		-#include "mach_apic.h"
10		-
11		-extern unsigned int __cpuinitdata maxcpus;
12		-
13		-/*
14		- * The Visual Workstation is Intel MP compliant in the hardware
15		- * sense, but it doesn't have a BIOS(-configuration table).
16		- * No problem for Linux.
17		- */
18		-
19		-static void __init MP_processor_info (struct mpc_config_processor *m)
20		-{
21		- int ver, logical_apicid;
22		- physid_mask_t apic_cpus;
23		-
24		- if (!(m->mpc_cpuflag & CPU_ENABLED))
25		- return;
26		-
27		- logical_apicid = m->mpc_apicid;
28		- printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
29		- m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
30		- m->mpc_apicid,
31		- (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
32		- (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
33		- m->mpc_apicver);
34		-
35		- if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
36		- boot_cpu_physical_apicid = m->mpc_apicid;
37		-
38		- ver = m->mpc_apicver;
39		- if ((ver >= 0x14 && m->mpc_apicid >= 0xff) \|\| m->mpc_apicid >= 0xf) {
40		- printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
41		- m->mpc_apicid, MAX_APICS);
42		- return;
43		- }
44		-
45		- apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
46		- physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
47		- /*
48		- * Validate version
49		- */
50		- if (ver == 0x0) {
51		- printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
52		- "fixing up to 0x10. (tell your hw vendor)\n",
53		- m->mpc_apicid);
54		- ver = 0x10;
55		- }
56		- apic_version[m->mpc_apicid] = ver;
57		-}
58		-
59		-void __init find_smp_config(void)
60		-{
61		- struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
62		- unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
63		-
64		- if (ncpus > CO_CPU_MAX) {
65		- printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
66		- ncpus, mp);
67		-
68		- ncpus = CO_CPU_MAX;
69		- }
70		-
71		- if (ncpus > maxcpus)
72		- ncpus = maxcpus;
73		-
74		-#ifdef CONFIG_X86_LOCAL_APIC
75		- smp_found_config = 1;
76		-#endif
77		- while (ncpus--)
78		- MP_processor_info(mp++);
79		-
80		- mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
81		-}
82		-
83		-void __init get_smp_config (void)
84		-{
85		-}
...	...	@@ -13,13 +13,18 @@
13	13	#include <asm/reboot.h>
14	14	#include <asm/setup.h>
15	15	#include <asm/e820.h>
	16	+#include <asm/smp.h>
16	17	#include <asm/io.h>
17	18
18	19	#include <mach_ipi.h>
19	20
20	21	#include "cobalt.h"
21	22	#include "piix4.h"
	23	+#include "mach_apic.h"
22	24
	25	+#include <linux/init.h>
	26	+#include <linux/smp.h>
	27	+
23	28	char visws_board_type = -1;
24	29	char visws_board_rev = -1;
25	30
...	...	@@ -126,6 +131,88 @@
126	131	outl(PIIX_SPECIAL_STOP, 0xCFC);
127	132	}
128	133
	134	+static int __init visws_get_smp_config_quirk(unsigned int early)
	135	+{
	136	+ /*
	137	+ * Prevent MP-table parsing by the generic code:
	138	+ */
	139	+ return 1;
	140	+}
	141	+
	142	+extern unsigned int __cpuinitdata maxcpus;
	143	+
	144	+/*
	145	+ * The Visual Workstation is Intel MP compliant in the hardware
	146	+ * sense, but it doesn't have a BIOS(-configuration table).
	147	+ * No problem for Linux.
	148	+ */
	149	+
	150	+static void __init MP_processor_info (struct mpc_config_processor *m)
	151	+{
	152	+ int ver, logical_apicid;
	153	+ physid_mask_t apic_cpus;
	154	+
	155	+ if (!(m->mpc_cpuflag & CPU_ENABLED))
	156	+ return;
	157	+
	158	+ logical_apicid = m->mpc_apicid;
	159	+ printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
	160	+ m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
	161	+ m->mpc_apicid,
	162	+ (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
	163	+ (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
	164	+ m->mpc_apicver);
	165	+
	166	+ if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
	167	+ boot_cpu_physical_apicid = m->mpc_apicid;
	168	+
	169	+ ver = m->mpc_apicver;
	170	+ if ((ver >= 0x14 && m->mpc_apicid >= 0xff) \|\| m->mpc_apicid >= 0xf) {
	171	+ printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
	172	+ m->mpc_apicid, MAX_APICS);
	173	+ return;
	174	+ }
	175	+
	176	+ apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
	177	+ physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
	178	+ /*
	179	+ * Validate version
	180	+ */
	181	+ if (ver == 0x0) {
	182	+ printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
	183	+ "fixing up to 0x10. (tell your hw vendor)\n",
	184	+ m->mpc_apicid);
	185	+ ver = 0x10;
	186	+ }
	187	+ apic_version[m->mpc_apicid] = ver;
	188	+}
	189	+
	190	+int __init visws_find_smp_config_quirk(unsigned int reserve)
	191	+{
	192	+ struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
	193	+ unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
	194	+
	195	+ if (ncpus > CO_CPU_MAX) {
	196	+ printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
	197	+ ncpus, mp);
	198	+
	199	+ ncpus = CO_CPU_MAX;
	200	+ }
	201	+
	202	+ if (ncpus > maxcpus)
	203	+ ncpus = maxcpus;
	204	+
	205	+#ifdef CONFIG_X86_LOCAL_APIC
	206	+ smp_found_config = 1;
	207	+#endif
	208	+ while (ncpus--)
	209	+ MP_processor_info(mp++);
	210	+
	211	+ mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
	212	+
	213	+ return 1;
	214	+}
	215	+
129	216	extern int visws_trap_init_quirk(void);
130	217
131	218	void __init visws_early_detect(void)
132	219
133	220
134	221
...	...	@@ -141,26 +228,32 @@
141	228	/*
142	229	* Install special quirks for timer, interrupt and memory setup:
143	230	*/
144		- arch_time_init_quirk = visws_time_init_quirk;
145		- arch_pre_intr_init_quirk = visws_pre_intr_init_quirk;
146		- arch_memory_setup_quirk = visws_memory_setup_quirk;
	231	+ arch_time_init_quirk = visws_time_init_quirk;
	232	+ arch_pre_intr_init_quirk = visws_pre_intr_init_quirk;
	233	+ arch_memory_setup_quirk = visws_memory_setup_quirk;
147	234
148	235	/*
149	236	* Fall back to generic behavior for traps:
150	237	*/
151		- arch_intr_init_quirk = NULL;
152		- arch_trap_init_quirk = visws_trap_init_quirk;
	238	+ arch_intr_init_quirk = NULL;
	239	+ arch_trap_init_quirk = visws_trap_init_quirk;
153	240
154	241	/*
155	242	* Install reboot quirks:
156	243	*/
157		- pm_power_off = visws_machine_power_off;
158		- machine_ops.emergency_restart = visws_machine_emergency_restart;
	244	+ pm_power_off = visws_machine_power_off;
	245	+ machine_ops.emergency_restart = visws_machine_emergency_restart;
159	246
160	247	/*
161	248	* Do not use broadcast IPIs:
162	249	*/
163	250	no_broadcast = 0;
	251	+
	252	+ /*
	253	+ * Override generic MP-table parsing:
	254	+ */
	255	+ mach_get_smp_config_quirk = visws_get_smp_config_quirk;
	256	+ mach_find_smp_config_quirk = visws_find_smp_config_quirk;
164	257
165	258	/*
166	259	* Get Board rev.