Eric Lee / smarc-ti-linux-kernel

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Commit 5e4da530a5348e53bbb9f6f7f73c9afc67ed6c35

Authored by Anton Blanchard
Committed by Benjamin Herrenschmidt
1 parent 6feff6d4a5
Exists in master and in 16 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-01.00.00, processor-sdk-linux-02.00.01, smarc-ti-linux-3.14.y, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.14.y, ti-linux-3.15.y, ti-lsk-linux-4.1.y

powerpc/powernv: Fix some PCI sparse errors and one LE bug 

pnv_pci_setup_bml_iommu was missing a byteswap of a device
tree property.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

Showing 5 changed files with 19 additions and 19 deletions Side-by-side Diff

arch/powerpc/include/asm/opal.h
Diff comments   View file @ 5e4da53
... ... @@ -551,7 +551,7 @@
551 551 int64_t opal_cec_reboot(void);
552 552 int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
553 553 int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
554   -int64_t opal_handle_interrupt(uint64_t isn, uint64_t *outstanding_event_mask);
  554 +int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
555 555 int64_t opal_poll_events(__be64 *outstanding_event_mask);
556 556 int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
557 557 uint64_t tce_mem_size);
558 558  
... ... @@ -560,9 +560,9 @@
560 560 int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
561 561 uint64_t offset, uint8_t *data);
562 562 int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
563   - uint64_t offset, uint16_t *data);
  563 + uint64_t offset, __be16 *data);
564 564 int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
565   - uint64_t offset, uint32_t *data);
  565 + uint64_t offset, __be32 *data);
566 566 int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
567 567 uint64_t offset, uint8_t data);
568 568 int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
569 569  
... ... @@ -570,14 +570,14 @@
570 570 int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
571 571 uint64_t offset, uint32_t data);
572 572 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
573   -int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority);
  573 +int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
574 574 int64_t opal_register_exception_handler(uint64_t opal_exception,
575 575 uint64_t handler_address,
576 576 uint64_t glue_cache_line);
577 577 int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
578 578 uint8_t *freeze_state,
579   - uint16_t *pci_error_type,
580   - uint64_t *phb_status);
  579 + __be16 *pci_error_type,
  580 + __be64 *phb_status);
581 581 int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
582 582 uint64_t eeh_action_token);
583 583 int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
584 584  
585 585  
... ... @@ -614,13 +614,13 @@
614 614 int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
615 615 uint32_t xive_num);
616 616 int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
617   - int32_t *interrupt_source_number);
  617 + __be32 *interrupt_source_number);
618 618 int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
619   - uint8_t msi_range, uint32_t *msi_address,
620   - uint32_t *message_data);
  619 + uint8_t msi_range, __be32 *msi_address,
  620 + __be32 *message_data);
621 621 int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
622 622 uint32_t xive_num, uint8_t msi_range,
623   - uint64_t *msi_address, uint32_t *message_data);
  623 + __be64 *msi_address, __be32 *message_data);
624 624 int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
625 625 int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
626 626 int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
... ... @@ -642,7 +642,7 @@
642 642 int64_t opal_pci_reinit(uint64_t phb_id, uint8_t reinit_scope);
643 643 int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
644 644 int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
645   -int64_t opal_get_epow_status(uint64_t *status);
  645 +int64_t opal_get_epow_status(__be64 *status);
646 646 int64_t opal_set_system_attention_led(uint8_t led_action);
647 647 int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
648 648 uint16_t *pci_error_type, uint16_t *severity);
arch/powerpc/platforms/powernv/opal.c
Diff comments   View file @ 5e4da53
... ... @@ -366,7 +366,7 @@
366 366  
367 367 static irqreturn_t opal_interrupt(int irq, void *data)
368 368 {
369   - uint64_t events;
  369 + __be64 events;
370 370  
371 371 opal_handle_interrupt(virq_to_hw(irq), &events);
372 372  
arch/powerpc/platforms/powernv/pci-ioda.c
Diff comments   View file @ 5e4da53
... ... @@ -455,7 +455,7 @@
455 455 }
456 456  
457 457 static void pnv_pci_ioda1_tce_invalidate(struct iommu_table *tbl,
458   - u64 *startp, u64 *endp)
  458 + __be64 *startp, __be64 *endp)
459 459 {
460 460 __be64 __iomem *invalidate = (__be64 __iomem *)tbl->it_index;
461 461 unsigned long start, end, inc;
... ... @@ -496,7 +496,7 @@
496 496  
497 497 static void pnv_pci_ioda2_tce_invalidate(struct pnv_ioda_pe *pe,
498 498 struct iommu_table *tbl,
499   - u64 *startp, u64 *endp)
  499 + __be64 *startp, __be64 *endp)
500 500 {
501 501 unsigned long start, end, inc;
502 502 __be64 __iomem *invalidate = (__be64 __iomem *)tbl->it_index;
... ... @@ -521,7 +521,7 @@
521 521 }
522 522  
523 523 void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
524   - u64 *startp, u64 *endp)
  524 + __be64 *startp, __be64 *endp)
525 525 {
526 526 struct pnv_ioda_pe *pe = container_of(tbl, struct pnv_ioda_pe,
527 527 tce32_table);
arch/powerpc/platforms/powernv/pci.c
Diff comments   View file @ 5e4da53
... ... @@ -412,7 +412,7 @@
412 412 if (direction != DMA_TO_DEVICE)
413 413 proto_tce |= TCE_PCI_WRITE;
414 414  
415   - tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset;
  415 + tces = tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
416 416 rpn = __pa(uaddr) >> TCE_SHIFT;
417 417  
418 418 while (npages--)
... ... @@ -432,7 +432,7 @@
432 432 {
433 433 __be64 *tcep, *tces;
434 434  
435   - tces = tcep = ((u64 *)tbl->it_base) + index - tbl->it_offset;
  435 + tces = tcep = ((__be64 *)tbl->it_base) + index - tbl->it_offset;
436 436  
437 437 while (npages--)
438 438 *(tcep++) = cpu_to_be64(0);
... ... @@ -484,7 +484,7 @@
484 484 swinvp = of_get_property(hose->dn, "linux,tce-sw-invalidate-info",
485 485 NULL);
486 486 if (swinvp) {
487   - tbl->it_busno = swinvp[1];
  487 + tbl->it_busno = be64_to_cpu(swinvp[1]);
488 488 tbl->it_index = (unsigned long)ioremap(be64_to_cpup(swinvp), 8);
489 489 tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
490 490 }
arch/powerpc/platforms/powernv/pci.h
Diff comments   View file @ 5e4da53
... ... @@ -193,7 +193,7 @@
193 193 extern void pnv_pci_init_ioda_hub(struct device_node *np);
194 194 extern void pnv_pci_init_ioda2_phb(struct device_node *np);
195 195 extern void pnv_pci_ioda_tce_invalidate(struct iommu_table *tbl,
196   - u64 *startp, u64 *endp);
  196 + __be64 *startp, __be64 *endp);
197 197  
198 198 #endif /* __POWERNV_PCI_H */