Eric Lee / smarc-ti-linux-kernel

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Commit 5f01feb8b97a4d65caa1456cb12f0f770497347f

Authored by Linus Torvalds
2 parents 555e5986ba 08b964ff3c
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm 

Pull ARM fixes from Russell King:
 "Two fixes this time, one to ensure that the kuser helper option
  depends on MMU as they aren't available for noMMU targets (and if the
  option is selected, we end up oopsing.)

  The second fix plugs a corner case with the decompressor, ensuring
  that the instruction stream can see the relocated code in every case
  on ARMv7 CPUs"

* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: 8198/1: make kuser helpers depend on MMU
  ARM: 8191/1: decompressor: ensure I-side picks up relocated code

Showing 2 changed files Side-by-side Diff

arch/arm/boot/compressed/head.S
Diff comments   View file @ 5f01feb
... ... @@ -397,8 +397,7 @@
397 397 add sp, sp, r6
398 398 #endif
399 399  
400   - tst r4, #1
401   - bleq cache_clean_flush
  400 + bl cache_clean_flush
402 401  
403 402 adr r0, BSYM(restart)
404 403 add r0, r0, r6
... ... @@ -1047,6 +1046,8 @@
1047 1046 b call_cache_fn
1048 1047  
1049 1048 __armv4_mpu_cache_flush:
  1049 + tst r4, #1
  1050 + movne pc, lr
1050 1051 mov r2, #1
1051 1052 mov r3, #0
1052 1053 mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache
... ... @@ -1064,6 +1065,8 @@
1064 1065 mov pc, lr
1065 1066  
1066 1067 __fa526_cache_flush:
  1068 + tst r4, #1
  1069 + movne pc, lr
1067 1070 mov r1, #0
1068 1071 mcr p15, 0, r1, c7, c14, 0 @ clean and invalidate D cache
1069 1072 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1070 1073  
1071 1074  
... ... @@ -1072,13 +1075,16 @@
1072 1075  
1073 1076 __armv6_mmu_cache_flush:
1074 1077 mov r1, #0
1075   - mcr p15, 0, r1, c7, c14, 0 @ clean+invalidate D
  1078 + tst r4, #1
  1079 + mcreq p15, 0, r1, c7, c14, 0 @ clean+invalidate D
1076 1080 mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
1077   - mcr p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
  1081 + mcreq p15, 0, r1, c7, c15, 0 @ clean+invalidate unified
1078 1082 mcr p15, 0, r1, c7, c10, 4 @ drain WB
1079 1083 mov pc, lr
1080 1084  
1081 1085 __armv7_mmu_cache_flush:
  1086 + tst r4, #1
  1087 + bne iflush
1082 1088 mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
1083 1089 tst r10, #0xf << 16 @ hierarchical cache (ARMv7)
1084 1090 mov r10, #0
... ... @@ -1139,6 +1145,8 @@
1139 1145 mov pc, lr
1140 1146  
1141 1147 __armv5tej_mmu_cache_flush:
  1148 + tst r4, #1
  1149 + movne pc, lr
1142 1150 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache
1143 1151 bne 1b
1144 1152 mcr p15, 0, r0, c7, c5, 0 @ flush I cache
... ... @@ -1146,6 +1154,8 @@
1146 1154 mov pc, lr
1147 1155  
1148 1156 __armv4_mmu_cache_flush:
  1157 + tst r4, #1
  1158 + movne pc, lr
1149 1159 mov r2, #64*1024 @ default: 32K dcache size (*2)
1150 1160 mov r11, #32 @ default: 32 byte line size
1151 1161 mrc p15, 0, r3, c0, c0, 1 @ read cache type
... ... @@ -1179,6 +1189,8 @@
1179 1189  
1180 1190 __armv3_mmu_cache_flush:
1181 1191 __armv3_mpu_cache_flush:
  1192 + tst r4, #1
  1193 + movne pc, lr
1182 1194 mov r1, #0
1183 1195 mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
1184 1196 mov pc, lr
... ... @@ -798,6 +798,7 @@
798 798  
799 799 config KUSER_HELPERS
800 800 bool "Enable kuser helpers in vector page" if !NEED_KUSER_HELPERS
  801 + depends on MMU
801 802 default y
802 803 help
803 804 Warning: disabling this option may break user programs.