dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding

For most devices the FIFO configuration is the same i.e. when half FIFO size is available/filled, a source/destination request is serviced. But USART devices have to do it when there is enough space/data available to perform a single AHB access so the ASAP configuration. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
For most devices the FIFO configuration is the same i.e. when half FIFO size is available/filled, a source/destination request is serviced. But USART devices have to do it when there is enough space/data available to perform a single AHB access so the ASAP configuration. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Ludovic Desroches · Vinod Koul
1 parent 764037c6f5
Showing 2 changed files with 26 additions and 6 deletions Side-by-side Diff
Documentation/devicetree/bindings/dma/atmel-dma.txt
drivers/dma/at_hdmac.c
@@ -24,8 +24,11 @@
 1. A phandle pointing to the DMA controller.
 2. The memory interface (16 most significant bits), the peripheral interface
 (16 less significant bits).
-3. The peripheral identifier for the hardware handshaking interface. The
-identifier can be different for tx and rx.
+3. Parameters for the at91 DMA configuration register which are device
+dependant:
+  - bit 7-0: peripheral identifier for the hardware handshaking interface. The
+  identifier can be different for tx and rx.
+  - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.
  
 Example:
  
@@ -14,6 +14,7 @@
  * found on AT91SAM9263.
  */
  
+#include <dt-bindings/dma/at91.h>
 #include <linux/clk.h>
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
  
  
@@ -1320,15 +1321,31 @@
 	atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL);
 	if (!atslave)
 		return NULL;
+
+	atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW;
 	/*
 	 * We can fill both SRC_PER and DST_PER, one of these fields will be
 	 * ignored depending on DMA transfer direction.
 	 */
-	per_id = dma_spec->args[1];
-	atslave->cfg = ATC_FIFOCFG_HALFFIFO
-		     | ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW
-		     | ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id)
+	per_id = dma_spec->args[1] & AT91_DMA_CFG_PER_ID_MASK;
+	atslave->cfg |= ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id)
 		     | ATC_SRC_PER_MSB(per_id) | ATC_SRC_PER(per_id);
+	/*
+	 * We have to translate the value we get from the device tree since
+	 * the half FIFO configuration value had to be 0 to keep backward
+	 * compatibility.
+	 */
+	switch (dma_spec->args[1] & AT91_DMA_CFG_FIFOCFG_MASK) {
+	case AT91_DMA_CFG_FIFOCFG_ALAP:
+		atslave->cfg |= ATC_FIFOCFG_LARGESTBURST;
+		break;
+	case AT91_DMA_CFG_FIFOCFG_ASAP:
+		atslave->cfg |= ATC_FIFOCFG_ENOUGHSPACE;
+		break;
+	case AT91_DMA_CFG_FIFOCFG_HALF:
+	default:
+		atslave->cfg |= ATC_FIFOCFG_HALFFIFO;
+	}
 	atslave->dma_dev = &dmac_pdev->dev;
  
 	chan = dma_request_channel(mask, at_dma_filter, atslave);
...	...	@@ -24,8 +24,11 @@
24	24	1. A phandle pointing to the DMA controller.
25	25	2. The memory interface (16 most significant bits), the peripheral interface
26	26	(16 less significant bits).
27		-3. The peripheral identifier for the hardware handshaking interface. The
28		-identifier can be different for tx and rx.
	27	+3. Parameters for the at91 DMA configuration register which are device
	28	+dependant:
	29	+ - bit 7-0: peripheral identifier for the hardware handshaking interface. The
	30	+ identifier can be different for tx and rx.
	31	+ - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP.
29	32
30	33	Example:
31	34
...	...	@@ -14,6 +14,7 @@
14	14	* found on AT91SAM9263.
15	15	*/
16	16
	17	+#include <dt-bindings/dma/at91.h>
17	18	#include <linux/clk.h>
18	19	#include <linux/dmaengine.h>
19	20	#include <linux/dma-mapping.h>
20	21
21	22
...	...	@@ -1320,15 +1321,31 @@
1320	1321	atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL);
1321	1322	if (!atslave)
1322	1323	return NULL;
	1324	+
	1325	+ atslave->cfg = ATC_DST_H2SEL_HW \| ATC_SRC_H2SEL_HW;
1323	1326	/*
1324	1327	* We can fill both SRC_PER and DST_PER, one of these fields will be
1325	1328	* ignored depending on DMA transfer direction.
1326	1329	*/
1327		- per_id = dma_spec->args[1];
1328		- atslave->cfg = ATC_FIFOCFG_HALFFIFO
1329		- \| ATC_DST_H2SEL_HW \| ATC_SRC_H2SEL_HW
1330		- \| ATC_DST_PER_MSB(per_id) \| ATC_DST_PER(per_id)
	1330	+ per_id = dma_spec->args[1] & AT91_DMA_CFG_PER_ID_MASK;
	1331	+ atslave->cfg \|= ATC_DST_PER_MSB(per_id) \| ATC_DST_PER(per_id)
1331	1332	\| ATC_SRC_PER_MSB(per_id) \| ATC_SRC_PER(per_id);
	1333	+ /*
	1334	+ * We have to translate the value we get from the device tree since
	1335	+ * the half FIFO configuration value had to be 0 to keep backward
	1336	+ * compatibility.
	1337	+ */
	1338	+ switch (dma_spec->args[1] & AT91_DMA_CFG_FIFOCFG_MASK) {
	1339	+ case AT91_DMA_CFG_FIFOCFG_ALAP:
	1340	+ atslave->cfg \|= ATC_FIFOCFG_LARGESTBURST;
	1341	+ break;
	1342	+ case AT91_DMA_CFG_FIFOCFG_ASAP:
	1343	+ atslave->cfg \|= ATC_FIFOCFG_ENOUGHSPACE;
	1344	+ break;
	1345	+ case AT91_DMA_CFG_FIFOCFG_HALF:
	1346	+ default:
	1347	+ atslave->cfg \|= ATC_FIFOCFG_HALFFIFO;
	1348	+ }
1332	1349	atslave->dma_dev = &dmac_pdev->dev;
1333	1350
1334	1351	chan = dma_request_channel(mask, at_dma_filter, atslave);