Commit 674366e90e5a2430e3ddef40ce51512d681944e4
Exists in
master
and in
13 other branches
Merge tag 'pci-v3.15-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: "These are fixes for a powerpc NULL pointer dereference, an OF interrupt mapping issue on some of the new host bridges, and a DesignWare iATU issue. Host bridge drivers - Fix OF interrupt mapping for DesignWare, R-Car, Tegra (Lucas Stach) - Fix DesignWare iATU programming (Mohit Kumar) Miscellaneous - Fix powerpc NULL dereference from list_for_each_entry() update (Mike Qiu)" * tag 'pci-v3.15-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: tegra: Use new OF interrupt mapping when possible PCI: rcar: Use new OF interrupt mapping when possible PCI: designware: Use new OF interrupt mapping when possible PCI: designware: Fix iATU programming for cfg1, io and mem viewport PCI: designware: Fix comment for setting number of lanes powerpc/PCI: Fix NULL dereference in sys_pciconfig_iobase() list traversal
Showing 4 changed files Side-by-side Diff
arch/powerpc/kernel/pci_64.c
... | ... | @@ -208,7 +208,7 @@ |
208 | 208 | unsigned long in_devfn) |
209 | 209 | { |
210 | 210 | struct pci_controller* hose; |
211 | - struct pci_bus *bus = NULL; | |
211 | + struct pci_bus *tmp_bus, *bus = NULL; | |
212 | 212 | struct device_node *hose_node; |
213 | 213 | |
214 | 214 | /* Argh ! Please forgive me for that hack, but that's the |
215 | 215 | |
... | ... | @@ -229,10 +229,12 @@ |
229 | 229 | * used on pre-domains setup. We return the first match |
230 | 230 | */ |
231 | 231 | |
232 | - list_for_each_entry(bus, &pci_root_buses, node) { | |
233 | - if (in_bus >= bus->number && in_bus <= bus->busn_res.end) | |
232 | + list_for_each_entry(tmp_bus, &pci_root_buses, node) { | |
233 | + if (in_bus >= tmp_bus->number && | |
234 | + in_bus <= tmp_bus->busn_res.end) { | |
235 | + bus = tmp_bus; | |
234 | 236 | break; |
235 | - bus = NULL; | |
237 | + } | |
236 | 238 | } |
237 | 239 | if (bus == NULL || bus->dev.of_node == NULL) |
238 | 240 | return -ENODEV; |
drivers/pci/host/pci-rcar-gen2.c
... | ... | @@ -15,6 +15,7 @@ |
15 | 15 | #include <linux/io.h> |
16 | 16 | #include <linux/kernel.h> |
17 | 17 | #include <linux/module.h> |
18 | +#include <linux/of_pci.h> | |
18 | 19 | #include <linux/pci.h> |
19 | 20 | #include <linux/platform_device.h> |
20 | 21 | #include <linux/pm_runtime.h> |
21 | 22 | |
... | ... | @@ -180,8 +181,13 @@ |
180 | 181 | { |
181 | 182 | struct pci_sys_data *sys = dev->bus->sysdata; |
182 | 183 | struct rcar_pci_priv *priv = sys->private_data; |
184 | + int irq; | |
183 | 185 | |
184 | - return priv->irq; | |
186 | + irq = of_irq_parse_and_map_pci(dev, slot, pin); | |
187 | + if (!irq) | |
188 | + irq = priv->irq; | |
189 | + | |
190 | + return irq; | |
185 | 191 | } |
186 | 192 | |
187 | 193 | #ifdef CONFIG_PCI_DEBUG |
drivers/pci/host/pci-tegra.c
... | ... | @@ -639,10 +639,15 @@ |
639 | 639 | static int tegra_pcie_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin) |
640 | 640 | { |
641 | 641 | struct tegra_pcie *pcie = sys_to_pcie(pdev->bus->sysdata); |
642 | + int irq; | |
642 | 643 | |
643 | 644 | tegra_cpuidle_pcie_irqs_in_use(); |
644 | 645 | |
645 | - return pcie->irq; | |
646 | + irq = of_irq_parse_and_map_pci(pdev, slot, pin); | |
647 | + if (!irq) | |
648 | + irq = pcie->irq; | |
649 | + | |
650 | + return irq; | |
646 | 651 | } |
647 | 652 | |
648 | 653 | static void tegra_pcie_add_bus(struct pci_bus *bus) |
drivers/pci/host/pcie-designware.c
... | ... | @@ -17,6 +17,7 @@ |
17 | 17 | #include <linux/module.h> |
18 | 18 | #include <linux/msi.h> |
19 | 19 | #include <linux/of_address.h> |
20 | +#include <linux/of_pci.h> | |
20 | 21 | #include <linux/pci.h> |
21 | 22 | #include <linux/pci_regs.h> |
22 | 23 | #include <linux/types.h> |
... | ... | @@ -490,7 +491,7 @@ |
490 | 491 | dw_pci.nr_controllers = 1; |
491 | 492 | dw_pci.private_data = (void **)&pp; |
492 | 493 | |
493 | - pci_common_init(&dw_pci); | |
494 | + pci_common_init_dev(pp->dev, &dw_pci); | |
494 | 495 | pci_assign_unassigned_resources(); |
495 | 496 | #ifdef CONFIG_PCI_DOMAINS |
496 | 497 | dw_pci.domain++; |
497 | 498 | |
... | ... | @@ -520,13 +521,13 @@ |
520 | 521 | dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, |
521 | 522 | PCIE_ATU_VIEWPORT); |
522 | 523 | dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_CFG1, PCIE_ATU_CR1); |
523 | - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
524 | 524 | dw_pcie_writel_rc(pp, pp->cfg1_base, PCIE_ATU_LOWER_BASE); |
525 | 525 | dw_pcie_writel_rc(pp, (pp->cfg1_base >> 32), PCIE_ATU_UPPER_BASE); |
526 | 526 | dw_pcie_writel_rc(pp, pp->cfg1_base + pp->config.cfg1_size - 1, |
527 | 527 | PCIE_ATU_LIMIT); |
528 | 528 | dw_pcie_writel_rc(pp, busdev, PCIE_ATU_LOWER_TARGET); |
529 | 529 | dw_pcie_writel_rc(pp, 0, PCIE_ATU_UPPER_TARGET); |
530 | + dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
530 | 531 | } |
531 | 532 | |
532 | 533 | static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp) |
... | ... | @@ -535,7 +536,6 @@ |
535 | 536 | dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0, |
536 | 537 | PCIE_ATU_VIEWPORT); |
537 | 538 | dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1); |
538 | - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
539 | 539 | dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE); |
540 | 540 | dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE); |
541 | 541 | dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1, |
... | ... | @@ -543,6 +543,7 @@ |
543 | 543 | dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET); |
544 | 544 | dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr), |
545 | 545 | PCIE_ATU_UPPER_TARGET); |
546 | + dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
546 | 547 | } |
547 | 548 | |
548 | 549 | static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp) |
... | ... | @@ -551,7 +552,6 @@ |
551 | 552 | dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1, |
552 | 553 | PCIE_ATU_VIEWPORT); |
553 | 554 | dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1); |
554 | - dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
555 | 555 | dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE); |
556 | 556 | dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE); |
557 | 557 | dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1, |
... | ... | @@ -559,6 +559,7 @@ |
559 | 559 | dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET); |
560 | 560 | dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr), |
561 | 561 | PCIE_ATU_UPPER_TARGET); |
562 | + dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2); | |
562 | 563 | } |
563 | 564 | |
564 | 565 | static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, |
... | ... | @@ -723,7 +724,7 @@ |
723 | 724 | |
724 | 725 | if (pp) { |
725 | 726 | pp->root_bus_nr = sys->busnr; |
726 | - bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops, | |
727 | + bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops, | |
727 | 728 | sys, &sys->resources); |
728 | 729 | } else { |
729 | 730 | bus = NULL; |
730 | 731 | |
... | ... | @@ -736,8 +737,13 @@ |
736 | 737 | static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
737 | 738 | { |
738 | 739 | struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata); |
740 | + int irq; | |
739 | 741 | |
740 | - return pp->irq; | |
742 | + irq = of_irq_parse_and_map_pci(dev, slot, pin); | |
743 | + if (!irq) | |
744 | + irq = pp->irq; | |
745 | + | |
746 | + return irq; | |
741 | 747 | } |
742 | 748 | |
743 | 749 | static void dw_pcie_add_bus(struct pci_bus *bus) |
... | ... | @@ -764,7 +770,7 @@ |
764 | 770 | u32 membase; |
765 | 771 | u32 memlimit; |
766 | 772 | |
767 | - /* set the number of lines as 4 */ | |
773 | + /* set the number of lanes */ | |
768 | 774 | dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val); |
769 | 775 | val &= ~PORT_LINK_MODE_MASK; |
770 | 776 | switch (pp->lanes) { |