Eric Lee / smarc-ti-linux-kernel

Download as
Browse Code ยป

Commit 681d15a0f527af7ab3a783e1037de86fbcb136ac

Authored by Vishnu Motghare
Committed by Wolfram Sang
1 parent 9ea359f731
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

i2c: cadence: Set the hardware time-out register to maximum value 

Cadence I2C controller has bug wherein it generates invalid read transactions
after timeout in master receiver mode. This driver does not use the HW
timeout and this interrupt is disabled but the feature itself cannot be
disabled. Hence, this patch writes the maximum value (0xFF) to this register.
This is one of the workarounds to this bug and it will not avoid the issue
completely but reduces the chances of error.

Signed-off-by: Vishnu Motghare <vishnum@xilinx.com>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

Showing 1 changed file with 11 additions and 0 deletions Side-by-side Diff

drivers/i2c/busses/i2c-cadence.c
Diff comments   View file @ 681d15a
... ... @@ -111,6 +111,8 @@
111 111 #define CDNS_I2C_DIVA_MAX 4
112 112 #define CDNS_I2C_DIVB_MAX 64
113 113  
  114 +#define CDNS_I2C_TIMEOUT_MAX 0xFF
  115 +
114 116 #define cdns_i2c_readreg(offset) readl_relaxed(id->membase + offset)
115 117 #define cdns_i2c_writereg(val, offset) writel_relaxed(val, id->membase + offset)
116 118  
... ... @@ -851,6 +853,15 @@
851 853 dev_err(&pdev->dev, "reg adap failed: %d\n", ret);
852 854 goto err_clk_dis;
853 855 }
  856 +
  857 + /*
  858 + * Cadence I2C controller has a bug wherein it generates
  859 + * invalid read transaction after HW timeout in master receiver mode.
  860 + * HW timeout is not used by this driver and the interrupt is disabled.
  861 + * But the feature itself cannot be disabled. Hence maximum value
  862 + * is written to this register to reduce the chances of error.
  863 + */
  864 + cdns_i2c_writereg(CDNS_I2C_TIMEOUT_MAX, CDNS_I2C_TIME_OUT_OFFSET);
854 865  
855 866 dev_info(&pdev->dev, "%u kHz mmio %08lx irq %d\n",
856 867 id->i2c_clk / 1000, (unsigned long)r_mem->start, id->irq);