drm/i915: add set_infoframes to struct intel_hdmi

We need a function that is able to fully 'set' the state of the DIP registers to a known state. Currently, we have the write_infoframe function that is called twice: once for AVI and once for SPD. The problem is that write_infoframe tries to keep the state of the DIP register as it is, changing only the minimum necessary bits. The second problem is that write_infoframe does twice (once for each time it is called) some work that should be done only once (like waiting for vblank and setting the port). If we add even more DIPs, it will do even more repeated work. This patch only adds the infrastructure keeping the code behavior the same as before. v2: add static keywords Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

drm/i915: add set_infoframes to struct intel_hdmi
We need a function that is able to fully 'set' the state of the DIP registers to a known state. Currently, we have the write_infoframe function that is called twice: once for AVI and once for SPD. The problem is that write_infoframe tries to keep the state of the DIP register as it is, changing only the minimum necessary bits. The second problem is that write_infoframe does twice (once for each time it is called) some work that should be done only once (like waiting for vblank and setting the port). If we add even more DIPs, it will do even more repeated work. This patch only adds the infrastructure keeping the code behavior the same as before. v2: add static keywords Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Paulo Zanoni · Daniel Vetter
1 parent eeafaaca76
Showing 3 changed files with 46 additions and 9 deletions Side-by-side Diff
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_hdmi.c
@@ -726,8 +726,7 @@
  
 	I915_WRITE(DDI_FUNC_CTL(pipe), temp);
  
-	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
-	intel_hdmi_set_spd_infoframe(encoder);
+	intel_hdmi->set_infoframes(encoder, adjusted_mode);
 }
  
 void intel_ddi_dpms(struct drm_encoder *encoder, int mode)
@@ -301,6 +301,8 @@
 	enum hdmi_force_audio force_audio;
 	void (*write_infoframe)(struct drm_encoder *encoder,
 				struct dip_infoframe *frame);
+	void (*set_infoframes)(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode);
 };
  
 static inline struct drm_crtc *
@@ -343,9 +345,6 @@
 extern void intel_crt_init(struct drm_device *dev);
 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
-extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
-			    struct drm_display_mode *adjusted_mode);
-extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 			    bool is_sdvob);
@@ -315,7 +315,7 @@
 	intel_hdmi->write_infoframe(encoder, frame);
 }
  
-void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
+static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
 					 struct drm_display_mode *adjusted_mode)
 {
 	struct dip_infoframe avi_if = {
@@ -330,7 +330,7 @@
 	intel_set_infoframe(encoder, &avi_if);
 }
  
-void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
+static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
 {
 	struct dip_infoframe spd_if;
  
@@ -345,6 +345,41 @@
 	intel_set_infoframe(encoder, &spd_if);
 }
  
+static void g4x_set_infoframes(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode)
+{
+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
+	intel_hdmi_set_spd_infoframe(encoder);
+}
+
+static void ibx_set_infoframes(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode)
+{
+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
+	intel_hdmi_set_spd_infoframe(encoder);
+}
+
+static void cpt_set_infoframes(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode)
+{
+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
+	intel_hdmi_set_spd_infoframe(encoder);
+}
+
+static void vlv_set_infoframes(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode)
+{
+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
+	intel_hdmi_set_spd_infoframe(encoder);
+}
+
+static void hsw_set_infoframes(struct drm_encoder *encoder,
+			       struct drm_display_mode *adjusted_mode)
+{
+	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
+	intel_hdmi_set_spd_infoframe(encoder);
+}
+
 static void intel_hdmi_mode_set(struct drm_encoder *encoder,
 				struct drm_display_mode *mode,
 				struct drm_display_mode *adjusted_mode)
@@ -388,8 +423,7 @@
 	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
 	POSTING_READ(intel_hdmi->sdvox_reg);
  
-	intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
-	intel_hdmi_set_spd_infoframe(encoder);
+	intel_hdmi->set_infoframes(encoder, adjusted_mode);
 }
  
 static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
  
@@ -734,9 +768,11 @@
  
 	if (!HAS_PCH_SPLIT(dev)) {
 		intel_hdmi->write_infoframe = g4x_write_infoframe;
+		intel_hdmi->set_infoframes = g4x_set_infoframes;
 		I915_WRITE(VIDEO_DIP_CTL, 0);
 	} else if (IS_VALLEYVIEW(dev)) {
 		intel_hdmi->write_infoframe = vlv_write_infoframe;
+		intel_hdmi->set_infoframes = vlv_set_infoframes;
 		for_each_pipe(i)
 			I915_WRITE(VLV_TVIDEO_DIP_CTL(i), 0);
 	} else if (IS_HASWELL(dev)) {
  
  
@@ -744,14 +780,17 @@
 		 * just doing the minimal required for HDMI to work at this stage.
 		 */
 		intel_hdmi->write_infoframe = hsw_write_infoframe;
+		intel_hdmi->set_infoframes = hsw_set_infoframes;
 		for_each_pipe(i)
 			I915_WRITE(HSW_TVIDEO_DIP_CTL(i), 0);
 	} else if (HAS_PCH_IBX(dev)) {
 		intel_hdmi->write_infoframe = ibx_write_infoframe;
+		intel_hdmi->set_infoframes = ibx_set_infoframes;
 		for_each_pipe(i)
 			I915_WRITE(TVIDEO_DIP_CTL(i), 0);
 	} else {
 		intel_hdmi->write_infoframe = cpt_write_infoframe;
+		intel_hdmi->set_infoframes = cpt_set_infoframes;
 		for_each_pipe(i)
 			I915_WRITE(TVIDEO_DIP_CTL(i), 0);
 	}
...	...	@@ -726,8 +726,7 @@
726	726
727	727	I915_WRITE(DDI_FUNC_CTL(pipe), temp);
728	728
729		- intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
730		- intel_hdmi_set_spd_infoframe(encoder);
	729	+ intel_hdmi->set_infoframes(encoder, adjusted_mode);
731	730	}
732	731
733	732	void intel_ddi_dpms(struct drm_encoder *encoder, int mode)
...	...	@@ -301,6 +301,8 @@
301	301	enum hdmi_force_audio force_audio;
302	302	void (write_infoframe)(struct drm_encoder encoder,
303	303	struct dip_infoframe *frame);
	304	+ void (set_infoframes)(struct drm_encoder encoder,
	305	+ struct drm_display_mode *adjusted_mode);
304	306	};
305	307
306	308	static inline struct drm_crtc *
...	...	@@ -343,9 +345,6 @@
343	345	extern void intel_crt_init(struct drm_device *dev);
344	346	extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
345	347	extern struct intel_hdmi enc_to_intel_hdmi(struct drm_encoder encoder);
346		-extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
347		- struct drm_display_mode *adjusted_mode);
348		-extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
349	348	extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
350	349	extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
351	350	bool is_sdvob);
...	...	@@ -315,7 +315,7 @@
315	315	intel_hdmi->write_infoframe(encoder, frame);
316	316	}
317	317
318		-void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
	318	+static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
319	319	struct drm_display_mode *adjusted_mode)
320	320	{
321	321	struct dip_infoframe avi_if = {
...	...	@@ -330,7 +330,7 @@
330	330	intel_set_infoframe(encoder, &avi_if);
331	331	}
332	332
333		-void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
	333	+static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
334	334	{
335	335	struct dip_infoframe spd_if;
336	336
...	...	@@ -345,6 +345,41 @@
345	345	intel_set_infoframe(encoder, &spd_if);
346	346	}
347	347
	348	+static void g4x_set_infoframes(struct drm_encoder *encoder,
	349	+ struct drm_display_mode *adjusted_mode)
	350	+{
	351	+ intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
	352	+ intel_hdmi_set_spd_infoframe(encoder);
	353	+}
	354	+
	355	+static void ibx_set_infoframes(struct drm_encoder *encoder,
	356	+ struct drm_display_mode *adjusted_mode)
	357	+{
	358	+ intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
	359	+ intel_hdmi_set_spd_infoframe(encoder);
	360	+}
	361	+
	362	+static void cpt_set_infoframes(struct drm_encoder *encoder,
	363	+ struct drm_display_mode *adjusted_mode)
	364	+{
	365	+ intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
	366	+ intel_hdmi_set_spd_infoframe(encoder);
	367	+}
	368	+
	369	+static void vlv_set_infoframes(struct drm_encoder *encoder,
	370	+ struct drm_display_mode *adjusted_mode)
	371	+{
	372	+ intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
	373	+ intel_hdmi_set_spd_infoframe(encoder);
	374	+}
	375	+
	376	+static void hsw_set_infoframes(struct drm_encoder *encoder,
	377	+ struct drm_display_mode *adjusted_mode)
	378	+{
	379	+ intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
	380	+ intel_hdmi_set_spd_infoframe(encoder);
	381	+}
	382	+
348	383	static void intel_hdmi_mode_set(struct drm_encoder *encoder,
349	384	struct drm_display_mode *mode,
350	385	struct drm_display_mode *adjusted_mode)
...	...	@@ -388,8 +423,7 @@
388	423	I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
389	424	POSTING_READ(intel_hdmi->sdvox_reg);
390	425
391		- intel_hdmi_set_avi_infoframe(encoder, adjusted_mode);
392		- intel_hdmi_set_spd_infoframe(encoder);
	426	+ intel_hdmi->set_infoframes(encoder, adjusted_mode);
393	427	}
394	428
395	429	static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
396	430
...	...	@@ -734,9 +768,11 @@
734	768
735	769	if (!HAS_PCH_SPLIT(dev)) {
736	770	intel_hdmi->write_infoframe = g4x_write_infoframe;
	771	+ intel_hdmi->set_infoframes = g4x_set_infoframes;
737	772	I915_WRITE(VIDEO_DIP_CTL, 0);
738	773	} else if (IS_VALLEYVIEW(dev)) {
739	774	intel_hdmi->write_infoframe = vlv_write_infoframe;
	775	+ intel_hdmi->set_infoframes = vlv_set_infoframes;
740	776	for_each_pipe(i)
741	777	I915_WRITE(VLV_TVIDEO_DIP_CTL(i), 0);
742	778	} else if (IS_HASWELL(dev)) {
743	779
744	780
...	...	@@ -744,14 +780,17 @@
744	780	* just doing the minimal required for HDMI to work at this stage.
745	781	*/
746	782	intel_hdmi->write_infoframe = hsw_write_infoframe;
	783	+ intel_hdmi->set_infoframes = hsw_set_infoframes;
747	784	for_each_pipe(i)
748	785	I915_WRITE(HSW_TVIDEO_DIP_CTL(i), 0);
749	786	} else if (HAS_PCH_IBX(dev)) {
750	787	intel_hdmi->write_infoframe = ibx_write_infoframe;
	788	+ intel_hdmi->set_infoframes = ibx_set_infoframes;
751	789	for_each_pipe(i)
752	790	I915_WRITE(TVIDEO_DIP_CTL(i), 0);
753	791	} else {
754	792	intel_hdmi->write_infoframe = cpt_write_infoframe;
	793	+ intel_hdmi->set_infoframes = cpt_set_infoframes;
755	794	for_each_pipe(i)
756	795	I915_WRITE(TVIDEO_DIP_CTL(i), 0);
757	796	}