Commit 6af5809f05d3b9bd18aa2d3b8d20f1811e9f338c
Committed by
Hongmei Gou
Hongmei Gou
1 parent
e884a4b1de
Exists in
smarct4x-processor-sdk-linux-02.00.01
and in
3 other branches
ARM: dts: k2hk: add device binding for crypto accelerator
This patch enables HW crypto accelerator by adding device binding for it. Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Showing 2 changed files with 91 additions and 0 deletions Side-by-side Diff
Documentation/devicetree/bindings/soc/ti/keystone-crypto.txt
| 1 | +Keystone Crypto Driver | |
| 2 | + | |
| 3 | +This document explains the device tree bindings for the side-band Security | |
| 4 | +Accelerator on keystone devices. | |
| 5 | + | |
| 6 | +Required properties: | |
| 7 | + - compatible: should be "ti,keystone-crypto". | |
| 8 | + | |
| 9 | + - clock: pandle to clksa clock. | |
| 10 | + | |
| 11 | + - reg: Should contain register location and length of the SA hardware | |
| 12 | + module. | |
| 13 | + | |
| 14 | + - ti,navigator-dmas and ti,navigator-dma-names: Security accelerator uses | |
| 15 | + 2 dma channels. Rx and Tx. The first property is the pandle to the | |
| 16 | + knav_dmas subsystem and flow for RX channel and channel number for | |
| 17 | + TX channel. The second property is corresponding channel names. | |
| 18 | + | |
| 19 | + - rx-channel: name of RX channel. | |
| 20 | + | |
| 21 | + - rx-queue-depth and rx-buffer-size: RX channel may use upto 4 free | |
| 22 | + descriptor queue. Those properties describes number of buffers in | |
| 23 | + each queue and the buffer's length. | |
| 24 | + | |
| 25 | + - rx-compl-queue: RX completion queue number. | |
| 26 | + | |
| 27 | + - rx-pool: number of buffer descriptos and region for rx-pool. | |
| 28 | + | |
| 29 | + - tx-channel: name of TX channel. | |
| 30 | + | |
| 31 | + - tx-queue-depth: number of TX descriptos. | |
| 32 | + | |
| 33 | + - tx-compl-queue: TX completion queue number. | |
| 34 | + | |
| 35 | + - tx-pool: number of buffer descriptos and region for tx-pool. | |
| 36 | + | |
| 37 | + - tx-submit-queue: submition queue number for TX channel. | |
| 38 | + | |
| 39 | + - sc-id: ??? | |
| 40 | + | |
| 41 | + | |
| 42 | +Example: | |
| 43 | + | |
| 44 | +crypto@20c0000 { | |
| 45 | + compatible = "ti,keystone-crypto"; | |
| 46 | + label = "crypto-gbe"; | |
| 47 | + reg = <0x20c0000 0x40000>; | |
| 48 | + clocks = <&clksa>; | |
| 49 | + | |
| 50 | + ti,navigator-dmas = <&dma_gbe 26>, <&dma_gbe 6>; | |
| 51 | + ti,navigator-dma-names = "crypto-rx", "crypto-tx"; | |
| 52 | + | |
| 53 | + rx-channel = "crypto-rx"; | |
| 54 | + rx-queue-depth = <256 64 0 0>; | |
| 55 | + rx-buffer-size = <1500 4096 0 0>; | |
| 56 | + rx-compl-queue = <8712>; | |
| 57 | + rx-pool = <512 12>; | |
| 58 | + | |
| 59 | + tx-channel = "crypto-tx"; | |
| 60 | + tx-queue-depth = <256>; | |
| 61 | + tx-compl-queue = <8713>; | |
| 62 | + tx-pool = <512 12>; | |
| 63 | + tx-submit-queue = <646>; | |
| 64 | + | |
| 65 | + sc-id = <0x7000 0x71ff>; | |
| 66 | +}; |
arch/arm/boot/dts/k2hk-netcp.dtsi
| ... | ... | @@ -277,6 +277,31 @@ |
| 277 | 277 | netcp-gbe = <&gbe1>; |
| 278 | 278 | }; |
| 279 | 279 | }; |
| 280 | + | |
| 281 | +}; | |
| 282 | + | |
| 283 | +crypto@20c0000 { | |
| 284 | + compatible = "ti,keystone-crypto"; | |
| 285 | + label = "crypto-gbe"; | |
| 286 | + reg = <0x20c0000 0x40000>; | |
| 287 | + clocks = <&clksa>; | |
| 288 | + | |
| 289 | + ti,navigator-dmas = <&dma_gbe 26>, <&dma_gbe 6>; | |
| 290 | + ti,navigator-dma-names = "crypto-rx", "crypto-tx"; | |
| 291 | + | |
| 292 | + rx-channel = "crypto-rx"; | |
| 293 | + rx-queue-depth = <256 64 0 0>; | |
| 294 | + rx-buffer-size = <1500 4096 0 0>; | |
| 295 | + rx-compl-queue = <8712>; | |
| 296 | + rx-pool = <512 12>; | |
| 297 | + | |
| 298 | + tx-channel = "crypto-tx"; | |
| 299 | + tx-queue-depth = <256>; | |
| 300 | + tx-compl-queue = <8713>; | |
| 301 | + tx-pool = <512 12>; | |
| 302 | + tx-submit-queue = <646>; | |
| 303 | + | |
| 304 | + sc-id = <0x7000 0x71ff>; | |
| 280 | 305 | }; |
| 281 | 306 | |
| 282 | 307 | xgbe_subsys: subsys@2f00000 { |