Commit 7177395fdd919e561544a7d1c0ac196098a2ae2d
Committed by
Takashi Iwai
1 parent
ae76148114
Exists in
master
and in
20 other branches
ALSA: AC97: add AC97 support for AT91.
This patch add AC97 support for ATMEL AT91, using the AVR32 code. While AVR is using a DMA, the AT91 chips are using a Peripheral Data Controller. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Showing 2 changed files with 255 additions and 86 deletions Side-by-side Diff
sound/atmel/Kconfig
sound/atmel/ac97c.c
... | ... | @@ -13,6 +13,7 @@ |
13 | 13 | #include <linux/device.h> |
14 | 14 | #include <linux/dmaengine.h> |
15 | 15 | #include <linux/dma-mapping.h> |
16 | +#include <linux/atmel_pdc.h> | |
16 | 17 | #include <linux/init.h> |
17 | 18 | #include <linux/interrupt.h> |
18 | 19 | #include <linux/module.h> |
... | ... | @@ -31,6 +32,10 @@ |
31 | 32 | |
32 | 33 | #include <linux/dw_dmac.h> |
33 | 34 | |
35 | +#include <mach/cpu.h> | |
36 | +#include <mach/hardware.h> | |
37 | +#include <mach/gpio.h> | |
38 | + | |
34 | 39 | #include "ac97c.h" |
35 | 40 | |
36 | 41 | enum { |
... | ... | @@ -63,6 +68,7 @@ |
63 | 68 | u64 cur_format; |
64 | 69 | unsigned int cur_rate; |
65 | 70 | unsigned long flags; |
71 | + int playback_period, capture_period; | |
66 | 72 | /* Serialize access to opened variable */ |
67 | 73 | spinlock_t lock; |
68 | 74 | void __iomem *regs; |
... | ... | @@ -242,10 +248,12 @@ |
242 | 248 | if (retval < 0) |
243 | 249 | return retval; |
244 | 250 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ |
245 | - if (retval == 1) | |
246 | - if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
247 | - dw_dma_cyclic_free(chip->dma.tx_chan); | |
248 | - | |
251 | + if (cpu_is_at32ap7000()) { | |
252 | + /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
253 | + if (retval == 1) | |
254 | + if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
255 | + dw_dma_cyclic_free(chip->dma.tx_chan); | |
256 | + } | |
249 | 257 | /* Set restrictions to params. */ |
250 | 258 | mutex_lock(&opened_mutex); |
251 | 259 | chip->cur_rate = params_rate(hw_params); |
... | ... | @@ -266,9 +274,14 @@ |
266 | 274 | if (retval < 0) |
267 | 275 | return retval; |
268 | 276 | /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ |
269 | - if (retval == 1) | |
270 | - if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
271 | - dw_dma_cyclic_free(chip->dma.rx_chan); | |
277 | + if (cpu_is_at32ap7000()) { | |
278 | + if (retval < 0) | |
279 | + return retval; | |
280 | + /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */ | |
281 | + if (retval == 1) | |
282 | + if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
283 | + dw_dma_cyclic_free(chip->dma.rx_chan); | |
284 | + } | |
272 | 285 | |
273 | 286 | /* Set restrictions to params. */ |
274 | 287 | mutex_lock(&opened_mutex); |
275 | 288 | |
... | ... | @@ -282,16 +295,20 @@ |
282 | 295 | static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream) |
283 | 296 | { |
284 | 297 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
285 | - if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
286 | - dw_dma_cyclic_free(chip->dma.tx_chan); | |
298 | + if (cpu_is_at32ap7000()) { | |
299 | + if (test_and_clear_bit(DMA_TX_READY, &chip->flags)) | |
300 | + dw_dma_cyclic_free(chip->dma.tx_chan); | |
301 | + } | |
287 | 302 | return snd_pcm_lib_free_pages(substream); |
288 | 303 | } |
289 | 304 | |
290 | 305 | static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream) |
291 | 306 | { |
292 | 307 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
293 | - if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
294 | - dw_dma_cyclic_free(chip->dma.rx_chan); | |
308 | + if (cpu_is_at32ap7000()) { | |
309 | + if (test_and_clear_bit(DMA_RX_READY, &chip->flags)) | |
310 | + dw_dma_cyclic_free(chip->dma.rx_chan); | |
311 | + } | |
295 | 312 | return snd_pcm_lib_free_pages(substream); |
296 | 313 | } |
297 | 314 | |
298 | 315 | |
... | ... | @@ -299,9 +316,11 @@ |
299 | 316 | { |
300 | 317 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
301 | 318 | struct snd_pcm_runtime *runtime = substream->runtime; |
319 | + int block_size = frames_to_bytes(runtime, runtime->period_size); | |
302 | 320 | unsigned long word = ac97c_readl(chip, OCA); |
303 | 321 | int retval; |
304 | 322 | |
323 | + chip->playback_period = 0; | |
305 | 324 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
306 | 325 | |
307 | 326 | /* assign channels to AC97C channel A */ |
... | ... | @@ -324,7 +343,8 @@ |
324 | 343 | |
325 | 344 | switch (runtime->format) { |
326 | 345 | case SNDRV_PCM_FORMAT_S16_LE: |
327 | - word |= AC97C_CMR_CEM_LITTLE; | |
346 | + if (cpu_is_at32ap7000()) | |
347 | + word |= AC97C_CMR_CEM_LITTLE; | |
328 | 348 | break; |
329 | 349 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ |
330 | 350 | word &= ~(AC97C_CMR_CEM_LITTLE); |
... | ... | @@ -363,9 +383,18 @@ |
363 | 383 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", |
364 | 384 | runtime->rate); |
365 | 385 | |
366 | - if (!test_bit(DMA_TX_READY, &chip->flags)) | |
367 | - retval = atmel_ac97c_prepare_dma(chip, substream, | |
368 | - DMA_TO_DEVICE); | |
386 | + if (cpu_is_at32ap7000()) { | |
387 | + if (!test_bit(DMA_TX_READY, &chip->flags)) | |
388 | + retval = atmel_ac97c_prepare_dma(chip, substream, | |
389 | + DMA_TO_DEVICE); | |
390 | + } else { | |
391 | + /* Initialize and start the PDC */ | |
392 | + writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR); | |
393 | + writel(block_size / 2, chip->regs + ATMEL_PDC_TCR); | |
394 | + writel(runtime->dma_addr + block_size, | |
395 | + chip->regs + ATMEL_PDC_TNPR); | |
396 | + writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR); | |
397 | + } | |
369 | 398 | |
370 | 399 | return retval; |
371 | 400 | } |
372 | 401 | |
... | ... | @@ -374,9 +403,11 @@ |
374 | 403 | { |
375 | 404 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
376 | 405 | struct snd_pcm_runtime *runtime = substream->runtime; |
406 | + int block_size = frames_to_bytes(runtime, runtime->period_size); | |
377 | 407 | unsigned long word = ac97c_readl(chip, ICA); |
378 | 408 | int retval; |
379 | 409 | |
410 | + chip->capture_period = 0; | |
380 | 411 | word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT)); |
381 | 412 | |
382 | 413 | /* assign channels to AC97C channel A */ |
... | ... | @@ -399,7 +430,8 @@ |
399 | 430 | |
400 | 431 | switch (runtime->format) { |
401 | 432 | case SNDRV_PCM_FORMAT_S16_LE: |
402 | - word |= AC97C_CMR_CEM_LITTLE; | |
433 | + if (cpu_is_at32ap7000()) | |
434 | + word |= AC97C_CMR_CEM_LITTLE; | |
403 | 435 | break; |
404 | 436 | case SNDRV_PCM_FORMAT_S16_BE: /* fall through */ |
405 | 437 | word &= ~(AC97C_CMR_CEM_LITTLE); |
... | ... | @@ -438,9 +470,18 @@ |
438 | 470 | dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n", |
439 | 471 | runtime->rate); |
440 | 472 | |
441 | - if (!test_bit(DMA_RX_READY, &chip->flags)) | |
442 | - retval = atmel_ac97c_prepare_dma(chip, substream, | |
443 | - DMA_FROM_DEVICE); | |
473 | + if (cpu_is_at32ap7000()) { | |
474 | + if (!test_bit(DMA_RX_READY, &chip->flags)) | |
475 | + retval = atmel_ac97c_prepare_dma(chip, substream, | |
476 | + DMA_FROM_DEVICE); | |
477 | + } else { | |
478 | + /* Initialize and start the PDC */ | |
479 | + writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR); | |
480 | + writel(block_size / 2, chip->regs + ATMEL_PDC_RCR); | |
481 | + writel(runtime->dma_addr + block_size, | |
482 | + chip->regs + ATMEL_PDC_RNPR); | |
483 | + writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR); | |
484 | + } | |
444 | 485 | |
445 | 486 | return retval; |
446 | 487 | } |
... | ... | @@ -449,7 +490,7 @@ |
449 | 490 | atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
450 | 491 | { |
451 | 492 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
452 | - unsigned long camr; | |
493 | + unsigned long camr, ptcr = 0; | |
453 | 494 | int retval = 0; |
454 | 495 | |
455 | 496 | camr = ac97c_readl(chip, CAMR); |
456 | 497 | |
... | ... | @@ -458,15 +499,22 @@ |
458 | 499 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ |
459 | 500 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ |
460 | 501 | case SNDRV_PCM_TRIGGER_START: |
461 | - retval = dw_dma_cyclic_start(chip->dma.tx_chan); | |
462 | - if (retval) | |
463 | - goto out; | |
502 | + if (cpu_is_at32ap7000()) { | |
503 | + retval = dw_dma_cyclic_start(chip->dma.tx_chan); | |
504 | + if (retval) | |
505 | + goto out; | |
506 | + } else { | |
507 | + ptcr = ATMEL_PDC_TXTEN; | |
508 | + } | |
464 | 509 | camr |= AC97C_CMR_CENA; |
465 | 510 | break; |
466 | 511 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ |
467 | 512 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ |
468 | 513 | case SNDRV_PCM_TRIGGER_STOP: |
469 | - dw_dma_cyclic_stop(chip->dma.tx_chan); | |
514 | + if (cpu_is_at32ap7000()) | |
515 | + dw_dma_cyclic_stop(chip->dma.tx_chan); | |
516 | + else | |
517 | + ptcr |= ATMEL_PDC_TXTDIS; | |
470 | 518 | if (chip->opened <= 1) |
471 | 519 | camr &= ~AC97C_CMR_CENA; |
472 | 520 | break; |
... | ... | @@ -476,6 +524,8 @@ |
476 | 524 | } |
477 | 525 | |
478 | 526 | ac97c_writel(chip, CAMR, camr); |
527 | + if (!cpu_is_at32ap7000()) | |
528 | + writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
479 | 529 | out: |
480 | 530 | return retval; |
481 | 531 | } |
482 | 532 | |
483 | 533 | |
484 | 534 | |
... | ... | @@ -484,24 +534,32 @@ |
484 | 534 | atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
485 | 535 | { |
486 | 536 | struct atmel_ac97c *chip = snd_pcm_substream_chip(substream); |
487 | - unsigned long camr; | |
537 | + unsigned long camr, ptcr = 0; | |
488 | 538 | int retval = 0; |
489 | 539 | |
490 | 540 | camr = ac97c_readl(chip, CAMR); |
541 | + ptcr = readl(chip->regs + ATMEL_PDC_PTSR); | |
491 | 542 | |
492 | 543 | switch (cmd) { |
493 | 544 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */ |
494 | 545 | case SNDRV_PCM_TRIGGER_RESUME: /* fall through */ |
495 | 546 | case SNDRV_PCM_TRIGGER_START: |
496 | - retval = dw_dma_cyclic_start(chip->dma.rx_chan); | |
497 | - if (retval) | |
498 | - goto out; | |
547 | + if (cpu_is_at32ap7000()) { | |
548 | + retval = dw_dma_cyclic_start(chip->dma.rx_chan); | |
549 | + if (retval) | |
550 | + goto out; | |
551 | + } else { | |
552 | + ptcr = ATMEL_PDC_RXTEN; | |
553 | + } | |
499 | 554 | camr |= AC97C_CMR_CENA; |
500 | 555 | break; |
501 | 556 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */ |
502 | 557 | case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */ |
503 | 558 | case SNDRV_PCM_TRIGGER_STOP: |
504 | - dw_dma_cyclic_stop(chip->dma.rx_chan); | |
559 | + if (cpu_is_at32ap7000()) | |
560 | + dw_dma_cyclic_stop(chip->dma.rx_chan); | |
561 | + else | |
562 | + ptcr |= (ATMEL_PDC_RXTDIS); | |
505 | 563 | if (chip->opened <= 1) |
506 | 564 | camr &= ~AC97C_CMR_CENA; |
507 | 565 | break; |
... | ... | @@ -511,6 +569,8 @@ |
511 | 569 | } |
512 | 570 | |
513 | 571 | ac97c_writel(chip, CAMR, camr); |
572 | + if (!cpu_is_at32ap7000()) | |
573 | + writel(ptcr, chip->regs + ATMEL_PDC_PTCR); | |
514 | 574 | out: |
515 | 575 | return retval; |
516 | 576 | } |
... | ... | @@ -523,7 +583,10 @@ |
523 | 583 | snd_pcm_uframes_t frames; |
524 | 584 | unsigned long bytes; |
525 | 585 | |
526 | - bytes = dw_dma_get_src_addr(chip->dma.tx_chan); | |
586 | + if (cpu_is_at32ap7000()) | |
587 | + bytes = dw_dma_get_src_addr(chip->dma.tx_chan); | |
588 | + else | |
589 | + bytes = readl(chip->regs + ATMEL_PDC_TPR); | |
527 | 590 | bytes -= runtime->dma_addr; |
528 | 591 | |
529 | 592 | frames = bytes_to_frames(runtime, bytes); |
... | ... | @@ -540,7 +603,10 @@ |
540 | 603 | snd_pcm_uframes_t frames; |
541 | 604 | unsigned long bytes; |
542 | 605 | |
543 | - bytes = dw_dma_get_dst_addr(chip->dma.rx_chan); | |
606 | + if (cpu_is_at32ap7000()) | |
607 | + bytes = dw_dma_get_dst_addr(chip->dma.rx_chan); | |
608 | + else | |
609 | + bytes = readl(chip->regs + ATMEL_PDC_RPR); | |
544 | 610 | bytes -= runtime->dma_addr; |
545 | 611 | |
546 | 612 | frames = bytes_to_frames(runtime, bytes); |
547 | 613 | |
... | ... | @@ -578,8 +644,11 @@ |
578 | 644 | u32 sr = ac97c_readl(chip, SR); |
579 | 645 | u32 casr = ac97c_readl(chip, CASR); |
580 | 646 | u32 cosr = ac97c_readl(chip, COSR); |
647 | + u32 camr = ac97c_readl(chip, CAMR); | |
581 | 648 | |
582 | 649 | if (sr & AC97C_SR_CAEVT) { |
650 | + struct snd_pcm_runtime *runtime; | |
651 | + int offset, next_period, block_size; | |
583 | 652 | dev_info(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n", |
584 | 653 | casr & AC97C_CSR_OVRUN ? " OVRUN" : "", |
585 | 654 | casr & AC97C_CSR_RXRDY ? " RXRDY" : "", |
... | ... | @@ -587,6 +656,50 @@ |
587 | 656 | casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "", |
588 | 657 | casr & AC97C_CSR_TXRDY ? " TXRDY" : "", |
589 | 658 | !casr ? " NONE" : ""); |
659 | + if (!cpu_is_at32ap7000()) { | |
660 | + if ((casr & camr) & AC97C_CSR_ENDTX) { | |
661 | + runtime = chip->playback_substream->runtime; | |
662 | + block_size = frames_to_bytes(runtime, | |
663 | + runtime->period_size); | |
664 | + chip->playback_period++; | |
665 | + | |
666 | + if (chip->playback_period == runtime->periods) | |
667 | + chip->playback_period = 0; | |
668 | + next_period = chip->playback_period + 1; | |
669 | + if (next_period == runtime->periods) | |
670 | + next_period = 0; | |
671 | + | |
672 | + offset = block_size * next_period; | |
673 | + | |
674 | + writel(runtime->dma_addr + offset, | |
675 | + chip->regs + ATMEL_PDC_TNPR); | |
676 | + writel(block_size / 2, | |
677 | + chip->regs + ATMEL_PDC_TNCR); | |
678 | + | |
679 | + snd_pcm_period_elapsed( | |
680 | + chip->playback_substream); | |
681 | + } | |
682 | + if ((casr & camr) & AC97C_CSR_ENDRX) { | |
683 | + runtime = chip->capture_substream->runtime; | |
684 | + block_size = frames_to_bytes(runtime, | |
685 | + runtime->period_size); | |
686 | + chip->capture_period++; | |
687 | + | |
688 | + if (chip->capture_period == runtime->periods) | |
689 | + chip->capture_period = 0; | |
690 | + next_period = chip->capture_period + 1; | |
691 | + if (next_period == runtime->periods) | |
692 | + next_period = 0; | |
693 | + | |
694 | + offset = block_size * next_period; | |
695 | + | |
696 | + writel(runtime->dma_addr + offset, | |
697 | + chip->regs + ATMEL_PDC_RNPR); | |
698 | + writel(block_size / 2, | |
699 | + chip->regs + ATMEL_PDC_RNCR); | |
700 | + snd_pcm_period_elapsed(chip->capture_substream); | |
701 | + } | |
702 | + } | |
590 | 703 | retval = IRQ_HANDLED; |
591 | 704 | } |
592 | 705 | |
593 | 706 | |
594 | 707 | |
... | ... | @@ -608,15 +721,50 @@ |
608 | 721 | return retval; |
609 | 722 | } |
610 | 723 | |
724 | +static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = { | |
725 | + /* Playback */ | |
726 | + { | |
727 | + .exclusive = 1, | |
728 | + .r = { { | |
729 | + .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
730 | + | (1 << AC97_SLOT_PCM_RIGHT)), | |
731 | + } }, | |
732 | + }, | |
733 | + /* PCM in */ | |
734 | + { | |
735 | + .stream = 1, | |
736 | + .exclusive = 1, | |
737 | + .r = { { | |
738 | + .slots = ((1 << AC97_SLOT_PCM_LEFT) | |
739 | + | (1 << AC97_SLOT_PCM_RIGHT)), | |
740 | + } } | |
741 | + }, | |
742 | + /* Mic in */ | |
743 | + { | |
744 | + .stream = 1, | |
745 | + .exclusive = 1, | |
746 | + .r = { { | |
747 | + .slots = (1<<AC97_SLOT_MIC), | |
748 | + } } | |
749 | + }, | |
750 | +}; | |
751 | + | |
611 | 752 | static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip) |
612 | 753 | { |
613 | 754 | struct snd_pcm *pcm; |
614 | 755 | struct snd_pcm_hardware hw = atmel_ac97c_hw; |
615 | - int capture, playback, retval; | |
756 | + int capture, playback, retval, err; | |
616 | 757 | |
617 | 758 | capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags); |
618 | 759 | playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags); |
619 | 760 | |
761 | + if (!cpu_is_at32ap7000()) { | |
762 | + err = snd_ac97_pcm_assign(chip->ac97_bus, | |
763 | + ARRAY_SIZE(at91_ac97_pcm_defs), | |
764 | + at91_ac97_pcm_defs); | |
765 | + if (err) | |
766 | + return err; | |
767 | + } | |
620 | 768 | retval = snd_pcm_new(chip->card, chip->card->shortname, |
621 | 769 | chip->pdev->id, playback, capture, &pcm); |
622 | 770 | if (retval) |
... | ... | @@ -775,7 +923,12 @@ |
775 | 923 | return -ENXIO; |
776 | 924 | } |
777 | 925 | |
778 | - pclk = clk_get(&pdev->dev, "pclk"); | |
926 | + if (cpu_is_at32ap7000()) { | |
927 | + pclk = clk_get(&pdev->dev, "pclk"); | |
928 | + } else { | |
929 | + pclk = clk_get(&pdev->dev, "ac97_clk"); | |
930 | + } | |
931 | + | |
779 | 932 | if (IS_ERR(pclk)) { |
780 | 933 | dev_dbg(&pdev->dev, "no peripheral clock\n"); |
781 | 934 | return PTR_ERR(pclk); |
782 | 935 | |
783 | 936 | |
784 | 937 | |
785 | 938 | |
786 | 939 | |
787 | 940 | |
788 | 941 | |
789 | 942 | |
790 | 943 | |
791 | 944 | |
792 | 945 | |
793 | 946 | |
... | ... | @@ -844,45 +997,54 @@ |
844 | 997 | goto err_ac97_bus; |
845 | 998 | } |
846 | 999 | |
847 | - if (pdata->rx_dws.dma_dev) { | |
848 | - struct dw_dma_slave *dws = &pdata->rx_dws; | |
849 | - dma_cap_mask_t mask; | |
1000 | + if (cpu_is_at32ap7000()) { | |
1001 | + if (pdata->rx_dws.dma_dev) { | |
1002 | + struct dw_dma_slave *dws = &pdata->rx_dws; | |
1003 | + dma_cap_mask_t mask; | |
850 | 1004 | |
851 | - dws->rx_reg = regs->start + AC97C_CARHR + 2; | |
1005 | + dws->rx_reg = regs->start + AC97C_CARHR + 2; | |
852 | 1006 | |
853 | - dma_cap_zero(mask); | |
854 | - dma_cap_set(DMA_SLAVE, mask); | |
1007 | + dma_cap_zero(mask); | |
1008 | + dma_cap_set(DMA_SLAVE, mask); | |
855 | 1009 | |
856 | - chip->dma.rx_chan = dma_request_channel(mask, filter, dws); | |
1010 | + chip->dma.rx_chan = dma_request_channel(mask, filter, | |
1011 | + dws); | |
857 | 1012 | |
858 | - dev_info(&chip->pdev->dev, "using %s for DMA RX\n", | |
1013 | + dev_info(&chip->pdev->dev, "using %s for DMA RX\n", | |
859 | 1014 | dev_name(&chip->dma.rx_chan->dev->device)); |
860 | - set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
861 | - } | |
1015 | + set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1016 | + } | |
862 | 1017 | |
863 | - if (pdata->tx_dws.dma_dev) { | |
864 | - struct dw_dma_slave *dws = &pdata->tx_dws; | |
865 | - dma_cap_mask_t mask; | |
1018 | + if (pdata->tx_dws.dma_dev) { | |
1019 | + struct dw_dma_slave *dws = &pdata->tx_dws; | |
1020 | + dma_cap_mask_t mask; | |
866 | 1021 | |
867 | - dws->tx_reg = regs->start + AC97C_CATHR + 2; | |
1022 | + dws->tx_reg = regs->start + AC97C_CATHR + 2; | |
868 | 1023 | |
869 | - dma_cap_zero(mask); | |
870 | - dma_cap_set(DMA_SLAVE, mask); | |
1024 | + dma_cap_zero(mask); | |
1025 | + dma_cap_set(DMA_SLAVE, mask); | |
871 | 1026 | |
872 | - chip->dma.tx_chan = dma_request_channel(mask, filter, dws); | |
1027 | + chip->dma.tx_chan = dma_request_channel(mask, filter, | |
1028 | + dws); | |
873 | 1029 | |
874 | - dev_info(&chip->pdev->dev, "using %s for DMA TX\n", | |
1030 | + dev_info(&chip->pdev->dev, "using %s for DMA TX\n", | |
875 | 1031 | dev_name(&chip->dma.tx_chan->dev->device)); |
1032 | + set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1033 | + } | |
1034 | + | |
1035 | + if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) && | |
1036 | + !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) { | |
1037 | + dev_dbg(&pdev->dev, "DMA not available\n"); | |
1038 | + retval = -ENODEV; | |
1039 | + goto err_dma; | |
1040 | + } | |
1041 | + } else { | |
1042 | + /* Just pretend that we have DMA channel(for at91 i is actually | |
1043 | + * the PDC) */ | |
1044 | + set_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
876 | 1045 | set_bit(DMA_TX_CHAN_PRESENT, &chip->flags); |
877 | 1046 | } |
878 | 1047 | |
879 | - if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) && | |
880 | - !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) { | |
881 | - dev_dbg(&pdev->dev, "DMA not available\n"); | |
882 | - retval = -ENODEV; | |
883 | - goto err_dma; | |
884 | - } | |
885 | - | |
886 | 1048 | retval = atmel_ac97c_pcm_new(chip); |
887 | 1049 | if (retval) { |
888 | 1050 | dev_dbg(&pdev->dev, "could not register ac97 pcm device\n"); |
889 | 1051 | |
... | ... | @@ -897,20 +1059,22 @@ |
897 | 1059 | |
898 | 1060 | platform_set_drvdata(pdev, card); |
899 | 1061 | |
900 | - dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p\n", | |
901 | - chip->regs); | |
1062 | + dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n", | |
1063 | + chip->regs, irq); | |
902 | 1064 | |
903 | 1065 | return 0; |
904 | 1066 | |
905 | 1067 | err_dma: |
906 | - if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
907 | - dma_release_channel(chip->dma.rx_chan); | |
908 | - if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
909 | - dma_release_channel(chip->dma.tx_chan); | |
910 | - clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
911 | - clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
912 | - chip->dma.rx_chan = NULL; | |
913 | - chip->dma.tx_chan = NULL; | |
1068 | + if (cpu_is_at32ap7000()) { | |
1069 | + if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1070 | + dma_release_channel(chip->dma.rx_chan); | |
1071 | + if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1072 | + dma_release_channel(chip->dma.tx_chan); | |
1073 | + clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1074 | + clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1075 | + chip->dma.rx_chan = NULL; | |
1076 | + chip->dma.tx_chan = NULL; | |
1077 | + } | |
914 | 1078 | err_ac97_bus: |
915 | 1079 | snd_card_set_dev(card, NULL); |
916 | 1080 | |
... | ... | @@ -934,10 +1098,12 @@ |
934 | 1098 | struct snd_card *card = platform_get_drvdata(pdev); |
935 | 1099 | struct atmel_ac97c *chip = card->private_data; |
936 | 1100 | |
937 | - if (test_bit(DMA_RX_READY, &chip->flags)) | |
938 | - dw_dma_cyclic_stop(chip->dma.rx_chan); | |
939 | - if (test_bit(DMA_TX_READY, &chip->flags)) | |
940 | - dw_dma_cyclic_stop(chip->dma.tx_chan); | |
1101 | + if (cpu_is_at32ap7000()) { | |
1102 | + if (test_bit(DMA_RX_READY, &chip->flags)) | |
1103 | + dw_dma_cyclic_stop(chip->dma.rx_chan); | |
1104 | + if (test_bit(DMA_TX_READY, &chip->flags)) | |
1105 | + dw_dma_cyclic_stop(chip->dma.tx_chan); | |
1106 | + } | |
941 | 1107 | clk_disable(chip->pclk); |
942 | 1108 | |
943 | 1109 | return 0; |
... | ... | @@ -949,11 +1115,12 @@ |
949 | 1115 | struct atmel_ac97c *chip = card->private_data; |
950 | 1116 | |
951 | 1117 | clk_enable(chip->pclk); |
952 | - if (test_bit(DMA_RX_READY, &chip->flags)) | |
953 | - dw_dma_cyclic_start(chip->dma.rx_chan); | |
954 | - if (test_bit(DMA_TX_READY, &chip->flags)) | |
955 | - dw_dma_cyclic_start(chip->dma.tx_chan); | |
956 | - | |
1118 | + if (cpu_is_at32ap7000()) { | |
1119 | + if (test_bit(DMA_RX_READY, &chip->flags)) | |
1120 | + dw_dma_cyclic_start(chip->dma.rx_chan); | |
1121 | + if (test_bit(DMA_TX_READY, &chip->flags)) | |
1122 | + dw_dma_cyclic_start(chip->dma.tx_chan); | |
1123 | + } | |
957 | 1124 | return 0; |
958 | 1125 | } |
959 | 1126 | #else |
... | ... | @@ -978,14 +1145,16 @@ |
978 | 1145 | iounmap(chip->regs); |
979 | 1146 | free_irq(chip->irq, chip); |
980 | 1147 | |
981 | - if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
982 | - dma_release_channel(chip->dma.rx_chan); | |
983 | - if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
984 | - dma_release_channel(chip->dma.tx_chan); | |
985 | - clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
986 | - clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
987 | - chip->dma.rx_chan = NULL; | |
988 | - chip->dma.tx_chan = NULL; | |
1148 | + if (cpu_is_at32ap7000()) { | |
1149 | + if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags)) | |
1150 | + dma_release_channel(chip->dma.rx_chan); | |
1151 | + if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) | |
1152 | + dma_release_channel(chip->dma.tx_chan); | |
1153 | + clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags); | |
1154 | + clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags); | |
1155 | + chip->dma.rx_chan = NULL; | |
1156 | + chip->dma.tx_chan = NULL; | |
1157 | + } | |
989 | 1158 | |
990 | 1159 | snd_card_set_dev(card, NULL); |
991 | 1160 | snd_card_free(card); |