Commit 7530584f8c7d2ded28dd72e0dbf17c2bff085107

Authored by Christian König
Committed by Greg Kroah-Hartman
1 parent 2a1398b331

drm/radeon: fix PLLs on RS880 and older v2

commit 72edd83cc9e5819ed1ee771519143d7594e059f0 upstream.

This is a workaround for RS880 and older chips which seem to have
an additional limit on the minimum PLL input frequency.

v2: fix signed/unsigned warning

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=91861
https://bugzilla.kernel.org/show_bug.cgi?id=83461

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 3 additions and 0 deletions Side-by-side Diff

drivers/gpu/drm/radeon/radeon_display.c
... ... @@ -959,6 +959,9 @@
959 959 if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV &&
960 960 pll->flags & RADEON_PLL_USE_REF_DIV)
961 961 ref_div_max = pll->reference_div;
  962 + else if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP)
  963 + /* fix for problems on RS880 */
  964 + ref_div_max = min(pll->max_ref_div, 7u);
962 965 else
963 966 ref_div_max = pll->max_ref_div;
964 967