Commit 78b170f45b1a0da2625aa33f85d46a78475b268c

Authored by Linus Torvalds

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] update mach-types
  [ARM] Add cmpxchg support for ARMv6+ systems (v5)
  [ARM] barriers: improve xchg, bitops and atomic SMP barriers
  Gemini: Fix SRAM/ROM location after memory swap
  MAINTAINER: Add F: entries for Gemini and FA526
  [ARM] disable NX support for OABI-supporting kernels
  [ARM] add coherent DMA mask for mv643xx_eth
  [ARM] pxa/palm: fix PalmLD/T5/TX AC97 MFP
  [ARM] pxa: add parameter to clksrc_read() for pxa168/910
  [ARM] pxa: fix the incorrectly defined drive strength macros for pxa{168,910}
  [ARM] Orion: Remove explicit name for platform device resources
  [ARM] Kirkwood: Correct MPP for SATA activity/presence LEDs of QNAP TS-119/TS-219.
  [ARM] pxa/ezx: fix pin configuration for low power mode
  [ARM] pxa/spitz: provide spitz_ohci_exit() that unregisters USB_HOST GPIO
  [ARM] pxa: enable GPIO receivers after configuring pins
  [ARM] pxa: allow gpio_reset drive high during normal work
  [ARM] pxa: save/restore PGSR on suspend/resume.

Showing 27 changed files Side-by-side Diff

... ... @@ -624,6 +624,7 @@
624 624 L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
625 625 T: git git://gitorious.org/linux-gemini/mainline.git
626 626 S: Maintained
  627 +F: arch/arm/mach-gemini/
627 628  
628 629 ARM/EBSA110 MACHINE SUPPORT
629 630 P: Russell King
... ... @@ -650,6 +651,7 @@
650 651 M: paulius.zaleckas@teltonika.lt
651 652 L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
652 653 S: Maintained
  654 +F: arch/arm/mm/*-fa*
653 655  
654 656 ARM/FOOTBRIDGE ARCHITECTURE
655 657 P: Russell King
arch/arm/include/asm/assembler.h
... ... @@ -114,4 +114,17 @@
114 114 .align 3; \
115 115 .long 9999b,9001f; \
116 116 .previous
  117 +
  118 +/*
  119 + * SMP data memory barrier
  120 + */
  121 + .macro smp_dmb
  122 +#ifdef CONFIG_SMP
  123 +#if __LINUX_ARM_ARCH__ >= 7
  124 + dmb
  125 +#elif __LINUX_ARM_ARCH__ == 6
  126 + mcr p15, 0, r0, c7, c10, 5 @ dmb
  127 +#endif
  128 +#endif
  129 + .endm
arch/arm/include/asm/atomic.h
... ... @@ -44,11 +44,29 @@
44 44 : "cc");
45 45 }
46 46  
  47 +static inline void atomic_add(int i, atomic_t *v)
  48 +{
  49 + unsigned long tmp;
  50 + int result;
  51 +
  52 + __asm__ __volatile__("@ atomic_add\n"
  53 +"1: ldrex %0, [%2]\n"
  54 +" add %0, %0, %3\n"
  55 +" strex %1, %0, [%2]\n"
  56 +" teq %1, #0\n"
  57 +" bne 1b"
  58 + : "=&r" (result), "=&r" (tmp)
  59 + : "r" (&v->counter), "Ir" (i)
  60 + : "cc");
  61 +}
  62 +
47 63 static inline int atomic_add_return(int i, atomic_t *v)
48 64 {
49 65 unsigned long tmp;
50 66 int result;
51 67  
  68 + smp_mb();
  69 +
52 70 __asm__ __volatile__("@ atomic_add_return\n"
53 71 "1: ldrex %0, [%2]\n"
54 72 " add %0, %0, %3\n"
55 73  
56 74  
... ... @@ -59,14 +77,34 @@
59 77 : "r" (&v->counter), "Ir" (i)
60 78 : "cc");
61 79  
  80 + smp_mb();
  81 +
62 82 return result;
63 83 }
64 84  
  85 +static inline void atomic_sub(int i, atomic_t *v)
  86 +{
  87 + unsigned long tmp;
  88 + int result;
  89 +
  90 + __asm__ __volatile__("@ atomic_sub\n"
  91 +"1: ldrex %0, [%2]\n"
  92 +" sub %0, %0, %3\n"
  93 +" strex %1, %0, [%2]\n"
  94 +" teq %1, #0\n"
  95 +" bne 1b"
  96 + : "=&r" (result), "=&r" (tmp)
  97 + : "r" (&v->counter), "Ir" (i)
  98 + : "cc");
  99 +}
  100 +
65 101 static inline int atomic_sub_return(int i, atomic_t *v)
66 102 {
67 103 unsigned long tmp;
68 104 int result;
69 105  
  106 + smp_mb();
  107 +
70 108 __asm__ __volatile__("@ atomic_sub_return\n"
71 109 "1: ldrex %0, [%2]\n"
72 110 " sub %0, %0, %3\n"
... ... @@ -77,6 +115,8 @@
77 115 : "r" (&v->counter), "Ir" (i)
78 116 : "cc");
79 117  
  118 + smp_mb();
  119 +
80 120 return result;
81 121 }
82 122  
... ... @@ -84,6 +124,8 @@
84 124 {
85 125 unsigned long oldval, res;
86 126  
  127 + smp_mb();
  128 +
87 129 do {
88 130 __asm__ __volatile__("@ atomic_cmpxchg\n"
89 131 "ldrex %1, [%2]\n"
... ... @@ -95,6 +137,8 @@
95 137 : "cc");
96 138 } while (res);
97 139  
  140 + smp_mb();
  141 +
98 142 return oldval;
99 143 }
100 144  
... ... @@ -135,6 +179,7 @@
135 179  
136 180 return val;
137 181 }
  182 +#define atomic_add(i, v) (void) atomic_add_return(i, v)
138 183  
139 184 static inline int atomic_sub_return(int i, atomic_t *v)
140 185 {
... ... @@ -148,6 +193,7 @@
148 193  
149 194 return val;
150 195 }
  196 +#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
151 197  
152 198 static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
153 199 {
... ... @@ -187,10 +233,8 @@
187 233 }
188 234 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
189 235  
190   -#define atomic_add(i, v) (void) atomic_add_return(i, v)
191   -#define atomic_inc(v) (void) atomic_add_return(1, v)
192   -#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
193   -#define atomic_dec(v) (void) atomic_sub_return(1, v)
  236 +#define atomic_inc(v) atomic_add(1, v)
  237 +#define atomic_dec(v) atomic_sub(1, v)
194 238  
195 239 #define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
196 240 #define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
... ... @@ -200,11 +244,10 @@
200 244  
201 245 #define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
202 246  
203   -/* Atomic operations are already serializing on ARM */
204   -#define smp_mb__before_atomic_dec() barrier()
205   -#define smp_mb__after_atomic_dec() barrier()
206   -#define smp_mb__before_atomic_inc() barrier()
207   -#define smp_mb__after_atomic_inc() barrier()
  247 +#define smp_mb__before_atomic_dec() smp_mb()
  248 +#define smp_mb__after_atomic_dec() smp_mb()
  249 +#define smp_mb__before_atomic_inc() smp_mb()
  250 +#define smp_mb__after_atomic_inc() smp_mb()
208 251  
209 252 #include <asm-generic/atomic.h>
210 253 #endif
arch/arm/include/asm/system.h
... ... @@ -248,6 +248,8 @@
248 248 unsigned int tmp;
249 249 #endif
250 250  
  251 + smp_mb();
  252 +
251 253 switch (size) {
252 254 #if __LINUX_ARM_ARCH__ >= 6
253 255 case 1:
... ... @@ -307,6 +309,7 @@
307 309 __bad_xchg(ptr, size), ret = 0;
308 310 break;
309 311 }
  312 + smp_mb();
310 313  
311 314 return ret;
312 315 }
... ... @@ -316,6 +319,12 @@
316 319  
317 320 #include <asm-generic/cmpxchg-local.h>
318 321  
  322 +#if __LINUX_ARM_ARCH__ < 6
  323 +
  324 +#ifdef CONFIG_SMP
  325 +#error "SMP is not supported on this platform"
  326 +#endif
  327 +
319 328 /*
320 329 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
321 330 * them available.
... ... @@ -328,6 +337,173 @@
328 337 #ifndef CONFIG_SMP
329 338 #include <asm-generic/cmpxchg.h>
330 339 #endif
  340 +
  341 +#else /* __LINUX_ARM_ARCH__ >= 6 */
  342 +
  343 +extern void __bad_cmpxchg(volatile void *ptr, int size);
  344 +
  345 +/*
  346 + * cmpxchg only support 32-bits operands on ARMv6.
  347 + */
  348 +
  349 +static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
  350 + unsigned long new, int size)
  351 +{
  352 + unsigned long oldval, res;
  353 +
  354 + switch (size) {
  355 +#ifdef CONFIG_CPU_32v6K
  356 + case 1:
  357 + do {
  358 + asm volatile("@ __cmpxchg1\n"
  359 + " ldrexb %1, [%2]\n"
  360 + " mov %0, #0\n"
  361 + " teq %1, %3\n"
  362 + " strexbeq %0, %4, [%2]\n"
  363 + : "=&r" (res), "=&r" (oldval)
  364 + : "r" (ptr), "Ir" (old), "r" (new)
  365 + : "memory", "cc");
  366 + } while (res);
  367 + break;
  368 + case 2:
  369 + do {
  370 + asm volatile("@ __cmpxchg1\n"
  371 + " ldrexh %1, [%2]\n"
  372 + " mov %0, #0\n"
  373 + " teq %1, %3\n"
  374 + " strexheq %0, %4, [%2]\n"
  375 + : "=&r" (res), "=&r" (oldval)
  376 + : "r" (ptr), "Ir" (old), "r" (new)
  377 + : "memory", "cc");
  378 + } while (res);
  379 + break;
  380 +#endif /* CONFIG_CPU_32v6K */
  381 + case 4:
  382 + do {
  383 + asm volatile("@ __cmpxchg4\n"
  384 + " ldrex %1, [%2]\n"
  385 + " mov %0, #0\n"
  386 + " teq %1, %3\n"
  387 + " strexeq %0, %4, [%2]\n"
  388 + : "=&r" (res), "=&r" (oldval)
  389 + : "r" (ptr), "Ir" (old), "r" (new)
  390 + : "memory", "cc");
  391 + } while (res);
  392 + break;
  393 + default:
  394 + __bad_cmpxchg(ptr, size);
  395 + oldval = 0;
  396 + }
  397 +
  398 + return oldval;
  399 +}
  400 +
  401 +static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
  402 + unsigned long new, int size)
  403 +{
  404 + unsigned long ret;
  405 +
  406 + smp_mb();
  407 + ret = __cmpxchg(ptr, old, new, size);
  408 + smp_mb();
  409 +
  410 + return ret;
  411 +}
  412 +
  413 +#define cmpxchg(ptr,o,n) \
  414 + ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
  415 + (unsigned long)(o), \
  416 + (unsigned long)(n), \
  417 + sizeof(*(ptr))))
  418 +
  419 +static inline unsigned long __cmpxchg_local(volatile void *ptr,
  420 + unsigned long old,
  421 + unsigned long new, int size)
  422 +{
  423 + unsigned long ret;
  424 +
  425 + switch (size) {
  426 +#ifndef CONFIG_CPU_32v6K
  427 + case 1:
  428 + case 2:
  429 + ret = __cmpxchg_local_generic(ptr, old, new, size);
  430 + break;
  431 +#endif /* !CONFIG_CPU_32v6K */
  432 + default:
  433 + ret = __cmpxchg(ptr, old, new, size);
  434 + }
  435 +
  436 + return ret;
  437 +}
  438 +
  439 +#define cmpxchg_local(ptr,o,n) \
  440 + ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
  441 + (unsigned long)(o), \
  442 + (unsigned long)(n), \
  443 + sizeof(*(ptr))))
  444 +
  445 +#ifdef CONFIG_CPU_32v6K
  446 +
  447 +/*
  448 + * Note : ARMv7-M (currently unsupported by Linux) does not support
  449 + * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
  450 + * not be allowed to use __cmpxchg64.
  451 + */
  452 +static inline unsigned long long __cmpxchg64(volatile void *ptr,
  453 + unsigned long long old,
  454 + unsigned long long new)
  455 +{
  456 + register unsigned long long oldval asm("r0");
  457 + register unsigned long long __old asm("r2") = old;
  458 + register unsigned long long __new asm("r4") = new;
  459 + unsigned long res;
  460 +
  461 + do {
  462 + asm volatile(
  463 + " @ __cmpxchg8\n"
  464 + " ldrexd %1, %H1, [%2]\n"
  465 + " mov %0, #0\n"
  466 + " teq %1, %3\n"
  467 + " teqeq %H1, %H3\n"
  468 + " strexdeq %0, %4, %H4, [%2]\n"
  469 + : "=&r" (res), "=&r" (oldval)
  470 + : "r" (ptr), "Ir" (__old), "r" (__new)
  471 + : "memory", "cc");
  472 + } while (res);
  473 +
  474 + return oldval;
  475 +}
  476 +
  477 +static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
  478 + unsigned long long old,
  479 + unsigned long long new)
  480 +{
  481 + unsigned long long ret;
  482 +
  483 + smp_mb();
  484 + ret = __cmpxchg64(ptr, old, new);
  485 + smp_mb();
  486 +
  487 + return ret;
  488 +}
  489 +
  490 +#define cmpxchg64(ptr,o,n) \
  491 + ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
  492 + (unsigned long long)(o), \
  493 + (unsigned long long)(n)))
  494 +
  495 +#define cmpxchg64_local(ptr,o,n) \
  496 + ((__typeof__(*(ptr)))__cmpxchg64((ptr), \
  497 + (unsigned long long)(o), \
  498 + (unsigned long long)(n)))
  499 +
  500 +#else /* !CONFIG_CPU_32v6K */
  501 +
  502 +#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
  503 +
  504 +#endif /* CONFIG_CPU_32v6K */
  505 +
  506 +#endif /* __LINUX_ARM_ARCH__ >= 6 */
331 507  
332 508 #endif /* __ASSEMBLY__ */
333 509  
arch/arm/kernel/elf.c
... ... @@ -78,7 +78,16 @@
78 78 return 1;
79 79 if (cpu_architecture() < CPU_ARCH_ARMv6)
80 80 return 1;
  81 +#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
  82 + /*
  83 + * If we have support for OABI programs, we can never allow NX
  84 + * support - our signal syscall restart mechanism relies upon
  85 + * being able to execute code placed on the user stack.
  86 + */
  87 + return 1;
  88 +#else
81 89 return 0;
  90 +#endif
82 91 }
83 92 EXPORT_SYMBOL(arm_elf_read_implies_exec);
arch/arm/kernel/entry-armv.S
... ... @@ -815,10 +815,7 @@
815 815 */
816 816  
817 817 __kuser_memory_barrier: @ 0xffff0fa0
818   -
819   -#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
820   - mcr p15, 0, r0, c7, c10, 5 @ dmb
821   -#endif
  818 + smp_dmb
822 819 usr_ret lr
823 820  
824 821 .align 5
arch/arm/lib/bitops.h
... ... @@ -18,12 +18,14 @@
18 18 mov r2, #1
19 19 add r1, r1, r0, lsr #3 @ Get byte offset
20 20 mov r3, r2, lsl r3 @ create mask
  21 + smp_dmb
21 22 1: ldrexb r2, [r1]
22 23 ands r0, r2, r3 @ save old value of bit
23 24 \instr r2, r2, r3 @ toggle bit
24 25 strexb ip, r2, [r1]
25 26 cmp ip, #0
26 27 bne 1b
  28 + smp_dmb
27 29 cmp r0, #0
28 30 movne r0, #1
29 31 2: mov pc, lr
arch/arm/mach-gemini/include/mach/hardware.h
... ... @@ -15,10 +15,9 @@
15 15 /*
16 16 * Memory Map definitions
17 17 */
18   -/* FIXME: Does it really swap SRAM like this? */
19 18 #ifdef CONFIG_GEMINI_MEM_SWAP
20 19 # define GEMINI_DRAM_BASE 0x00000000
21   -# define GEMINI_SRAM_BASE 0x20000000
  20 +# define GEMINI_SRAM_BASE 0x70000000
22 21 #else
23 22 # define GEMINI_SRAM_BASE 0x00000000
24 23 # define GEMINI_DRAM_BASE 0x10000000
arch/arm/mach-kirkwood/common.c
... ... @@ -144,6 +144,9 @@
144 144 .id = 0,
145 145 .num_resources = 1,
146 146 .resource = kirkwood_ge00_resources,
  147 + .dev = {
  148 + .coherent_dma_mask = 0xffffffff,
  149 + },
147 150 };
148 151  
149 152 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
... ... @@ -202,6 +205,9 @@
202 205 .id = 1,
203 206 .num_resources = 1,
204 207 .resource = kirkwood_ge01_resources,
  208 + .dev = {
  209 + .coherent_dma_mask = 0xffffffff,
  210 + },
205 211 };
206 212  
207 213 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
208 214  
... ... @@ -386,12 +392,10 @@
386 392  
387 393 static struct resource kirkwood_i2c_resources[] = {
388 394 {
389   - .name = "i2c",
390 395 .start = I2C_PHYS_BASE,
391 396 .end = I2C_PHYS_BASE + 0x1f,
392 397 .flags = IORESOURCE_MEM,
393 398 }, {
394   - .name = "i2c",
395 399 .start = IRQ_KIRKWOOD_TWSI,
396 400 .end = IRQ_KIRKWOOD_TWSI,
397 401 .flags = IORESOURCE_IRQ,
arch/arm/mach-kirkwood/ts219-setup.c
... ... @@ -142,6 +142,8 @@
142 142 MPP1_SPI_MOSI,
143 143 MPP2_SPI_SCK,
144 144 MPP3_SPI_MISO,
  145 + MPP4_SATA1_ACTn,
  146 + MPP5_SATA0_ACTn,
145 147 MPP8_TW_SDA,
146 148 MPP9_TW_SCK,
147 149 MPP10_UART0_TXD,
... ... @@ -150,10 +152,6 @@
150 152 MPP14_UART1_RXD, /* PIC controller */
151 153 MPP15_GPIO, /* USB Copy button */
152 154 MPP16_GPIO, /* Reset button */
153   - MPP20_SATA1_ACTn,
154   - MPP21_SATA0_ACTn,
155   - MPP22_SATA1_PRESENTn,
156   - MPP23_SATA0_PRESENTn,
157 155 0
158 156 };
159 157  
arch/arm/mach-loki/common.c
... ... @@ -82,6 +82,9 @@
82 82 .id = 0,
83 83 .num_resources = 1,
84 84 .resource = loki_ge0_resources,
  85 + .dev = {
  86 + .coherent_dma_mask = 0xffffffff,
  87 + },
85 88 };
86 89  
87 90 void __init loki_ge0_init(struct mv643xx_eth_platform_data *eth_data)
... ... @@ -136,6 +139,9 @@
136 139 .id = 1,
137 140 .num_resources = 1,
138 141 .resource = loki_ge1_resources,
  142 + .dev = {
  143 + .coherent_dma_mask = 0xffffffff,
  144 + },
139 145 };
140 146  
141 147 void __init loki_ge1_init(struct mv643xx_eth_platform_data *eth_data)
arch/arm/mach-mmp/include/mach/mfp-pxa168.h
... ... @@ -3,6 +3,11 @@
3 3  
4 4 #include <mach/mfp.h>
5 5  
  6 +#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
  7 +#define MFP_DRIVE_SLOW (0x1 << 13)
  8 +#define MFP_DRIVE_MEDIUM (0x2 << 13)
  9 +#define MFP_DRIVE_FAST (0x3 << 13)
  10 +
6 11 /* GPIO */
7 12 #define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
8 13 #define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
arch/arm/mach-mmp/include/mach/mfp-pxa910.h
... ... @@ -3,6 +3,11 @@
3 3  
4 4 #include <mach/mfp.h>
5 5  
  6 +#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
  7 +#define MFP_DRIVE_SLOW (0x2 << 13)
  8 +#define MFP_DRIVE_MEDIUM (0x4 << 13)
  9 +#define MFP_DRIVE_FAST (0x8 << 13)
  10 +
6 11 /* UART2 */
7 12 #define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
8 13 #define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)
arch/arm/mach-mmp/include/mach/mfp.h
... ... @@ -12,15 +12,12 @@
12 12 * possible, we make the following compromise:
13 13 *
14 14 * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
15   - * 2. DRIVE strength definitions redefined to include the reserved bit10
  15 + * 2. DRIVE strength definitions redefined to include the reserved bit
  16 + * - the reserved bit differs between pxa168 and pxa910, and the
  17 + * MFP_DRIVE_* macros are individually defined in mfp-pxa{168,910}.h
16 18 * 3. Override MFP_CFG() and MFP_CFG_DRV()
17 19 * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
18 20 */
19   -
20   -#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
21   -#define MFP_DRIVE_SLOW (0x2 << 13)
22   -#define MFP_DRIVE_MEDIUM (0x4 << 13)
23   -#define MFP_DRIVE_FAST (0x8 << 13)
24 21  
25 22 #undef MFP_CFG
26 23 #undef MFP_CFG_DRV
arch/arm/mach-mmp/time.c
... ... @@ -136,7 +136,7 @@
136 136 .set_mode = timer_set_mode,
137 137 };
138 138  
139   -static cycle_t clksrc_read(void)
  139 +static cycle_t clksrc_read(struct clocksource *cs)
140 140 {
141 141 return timer_read();
142 142 }
arch/arm/mach-mv78xx0/common.c
... ... @@ -321,6 +321,9 @@
321 321 .id = 0,
322 322 .num_resources = 1,
323 323 .resource = mv78xx0_ge00_resources,
  324 + .dev = {
  325 + .coherent_dma_mask = 0xffffffff,
  326 + },
324 327 };
325 328  
326 329 void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data)
... ... @@ -375,6 +378,9 @@
375 378 .id = 1,
376 379 .num_resources = 1,
377 380 .resource = mv78xx0_ge01_resources,
  381 + .dev = {
  382 + .coherent_dma_mask = 0xffffffff,
  383 + },
378 384 };
379 385  
380 386 void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data)
... ... @@ -429,6 +435,9 @@
429 435 .id = 2,
430 436 .num_resources = 1,
431 437 .resource = mv78xx0_ge10_resources,
  438 + .dev = {
  439 + .coherent_dma_mask = 0xffffffff,
  440 + },
432 441 };
433 442  
434 443 void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
... ... @@ -496,6 +505,9 @@
496 505 .id = 3,
497 506 .num_resources = 1,
498 507 .resource = mv78xx0_ge11_resources,
  508 + .dev = {
  509 + .coherent_dma_mask = 0xffffffff,
  510 + },
499 511 };
500 512  
501 513 void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
502 514  
... ... @@ -532,12 +544,10 @@
532 544  
533 545 static struct resource mv78xx0_i2c_0_resources[] = {
534 546 {
535   - .name = "i2c 0 base",
536 547 .start = I2C_0_PHYS_BASE,
537 548 .end = I2C_0_PHYS_BASE + 0x1f,
538 549 .flags = IORESOURCE_MEM,
539 550 }, {
540   - .name = "i2c 0 irq",
541 551 .start = IRQ_MV78XX0_I2C_0,
542 552 .end = IRQ_MV78XX0_I2C_0,
543 553 .flags = IORESOURCE_IRQ,
544 554  
... ... @@ -567,12 +577,10 @@
567 577  
568 578 static struct resource mv78xx0_i2c_1_resources[] = {
569 579 {
570   - .name = "i2c 1 base",
571 580 .start = I2C_1_PHYS_BASE,
572 581 .end = I2C_1_PHYS_BASE + 0x1f,
573 582 .flags = IORESOURCE_MEM,
574 583 }, {
575   - .name = "i2c 1 irq",
576 584 .start = IRQ_MV78XX0_I2C_1,
577 585 .end = IRQ_MV78XX0_I2C_1,
578 586 .flags = IORESOURCE_IRQ,
arch/arm/mach-orion5x/common.c
... ... @@ -188,6 +188,9 @@
188 188 .id = 0,
189 189 .num_resources = 1,
190 190 .resource = orion5x_eth_resources,
  191 + .dev = {
  192 + .coherent_dma_mask = 0xffffffff,
  193 + },
191 194 };
192 195  
193 196 void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
194 197  
... ... @@ -248,12 +251,10 @@
248 251  
249 252 static struct resource orion5x_i2c_resources[] = {
250 253 {
251   - .name = "i2c base",
252 254 .start = I2C_PHYS_BASE,
253 255 .end = I2C_PHYS_BASE + 0x1f,
254 256 .flags = IORESOURCE_MEM,
255 257 }, {
256   - .name = "i2c irq",
257 258 .start = IRQ_ORION5X_I2C,
258 259 .end = IRQ_ORION5X_I2C,
259 260 .flags = IORESOURCE_IRQ,
arch/arm/mach-pxa/ezx.c
... ... @@ -111,9 +111,9 @@
111 111 GPIO25_SSP1_TXD,
112 112 GPIO26_SSP1_RXD,
113 113 GPIO24_GPIO, /* pcap chip select */
114   - GPIO1_GPIO, /* pcap interrupt */
115   - GPIO4_GPIO, /* WDI_AP */
116   - GPIO55_GPIO, /* SYS_RESTART */
  114 + GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* pcap interrupt */
  115 + GPIO4_GPIO | MFP_LPM_DRIVE_HIGH, /* WDI_AP */
  116 + GPIO55_GPIO | MFP_LPM_DRIVE_HIGH, /* SYS_RESTART */
117 117  
118 118 /* MMC */
119 119 GPIO32_MMC_CLK,
120 120  
121 121  
... ... @@ -144,20 +144,20 @@
144 144 #if defined(CONFIG_MACH_EZX_A780) || defined(CONFIG_MACH_EZX_E680)
145 145 static unsigned long gen1_pin_config[] __initdata = {
146 146 /* flip / lockswitch */
147   - GPIO12_GPIO,
  147 + GPIO12_GPIO | WAKEUP_ON_EDGE_BOTH,
148 148  
149 149 /* bluetooth (bcm2035) */
150   - GPIO14_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */
  150 + GPIO14_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
151 151 GPIO48_GPIO, /* RESET */
152 152 GPIO28_GPIO, /* WAKEUP */
153 153  
154 154 /* Neptune handshake */
155   - GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */
156   - GPIO57_GPIO, /* AP_RDY */
157   - GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */
158   - GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI2 */
159   - GPIO82_GPIO, /* RESET */
160   - GPIO99_GPIO, /* TC_MM_EN */
  155 + GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
  156 + GPIO57_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
  157 + GPIO13_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI */
  158 + GPIO3_GPIO | WAKEUP_ON_EDGE_BOTH, /* WDI2 */
  159 + GPIO82_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
  160 + GPIO99_GPIO | MFP_LPM_DRIVE_HIGH, /* TC_MM_EN */
161 161  
162 162 /* sound */
163 163 GPIO52_SSP3_SCLK,
164 164  
165 165  
166 166  
... ... @@ -199,21 +199,21 @@
199 199 defined(CONFIG_MACH_EZX_E2) || defined(CONFIG_MACH_EZX_E6)
200 200 static unsigned long gen2_pin_config[] __initdata = {
201 201 /* flip / lockswitch */
202   - GPIO15_GPIO,
  202 + GPIO15_GPIO | WAKEUP_ON_EDGE_BOTH,
203 203  
204 204 /* EOC */
205   - GPIO10_GPIO,
  205 + GPIO10_GPIO | WAKEUP_ON_EDGE_RISE,
206 206  
207 207 /* bluetooth (bcm2045) */
208   - GPIO13_GPIO | WAKEUP_ON_LEVEL_HIGH, /* HOSTWAKE */
  208 + GPIO13_GPIO | WAKEUP_ON_EDGE_RISE, /* HOSTWAKE */
209 209 GPIO37_GPIO, /* RESET */
210 210 GPIO57_GPIO, /* WAKEUP */
211 211  
212 212 /* Neptune handshake */
213   - GPIO0_GPIO | WAKEUP_ON_LEVEL_HIGH, /* BP_RDY */
214   - GPIO96_GPIO, /* AP_RDY */
215   - GPIO3_GPIO | WAKEUP_ON_LEVEL_HIGH, /* WDI */
216   - GPIO116_GPIO, /* RESET */
  213 + GPIO0_GPIO | WAKEUP_ON_EDGE_FALL, /* BP_RDY */
  214 + GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* AP_RDY */
  215 + GPIO3_GPIO | WAKEUP_ON_EDGE_FALL, /* WDI */
  216 + GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* RESET */
217 217 GPIO41_GPIO, /* BP_FLASH */
218 218  
219 219 /* sound */
arch/arm/mach-pxa/include/mach/reset.h
... ... @@ -13,9 +13,10 @@
13 13 /**
14 14 * init_gpio_reset() - register GPIO as reset generator
15 15 * @gpio: gpio nr
16   - * @output: set gpio as out/low instead of input during normal work
  16 + * @output: set gpio as output instead of input during normal work
  17 + * @level: output level
17 18 */
18   -extern int init_gpio_reset(int gpio, int output);
  19 +extern int init_gpio_reset(int gpio, int output, int level);
19 20  
20 21 #endif /* __ASM_ARCH_RESET_H */
arch/arm/mach-pxa/mfp-pxa2xx.c
... ... @@ -322,6 +322,7 @@
322 322 #ifdef CONFIG_PM
323 323 static unsigned long saved_gafr[2][4];
324 324 static unsigned long saved_gpdr[4];
  325 +static unsigned long saved_pgsr[4];
325 326  
326 327 static int pxa2xx_mfp_suspend(struct sys_device *d, pm_message_t state)
327 328 {
... ... @@ -332,6 +333,7 @@
332 333 saved_gafr[0][i] = GAFR_L(i);
333 334 saved_gafr[1][i] = GAFR_U(i);
334 335 saved_gpdr[i] = GPDR(i * 32);
  336 + saved_pgsr[i] = PGSR(i);
335 337  
336 338 GPDR(i * 32) = gpdr_lpm[i];
337 339 }
... ... @@ -346,6 +348,7 @@
346 348 GAFR_L(i) = saved_gafr[0][i];
347 349 GAFR_U(i) = saved_gafr[1][i];
348 350 GPDR(i * 32) = saved_gpdr[i];
  351 + PGSR(i) = saved_pgsr[i];
349 352 }
350 353 PSSR = PSSR_RDH | PSSR_PH;
351 354 return 0;
... ... @@ -373,6 +376,9 @@
373 376  
374 377 if (cpu_is_pxa27x())
375 378 pxa27x_mfp_init();
  379 +
  380 + /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
  381 + PSSR = PSSR_RDH;
376 382  
377 383 /* initialize gafr_run[], pgsr_lpm[] from existing values */
378 384 for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
arch/arm/mach-pxa/palmld.c
... ... @@ -62,6 +62,8 @@
62 62 GPIO29_AC97_SDATA_IN_0,
63 63 GPIO30_AC97_SDATA_OUT,
64 64 GPIO31_AC97_SYNC,
  65 + GPIO89_AC97_SYSCLK,
  66 + GPIO95_AC97_nRESET,
65 67  
66 68 /* IrDA */
67 69 GPIO108_GPIO, /* ir disable */
arch/arm/mach-pxa/palmt5.c
... ... @@ -64,6 +64,7 @@
64 64 GPIO29_AC97_SDATA_IN_0,
65 65 GPIO30_AC97_SDATA_OUT,
66 66 GPIO31_AC97_SYNC,
  67 + GPIO89_AC97_SYSCLK,
67 68 GPIO95_AC97_nRESET,
68 69  
69 70 /* IrDA */
arch/arm/mach-pxa/palmtx.c
... ... @@ -65,6 +65,7 @@
65 65 GPIO29_AC97_SDATA_IN_0,
66 66 GPIO30_AC97_SDATA_OUT,
67 67 GPIO31_AC97_SYNC,
  68 + GPIO89_AC97_SYSCLK,
68 69 GPIO95_AC97_nRESET,
69 70  
70 71 /* IrDA */
arch/arm/mach-pxa/reset.c
... ... @@ -20,7 +20,7 @@
20 20  
21 21 static int reset_gpio = -1;
22 22  
23   -int init_gpio_reset(int gpio, int output)
  23 +int init_gpio_reset(int gpio, int output, int level)
24 24 {
25 25 int rc;
26 26  
... ... @@ -31,7 +31,7 @@
31 31 }
32 32  
33 33 if (output)
34   - rc = gpio_direction_output(gpio, 0);
  34 + rc = gpio_direction_output(gpio, level);
35 35 else
36 36 rc = gpio_direction_input(gpio);
37 37 if (rc) {
arch/arm/mach-pxa/spitz.c
... ... @@ -531,9 +531,15 @@
531 531 return gpio_direction_output(SPITZ_GPIO_USB_HOST, 1);
532 532 }
533 533  
  534 +static void spitz_ohci_exit(struct device *dev)
  535 +{
  536 + gpio_free(SPITZ_GPIO_USB_HOST);
  537 +}
  538 +
534 539 static struct pxaohci_platform_data spitz_ohci_platform_data = {
535 540 .port_mode = PMM_NPS_MODE,
536 541 .init = spitz_ohci_init,
  542 + .exit = spitz_ohci_exit,
537 543 .flags = ENABLE_PORT_ALL | NO_OC_PROTECTION,
538 544 .power_budget = 150,
539 545 };
... ... @@ -731,7 +737,7 @@
731 737  
732 738 static void __init common_init(void)
733 739 {
734   - init_gpio_reset(SPITZ_GPIO_ON_RESET, 1);
  740 + init_gpio_reset(SPITZ_GPIO_ON_RESET, 1, 0);
735 741 pm_power_off = spitz_poweroff;
736 742 arm_pm_restart = spitz_restart;
737 743  
arch/arm/mach-pxa/tosa.c
... ... @@ -897,7 +897,7 @@
897 897 gpio_set_wake(MFP_PIN_GPIO1, 1);
898 898 /* We can't pass to gpio-keys since it will drop the Reset altfunc */
899 899  
900   - init_gpio_reset(TOSA_GPIO_ON_RESET, 0);
  900 + init_gpio_reset(TOSA_GPIO_ON_RESET, 0, 0);
901 901  
902 902 pm_power_off = tosa_poweroff;
903 903 arm_pm_restart = tosa_restart;
arch/arm/tools/mach-types
... ... @@ -12,7 +12,7 @@
12 12 #
13 13 # http://www.arm.linux.org.uk/developer/machines/?action=new
14 14 #
15   -# Last update: Mon Mar 23 20:09:01 2009
  15 +# Last update: Fri May 29 10:14:20 2009
16 16 #
17 17 # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18 18 #
... ... @@ -916,7 +916,7 @@
916 916 apf9328 MACH_APF9328 APF9328 906
917 917 omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907
918 918 omap_twip MACH_OMAP_TWIP OMAP_TWIP 908
919   -palmt650 MACH_PALMT650 PALMT650 909
  919 +treo650 MACH_TREO650 TREO650 909
920 920 acumen MACH_ACUMEN ACUMEN 910
921 921 xp100 MACH_XP100 XP100 911
922 922 fs2410 MACH_FS2410 FS2410 912
... ... @@ -1232,7 +1232,7 @@
1232 1232 vpac270 MACH_VPAC270 VPAC270 1227
1233 1233 rd129 MACH_RD129 RD129 1228
1234 1234 htcwizard MACH_HTCWIZARD HTCWIZARD 1229
1235   -xscale_treo680 MACH_XSCALE_TREO680 XSCALE_TREO680 1230
  1235 +treo680 MACH_TREO680 TREO680 1230
1236 1236 tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
1237 1237 zylonite MACH_ZYLONITE ZYLONITE 1233
1238 1238 gene1270 MACH_GENE1270 GENE1270 1234
... ... @@ -1418,10 +1418,10 @@
1418 1418 cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418
1419 1419 app3xx MACH_APP3XX APP3XX 1419
1420 1420 sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420
1421   -palmtreo700p MACH_PALMTREO700P PALMTREO700P 1421
1422   -palmtreo700w MACH_PALMTREO700W PALMTREO700W 1422
1423   -palmtreo750 MACH_PALMTREO750 PALMTREO750 1423
1424   -palmtreo755p MACH_PALMTREO755P PALMTREO755P 1424
  1421 +treo700p MACH_TREO700P TREO700P 1421
  1422 +treo700w MACH_TREO700W TREO700W 1422
  1423 +treo750 MACH_TREO750 TREO750 1423
  1424 +treo755p MACH_TREO755P TREO755P 1424
1425 1425 ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425
1426 1426 sarge MACH_SARGE SARGE 1426
1427 1427 a696 MACH_A696 A696 1427
... ... @@ -1721,7 +1721,7 @@
1721 1721 csb637xo MACH_CSB637XO CSB637XO 1730
1722 1722 evisiong MACH_EVISIONG EVISIONG 1731
1723 1723 stmp37xx MACH_STMP37XX STMP37XX 1732
1724   -stmp378x MACH_STMP38XX STMP38XX 1733
  1724 +stmp378x MACH_STMP378X STMP378X 1733
1725 1725 tnt MACH_TNT TNT 1734
1726 1726 tbxt MACH_TBXT TBXT 1735
1727 1727 playmate MACH_PLAYMATE PLAYMATE 1736
... ... @@ -1817,7 +1817,7 @@
1817 1817 tavorevb MACH_TAVOREVB TAVOREVB 1827
1818 1818 saar MACH_SAAR SAAR 1828
1819 1819 deister_eyecam MACH_DEISTER_EYECAM DEISTER_EYECAM 1829
1820   -at91sam9m10ek MACH_AT91SAM9M10EK AT91SAM9M10EK 1830
  1820 +at91sam9m10g45ek MACH_AT91SAM9M10G45EK AT91SAM9M10G45EK 1830
1821 1821 linkstation_produo MACH_LINKSTATION_PRODUO LINKSTATION_PRODUO 1831
1822 1822 hit_b0 MACH_HIT_B0 HIT_B0 1832
1823 1823 adx_rmu MACH_ADX_RMU ADX_RMU 1833
... ... @@ -2132,4 +2132,117 @@
2132 2132 at91cap9stk MACH_AT91CAP9STK AT91CAP9STK 2142
2133 2133 spc300 MACH_SPC300 SPC300 2143
2134 2134 eko MACH_EKO EKO 2144
  2135 +ccw9m2443 MACH_CCW9M2443 CCW9M2443 2145
  2136 +ccw9m2443js MACH_CCW9M2443JS CCW9M2443JS 2146
  2137 +m2m_router_device MACH_M2M_ROUTER_DEVICE M2M_ROUTER_DEVICE 2147
  2138 +str9104nas MACH_STAR9104NAS STAR9104NAS 2148
  2139 +pca100 MACH_PCA100 PCA100 2149
  2140 +z3_dm365_mod_01 MACH_Z3_DM365_MOD_01 Z3_DM365_MOD_01 2150
  2141 +hipox MACH_HIPOX HIPOX 2151
  2142 +omap3_piteds MACH_OMAP3_PITEDS OMAP3_PITEDS 2152
  2143 +bm150r MACH_BM150R BM150R 2153
  2144 +tbone MACH_TBONE TBONE 2154
  2145 +merlin MACH_MERLIN MERLIN 2155
  2146 +falcon MACH_FALCON FALCON 2156
  2147 +davinci_da850_evm MACH_DAVINCI_DA850_EVM DAVINCI_DA850_EVM 2157
  2148 +s5p6440 MACH_S5P6440 S5P6440 2158
  2149 +at91sam9g10ek MACH_AT91SAM9G10EK AT91SAM9G10EK 2159
  2150 +omap_4430sdp MACH_OMAP_4430SDP OMAP_4430SDP 2160
  2151 +lpc313x MACH_LPC313X LPC313X 2161
  2152 +magx_zn5 MACH_MAGX_ZN5 MAGX_ZN5 2162
  2153 +magx_em30 MACH_MAGX_EM30 MAGX_EM30 2163
  2154 +magx_ve66 MACH_MAGX_VE66 MAGX_VE66 2164
  2155 +meesc MACH_MEESC MEESC 2165
  2156 +otc570 MACH_OTC570 OTC570 2166
  2157 +bcu2412 MACH_BCU2412 BCU2412 2167
  2158 +beacon MACH_BEACON BEACON 2168
  2159 +actia_tgw MACH_ACTIA_TGW ACTIA_TGW 2169
  2160 +e4430 MACH_E4430 E4430 2170
  2161 +ql300 MACH_QL300 QL300 2171
  2162 +btmavb101 MACH_BTMAVB101 BTMAVB101 2172
  2163 +btmawb101 MACH_BTMAWB101 BTMAWB101 2173
  2164 +sq201 MACH_SQ201 SQ201 2174
  2165 +quatro45xx MACH_QUATRO45XX QUATRO45XX 2175
  2166 +openpad MACH_OPENPAD OPENPAD 2176
  2167 +tx25 MACH_TX25 TX25 2177
  2168 +omap3_torpedo MACH_OMAP3_TORPEDO OMAP3_TORPEDO 2178
  2169 +htcraphael_k MACH_HTCRAPHAEL_K HTCRAPHAEL_K 2179
  2170 +lal43 MACH_LAL43 LAL43 2181
  2171 +htcraphael_cdma500 MACH_HTCRAPHAEL_CDMA500 HTCRAPHAEL_CDMA500 2182
  2172 +anw6410 MACH_ANW6410 ANW6410 2183
  2173 +htcprophet MACH_HTCPROPHET HTCPROPHET 2185
  2174 +cfa_10022 MACH_CFA_10022 CFA_10022 2186
  2175 +imx27_visstrim_m10 MACH_IMX27_VISSTRIM_M10 IMX27_VISSTRIM_M10 2187
  2176 +px2imx27 MACH_PX2IMX27 PX2IMX27 2188
  2177 +stm3210e_eval MACH_STM3210E_EVAL STM3210E_EVAL 2189
  2178 +dvs10 MACH_DVS10 DVS10 2190
  2179 +portuxg20 MACH_PORTUXG20 PORTUXG20 2191
  2180 +arm_spv MACH_ARM_SPV ARM_SPV 2192
  2181 +smdkc110 MACH_SMDKC110 SMDKC110 2193
  2182 +cabespresso MACH_CABESPRESSO CABESPRESSO 2194
  2183 +hmc800 MACH_HMC800 HMC800 2195
  2184 +sholes MACH_SHOLES SHOLES 2196
  2185 +btmxc31 MACH_BTMXC31 BTMXC31 2197
  2186 +dt501 MACH_DT501 DT501 2198
  2187 +ktx MACH_KTX KTX 2199
  2188 +omap3517evm MACH_OMAP3517EVM OMAP3517EVM 2200
  2189 +netspace_v2 MACH_NETSPACE_V2 NETSPACE_V2 2201
  2190 +netspace_max_v2 MACH_NETSPACE_MAX_V2 NETSPACE_MAX_V2 2202
  2191 +d2net_v2 MACH_D2NET_V2 D2NET_V2 2203
  2192 +net2big_v2 MACH_NET2BIG_V2 NET2BIG_V2 2204
  2193 +net4big_v2 MACH_NET4BIG_V2 NET4BIG_V2 2205
  2194 +net5big_v2 MACH_NET5BIG_V2 NET5BIG_V2 2206
  2195 +endb2443 MACH_ENDB2443 ENDB2443 2207
  2196 +inetspace_v2 MACH_INETSPACE_V2 INETSPACE_V2 2208
  2197 +tros MACH_TROS TROS 2209
  2198 +pelco_homer MACH_PELCO_HOMER PELCO_HOMER 2210
  2199 +ofsp8 MACH_OFSP8 OFSP8 2211
  2200 +at91sam9g45ekes MACH_AT91SAM9G45EKES AT91SAM9G45EKES 2212
  2201 +guf_cupid MACH_GUF_CUPID GUF_CUPID 2213
  2202 +eab1r MACH_EAB1R EAB1R 2214
  2203 +desirec MACH_DESIREC DESIREC 2215
  2204 +cordoba MACH_CORDOBA CORDOBA 2216
  2205 +irvine MACH_IRVINE IRVINE 2217
  2206 +sff772 MACH_SFF772 SFF772 2218
  2207 +pelco_milano MACH_PELCO_MILANO PELCO_MILANO 2219
  2208 +pc7302 MACH_PC7302 PC7302 2220
  2209 +bip6000 MACH_BIP6000 BIP6000 2221
  2210 +silvermoon MACH_SILVERMOON SILVERMOON 2222
  2211 +vc0830 MACH_VC0830 VC0830 2223
  2212 +dt430 MACH_DT430 DT430 2224
  2213 +ji42pf MACH_JI42PF JI42PF 2225
  2214 +gnet_ksm MACH_GNET_KSM GNET_KSM 2226
  2215 +gnet_sgm MACH_GNET_SGM GNET_SGM 2227
  2216 +gnet_sgr MACH_GNET_SGR GNET_SGR 2228
  2217 +omap3_icetekevm MACH_OMAP3_ICETEKEVM OMAP3_ICETEKEVM 2229
  2218 +pnp MACH_PNP PNP 2230
  2219 +ctera_2bay_k MACH_CTERA_2BAY_K CTERA_2BAY_K 2231
  2220 +ctera_2bay_u MACH_CTERA_2BAY_U CTERA_2BAY_U 2232
  2221 +sas_c MACH_SAS_C SAS_C 2233
  2222 +vma2315 MACH_VMA2315 VMA2315 2234
  2223 +vcs MACH_VCS VCS 2235
  2224 +spear600 MACH_SPEAR600 SPEAR600 2236
  2225 +spear300 MACH_SPEAR300 SPEAR300 2237
  2226 +spear1300 MACH_SPEAR1300 SPEAR1300 2238
  2227 +lilly1131 MACH_LILLY1131 LILLY1131 2239
  2228 +arvoo_ax301 MACH_ARVOO_AX301 ARVOO_AX301 2240
  2229 +mapphone MACH_MAPPHONE MAPPHONE 2241
  2230 +legend MACH_LEGEND LEGEND 2242
  2231 +salsa MACH_SALSA SALSA 2243
  2232 +lounge MACH_LOUNGE LOUNGE 2244
  2233 +vision MACH_VISION VISION 2245
  2234 +vmb20 MACH_VMB20 VMB20 2246
  2235 +hy2410 MACH_HY2410 HY2410 2247
  2236 +hy9315 MACH_HY9315 HY9315 2248
  2237 +bullwinkle MACH_BULLWINKLE BULLWINKLE 2249
  2238 +arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
  2239 +vs_v210 MACH_VS_V210 VS_V210 2252
  2240 +vs_v212 MACH_VS_V212 VS_V212 2253
  2241 +hmt MACH_HMT HMT 2254
  2242 +suen3 MACH_SUEN3 SUEN3 2255
  2243 +vesper MACH_VESPER VESPER 2256
  2244 +str9 MACH_STR9 STR9 2257
  2245 +omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
  2246 +simcom MACH_SIMCOM SIMCOM 2259
  2247 +mcwebio MACH_MCWEBIO MCWEBIO 2260