Merge tag 'spi-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown: "A few driver specific fixes, the main one being the fix for handling of complete callbacks that are open coded in individual drivers to allow callers to omit the completion. As we move things into the core that sort of issue should become less and less common" * tag 'spi-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: qup: Depend on ARCH_QCOM spi: efm32: Update binding document to make "efm32,location" property optional spi: omap2-mcspi: Convert to use devm_kcalloc spi: Always check complete callback before calling it

Merge tag 'spi-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown: "A few driver specific fixes, the main one being the fix for handling of complete callbacks that are open coded in individual drivers to allow callers to omit the completion. As we move things into the core that sort of issue should become less and less common" * tag 'spi-v3.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: qup: Depend on ARCH_QCOM spi: efm32: Update binding document to make "efm32,location" property optional spi: omap2-mcspi: Convert to use devm_kcalloc spi: Always check complete callback before calling it
Linus Torvalds
2 parents c0c4cf0645 6eadd84631
Showing 10 changed files Side-by-side Diff
Documentation/devicetree/bindings/spi/efm32-spi.txt
drivers/spi/Kconfig
drivers/spi/spi-fsl-espi.c
drivers/spi/spi-fsl-spi.c
drivers/spi/spi-mpc512x-psc.c
drivers/spi/spi-mpc52xx-psc.c
drivers/spi/spi-mpc52xx.c
drivers/spi/spi-omap2-mcspi.c
drivers/spi/spi-sh.c
drivers/spi/spi-txx9.c
@@ -8,7 +8,13 @@
 - interrupts: pair specifying rx and tx irq
 - clocks: phandle to the spi clock
 - cs-gpios: see spi-bus.txt
-- efm32,location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values.
+
+Recommended properties :
+- efm32,location: Value to write to the ROUTE register's LOCATION bitfield to
+                  configure the pinmux for the device, see datasheet for values.
+                  If "efm32,location" property is not provided, keeping what is
+                  already configured in the hardware, so its either the reset
+                  default 0 or whatever the bootloader did.
  
 Example:
  
@@ -383,7 +383,7 @@
  
 config SPI_QUP
 	tristate "Qualcomm SPI controller with QUP interface"
-	depends on ARCH_MSM_DT || (ARM && COMPILE_TEST)
+	depends on ARCH_QCOM || (ARM && COMPILE_TEST)
 	help
 	  Qualcomm Universal Peripheral (QUP) core is an AHB slave that
 	  provides a common data path (an output FIFO and an input FIFO)
@@ -441,7 +441,8 @@
  
 	m->actual_length = espi_trans.actual_length;
 	m->status = espi_trans.status;
-	m->complete(m->context);
+	if (m->complete)
+		m->complete(m->context);
 }
  
 static int fsl_espi_setup(struct spi_device *spi)
@@ -408,7 +408,8 @@
 	}
  
 	m->status = status;
-	m->complete(m->context);
+	if (m->complete)
+		m->complete(m->context);
  
 	if (status || !cs_change) {
 		ndelay(nsecs);
@@ -300,7 +300,8 @@
 	}
  
 	m->status = status;
-	m->complete(m->context);
+	if (m->complete)
+		m->complete(m->context);
  
 	if (status || !cs_change)
 		mpc512x_psc_spi_deactivate_cs(spi);
@@ -247,7 +247,8 @@
 		}
  
 		m->status = status;
-		m->complete(m->context);
+		if (m->complete)
+			m->complete(m->context);
  
 		if (status || !cs_change)
 			mpc52xx_psc_spi_deactivate_cs(spi);
@@ -234,7 +234,8 @@
 		dev_err(&ms->master->dev, "mode fault\n");
 		mpc52xx_spi_chipsel(ms, 0);
 		ms->message->status = -EIO;
-		ms->message->complete(ms->message->context);
+		if (ms->message->complete)
+			ms->message->complete(ms->message->context);
 		ms->state = mpc52xx_spi_fsmstate_idle;
 		return FSM_CONTINUE;
 	}
@@ -288,7 +289,8 @@
 		ms->msg_count++;
 		mpc52xx_spi_chipsel(ms, 0);
 		ms->message->status = 0;
-		ms->message->complete(ms->message->context);
+		if (ms->message->complete)
+			ms->message->complete(ms->message->context);
 		ms->state = mpc52xx_spi_fsmstate_idle;
 		return FSM_CONTINUE;
 	}
@@ -1379,12 +1379,13 @@
  
 	INIT_LIST_HEAD(&mcspi->ctx.cs);
  
-	mcspi->dma_channels = kcalloc(master->num_chipselect,
-			sizeof(struct omap2_mcspi_dma),
-			GFP_KERNEL);
-
-	if (mcspi->dma_channels == NULL)
+	mcspi->dma_channels = devm_kcalloc(&pdev->dev, master->num_chipselect,
+					   sizeof(struct omap2_mcspi_dma),
+					   GFP_KERNEL);
+	if (mcspi->dma_channels == NULL) {
+		status = -ENOMEM;
 		goto free_master;
+	}
  
 	for (i = 0; i < master->num_chipselect; i++) {
 		char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
@@ -1426,7 +1427,7 @@
 	}
  
 	if (status < 0)
-		goto dma_chnl_free;
+		goto free_master;
  
 	pm_runtime_use_autosuspend(&pdev->dev);
 	pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
@@ -1444,8 +1445,6 @@
  
 disable_pm:
 	pm_runtime_disable(&pdev->dev);
-dma_chnl_free:
-	kfree(mcspi->dma_channels);
 free_master:
 	spi_master_put(master);
 	return status;
  
  
@@ -1453,18 +1452,11 @@
  
 static int omap2_mcspi_remove(struct platform_device *pdev)
 {
-	struct spi_master	*master;
-	struct omap2_mcspi	*mcspi;
-	struct omap2_mcspi_dma	*dma_channels;
+	struct spi_master *master = platform_get_drvdata(pdev);
+	struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
  
-	master = platform_get_drvdata(pdev);
-	mcspi = spi_master_get_devdata(master);
-	dma_channels = mcspi->dma_channels;
-
 	pm_runtime_put_sync(mcspi->dev);
 	pm_runtime_disable(&pdev->dev);
-
-	kfree(dma_channels);
  
 	return 0;
 }
@@ -322,7 +322,8 @@
 		spin_lock_irqsave(&ss->lock, flags);
  
 		mesg->status = 0;
-		mesg->complete(mesg->context);
+		if (mesg->complete)
+			mesg->complete(mesg->context);
 	}
  
 	clear_fifo(ss);
@@ -340,7 +341,8 @@
  
  error:
 	mesg->status = ret;
-	mesg->complete(mesg->context);
+	if (mesg->complete)
+		mesg->complete(mesg->context);
  
 	spi_sh_clear_bit(ss, SPI_SH_SSA | SPI_SH_SSDB | SPI_SH_SSD,
 			 SPI_SH_CR1);
@@ -262,7 +262,8 @@
  
 exit:
 	m->status = status;
-	m->complete(m->context);
+	if (m->complete)
+		m->complete(m->context);
  
 	/* normally deactivate chipselect ... unless no error and
 	 * cs_change has hinted that the next message will probably
...	...	@@ -8,7 +8,13 @@
8	8	- interrupts: pair specifying rx and tx irq
9	9	- clocks: phandle to the spi clock
10	10	- cs-gpios: see spi-bus.txt
11		-- efm32,location: Value to write to the ROUTE register's LOCATION bitfield to configure the pinmux for the device, see datasheet for values.
	11	+
	12	+Recommended properties :
	13	+- efm32,location: Value to write to the ROUTE register's LOCATION bitfield to
	14	+ configure the pinmux for the device, see datasheet for values.
	15	+ If "efm32,location" property is not provided, keeping what is
	16	+ already configured in the hardware, so its either the reset
	17	+ default 0 or whatever the bootloader did.
12	18
13	19	Example:
14	20
...	...	@@ -383,7 +383,7 @@
383	383
384	384	config SPI_QUP
385	385	tristate "Qualcomm SPI controller with QUP interface"
386		- depends on ARCH_MSM_DT \|\| (ARM && COMPILE_TEST)
	386	+ depends on ARCH_QCOM \|\| (ARM && COMPILE_TEST)
387	387	help
388	388	Qualcomm Universal Peripheral (QUP) core is an AHB slave that
389	389	provides a common data path (an output FIFO and an input FIFO)
...	...	@@ -441,7 +441,8 @@
441	441
442	442	m->actual_length = espi_trans.actual_length;
443	443	m->status = espi_trans.status;
444		- m->complete(m->context);
	444	+ if (m->complete)
	445	+ m->complete(m->context);
445	446	}
446	447
447	448	static int fsl_espi_setup(struct spi_device *spi)
...	...	@@ -408,7 +408,8 @@
408	408	}
409	409
410	410	m->status = status;
411		- m->complete(m->context);
	411	+ if (m->complete)
	412	+ m->complete(m->context);
412	413
413	414	if (status \|\| !cs_change) {
414	415	ndelay(nsecs);
...	...	@@ -300,7 +300,8 @@
300	300	}
301	301
302	302	m->status = status;
303		- m->complete(m->context);
	303	+ if (m->complete)
	304	+ m->complete(m->context);
304	305
305	306	if (status \|\| !cs_change)
306	307	mpc512x_psc_spi_deactivate_cs(spi);
...	...	@@ -247,7 +247,8 @@
247	247	}
248	248
249	249	m->status = status;
250		- m->complete(m->context);
	250	+ if (m->complete)
	251	+ m->complete(m->context);
251	252
252	253	if (status \|\| !cs_change)
253	254	mpc52xx_psc_spi_deactivate_cs(spi);
...	...	@@ -234,7 +234,8 @@
234	234	dev_err(&ms->master->dev, "mode fault\n");
235	235	mpc52xx_spi_chipsel(ms, 0);
236	236	ms->message->status = -EIO;
237		- ms->message->complete(ms->message->context);
	237	+ if (ms->message->complete)
	238	+ ms->message->complete(ms->message->context);
238	239	ms->state = mpc52xx_spi_fsmstate_idle;
239	240	return FSM_CONTINUE;
240	241	}
...	...	@@ -288,7 +289,8 @@
288	289	ms->msg_count++;
289	290	mpc52xx_spi_chipsel(ms, 0);
290	291	ms->message->status = 0;
291		- ms->message->complete(ms->message->context);
	292	+ if (ms->message->complete)
	293	+ ms->message->complete(ms->message->context);
292	294	ms->state = mpc52xx_spi_fsmstate_idle;
293	295	return FSM_CONTINUE;
294	296	}
...	...	@@ -1379,12 +1379,13 @@
1379	1379
1380	1380	INIT_LIST_HEAD(&mcspi->ctx.cs);
1381	1381
1382		- mcspi->dma_channels = kcalloc(master->num_chipselect,
1383		- sizeof(struct omap2_mcspi_dma),
1384		- GFP_KERNEL);
1385		-
1386		- if (mcspi->dma_channels == NULL)
	1382	+ mcspi->dma_channels = devm_kcalloc(&pdev->dev, master->num_chipselect,
	1383	+ sizeof(struct omap2_mcspi_dma),
	1384	+ GFP_KERNEL);
	1385	+ if (mcspi->dma_channels == NULL) {
	1386	+ status = -ENOMEM;
1387	1387	goto free_master;
	1388	+ }
1388	1389
1389	1390	for (i = 0; i < master->num_chipselect; i++) {
1390	1391	char *dma_rx_ch_name = mcspi->dma_channels[i].dma_rx_ch_name;
...	...	@@ -1426,7 +1427,7 @@
1426	1427	}
1427	1428
1428	1429	if (status < 0)
1429		- goto dma_chnl_free;
	1430	+ goto free_master;
1430	1431
1431	1432	pm_runtime_use_autosuspend(&pdev->dev);
1432	1433	pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
...	...	@@ -1444,8 +1445,6 @@
1444	1445
1445	1446	disable_pm:
1446	1447	pm_runtime_disable(&pdev->dev);
1447		-dma_chnl_free:
1448		- kfree(mcspi->dma_channels);
1449	1448	free_master:
1450	1449	spi_master_put(master);
1451	1450	return status;
1452	1451
1453	1452
...	...	@@ -1453,18 +1452,11 @@
1453	1452
1454	1453	static int omap2_mcspi_remove(struct platform_device *pdev)
1455	1454	{
1456		- struct spi_master *master;
1457		- struct omap2_mcspi *mcspi;
1458		- struct omap2_mcspi_dma *dma_channels;
	1455	+ struct spi_master *master = platform_get_drvdata(pdev);
	1456	+ struct omap2_mcspi *mcspi = spi_master_get_devdata(master);
1459	1457
1460		- master = platform_get_drvdata(pdev);
1461		- mcspi = spi_master_get_devdata(master);
1462		- dma_channels = mcspi->dma_channels;
1463		-
1464	1458	pm_runtime_put_sync(mcspi->dev);
1465	1459	pm_runtime_disable(&pdev->dev);
1466		-
1467		- kfree(dma_channels);
1468	1460
1469	1461	return 0;
1470	1462	}
...	...	@@ -322,7 +322,8 @@
322	322	spin_lock_irqsave(&ss->lock, flags);
323	323
324	324	mesg->status = 0;
325		- mesg->complete(mesg->context);
	325	+ if (mesg->complete)
	326	+ mesg->complete(mesg->context);
326	327	}
327	328
328	329	clear_fifo(ss);
...	...	@@ -340,7 +341,8 @@
340	341
341	342	error:
342	343	mesg->status = ret;
343		- mesg->complete(mesg->context);
	344	+ if (mesg->complete)
	345	+ mesg->complete(mesg->context);
344	346
345	347	spi_sh_clear_bit(ss, SPI_SH_SSA \| SPI_SH_SSDB \| SPI_SH_SSD,
346	348	SPI_SH_CR1);
...	...	@@ -262,7 +262,8 @@
262	262
263	263	exit:
264	264	m->status = status;
265		- m->complete(m->context);
	265	+ if (m->complete)
	266	+ m->complete(m->context);
266	267
267	268	/* normally deactivate chipselect ... unless no error and
268	269	* cs_change has hinted that the next message will probably