Eric Lee / smarc-ti-linux-kernel

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Commit 7b215de3d0abbc4f6daf2efd19e8809af0564490

Authored by Linus Torvalds
2 parents 1fe9eb1847 642653d16a
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux into next 

Pull i2c updates from Wolfram Sang:
 "I2C has the following updates for 3.16:

   - major cleanups to the rcar and sh_mobile drivers
   - removal of nuc900 driver which had a compile error for years
   - usual bunch of driver updates, bugfixes and cleanups"

* 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (44 commits)
  i2c: pca954x: Fix compilation without CONFIG_GPIOLIB
  i2c: mux: pca954x: Use the descriptor-based GPIO API
  i2c: mpc: insert DR read in i2c_fixup()
  i2c: bfin: turn to Resource-managed API in probe function
  i2c: Make of_device_id array const
  i2c: remove unnecessary OOM messages
  i2c: designware-pci: Add Haswell PCI IDs
  i2c: designware: Add runtime PM hooks
  i2c: designware: Disable device on system suspend
  i2c: nuc900: remove driver
  i2c: imx: update i2c clock divider for each transaction
  i2c: imx: fix the i2c bus hang issue when do repeat restart
  i2c: rcar: update copyright and license information
  i2c: rcar: janitorial cleanup after refactoring
  i2c: rcar: reuse status bits as enable bits
  i2c: rcar: remove spinlock
  i2c: rcar: refactor status bit handling
  i2c: rcar: refactor setting up msg
  i2c: rcar: check bus free before first message
  i2c: rcar: refactor irq state machine
  ...

Showing 41 changed files Side-by-side Diff

Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.txt
Diff comments   View file @ 7b215de
... ... @@ -8,6 +8,12 @@
8 8 the case where there is a device on the bus that has errata and/or bugs
9 9 that makes standard multimaster mode not feasible.
10 10  
  11 +Note that this scheme works well enough but has some downsides:
  12 +* It is nonstandard (not using standard I2C multimaster)
  13 +* Having two masters on a bus in general makes it relatively hard to debug
  14 + problems (hard to tell if i2c issues were caused by one master, another, or
  15 + some device on the bus).
  16 +
11 17  
12 18 Algorithm:
13 19  
Documentation/devicetree/bindings/i2c/i2c-exynos5.txt
Diff comments   View file @ 7b215de
... ... @@ -5,7 +5,14 @@
5 5  
6 6 Required properties:
7 7 - compatible: value should be.
8   - -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c.
  8 + -> "samsung,exynos5-hsi2c", (DEPRECATED)
  9 + for i2c compatible with HSI2C available
  10 + on Exynos5250 and Exynos5420 SoCs.
  11 + -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
  12 + on Exynos5250 and Exynos5420 SoCs.
  13 + -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
  14 + on Exynos5260 SoCs.
  15 +
9 16 - reg: physical base address of the controller and length of memory mapped
10 17 region.
11 18 - interrupts: interrupt number to the cpu.
... ... @@ -26,7 +33,7 @@
26 33 Example:
27 34  
28 35 hsi2c@12ca0000 {
29   - compatible = "samsung,exynos5-hsi2c";
  36 + compatible = "samsung,exynos5250-hsi2c";
30 37 reg = <0x12ca0000 0x100>;
31 38 interrupts = <56>;
32 39 clock-frequency = <100000>;
Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt
Diff comments   View file @ 7b215de
... ... @@ -5,7 +5,7 @@
5 5  
6 6 - reg : Offset and length of the register set for the device
7 7 - compatible : Should be either:
8   - - "allwinner,sun4i-i2c"
  8 + - "allwinner,sun4i-a10-i2c"
9 9 - "allwinner,sun6i-a31-i2c"
10 10 - "marvell,mv64xxx-i2c"
11 11 - "marvell,mv78230-i2c"
Documentation/devicetree/bindings/i2c/i2c-rcar.txt
Diff comments   View file @ 7b215de
... ... @@ -7,6 +7,9 @@
7 7 "renesas,i2c-r8a7779"
8 8 "renesas,i2c-r8a7790"
9 9 "renesas,i2c-r8a7791"
  10 + "renesas,i2c-r8a7792"
  11 + "renesas,i2c-r8a7793"
  12 + "renesas,i2c-r8a7794"
10 13 - reg: physical base address of the controller and length of memory mapped
11 14 region.
12 15 - interrupts: interrupt specifier.
Documentation/devicetree/bindings/i2c/i2c-sh_mobile.txt
Diff comments   View file @ 7b215de
  1 +Device tree configuration for Renesas IIC (sh_mobile) driver
  2 +
  3 +Required properties:
  4 +- compatible : "renesas,iic-<soctype>". "renesas,rmobile-iic" as fallback
  5 +- reg : address start and address range size of device
  6 +- interrupts : interrupt of device
  7 +- clocks : clock for device
  8 +- #address-cells : should be <1>
  9 +- #size-cells : should be <0>
  10 +
  11 +Optional properties:
  12 +- clock-frequency : frequency of bus clock in Hz. Default 100kHz if unset.
  13 +
  14 +Pinctrl properties might be needed, too. See there.
  15 +
  16 +Example:
  17 +
  18 + iic0: i2c@e6500000 {
  19 + compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
  20 + reg = <0 0xe6500000 0 0x425>;
  21 + interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
  22 + clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
  23 + clock-frequency = <400000>;
  24 + #address-cells = <1>;
  25 + #size-cells = <0>;
  26 + };
arch/arm/boot/dts/sun4i-a10.dtsi
Diff comments   View file @ 7b215de
... ... @@ -713,7 +713,7 @@
713 713 };
714 714  
715 715 i2c0: i2c@01c2ac00 {
716   - compatible = "allwinner,sun4i-i2c";
  716 + compatible = "allwinner,sun4i-a10-i2c";
717 717 reg = <0x01c2ac00 0x400>;
718 718 interrupts = <7>;
719 719 clocks = <&apb1_gates 0>;
... ... @@ -724,7 +724,7 @@
724 724 };
725 725  
726 726 i2c1: i2c@01c2b000 {
727   - compatible = "allwinner,sun4i-i2c";
  727 + compatible = "allwinner,sun4i-a10-i2c";
728 728 reg = <0x01c2b000 0x400>;
729 729 interrupts = <8>;
730 730 clocks = <&apb1_gates 1>;
... ... @@ -735,7 +735,7 @@
735 735 };
736 736  
737 737 i2c2: i2c@01c2b400 {
738   - compatible = "allwinner,sun4i-i2c";
  738 + compatible = "allwinner,sun4i-a10-i2c";
739 739 reg = <0x01c2b400 0x400>;
740 740 interrupts = <9>;
741 741 clocks = <&apb1_gates 2>;
arch/arm/boot/dts/sun5i-a10s.dtsi
Diff comments   View file @ 7b215de
... ... @@ -560,7 +560,7 @@
560 560 i2c0: i2c@01c2ac00 {
561 561 #address-cells = <1>;
562 562 #size-cells = <0>;
563   - compatible = "allwinner,sun4i-i2c";
  563 + compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
564 564 reg = <0x01c2ac00 0x400>;
565 565 interrupts = <7>;
566 566 clocks = <&apb1_gates 0>;
... ... @@ -571,7 +571,7 @@
571 571 i2c1: i2c@01c2b000 {
572 572 #address-cells = <1>;
573 573 #size-cells = <0>;
574   - compatible = "allwinner,sun4i-i2c";
  574 + compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
575 575 reg = <0x01c2b000 0x400>;
576 576 interrupts = <8>;
577 577 clocks = <&apb1_gates 1>;
... ... @@ -582,7 +582,7 @@
582 582 i2c2: i2c@01c2b400 {
583 583 #address-cells = <1>;
584 584 #size-cells = <0>;
585   - compatible = "allwinner,sun4i-i2c";
  585 + compatible = "allwinner,sun5i-a10s-i2c", "allwinner,sun4i-a10-i2c";
586 586 reg = <0x01c2b400 0x400>;
587 587 interrupts = <9>;
588 588 clocks = <&apb1_gates 2>;
arch/arm/boot/dts/sun5i-a13.dtsi
Diff comments   View file @ 7b215de
... ... @@ -486,7 +486,7 @@
486 486 };
487 487  
488 488 i2c0: i2c@01c2ac00 {
489   - compatible = "allwinner,sun4i-i2c";
  489 + compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
490 490 reg = <0x01c2ac00 0x400>;
491 491 interrupts = <7>;
492 492 clocks = <&apb1_gates 0>;
... ... @@ -497,7 +497,7 @@
497 497 };
498 498  
499 499 i2c1: i2c@01c2b000 {
500   - compatible = "allwinner,sun4i-i2c";
  500 + compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
501 501 reg = <0x01c2b000 0x400>;
502 502 interrupts = <8>;
503 503 clocks = <&apb1_gates 1>;
... ... @@ -508,7 +508,7 @@
508 508 };
509 509  
510 510 i2c2: i2c@01c2b400 {
511   - compatible = "allwinner,sun4i-i2c";
  511 + compatible = "allwinner,sun5i-a13-i2c", "allwinner,sun4i-a10-i2c";
512 512 reg = <0x01c2b400 0x400>;
513 513 interrupts = <9>;
514 514 clocks = <&apb1_gates 2>;
arch/arm/boot/dts/sun7i-a20.dtsi
Diff comments   View file @ 7b215de
... ... @@ -863,7 +863,7 @@
863 863 };
864 864  
865 865 i2c0: i2c@01c2ac00 {
866   - compatible = "allwinner,sun4i-i2c";
  866 + compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
867 867 reg = <0x01c2ac00 0x400>;
868 868 interrupts = <0 7 4>;
869 869 clocks = <&apb1_gates 0>;
... ... @@ -874,7 +874,7 @@
874 874 };
875 875  
876 876 i2c1: i2c@01c2b000 {
877   - compatible = "allwinner,sun4i-i2c";
  877 + compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
878 878 reg = <0x01c2b000 0x400>;
879 879 interrupts = <0 8 4>;
880 880 clocks = <&apb1_gates 1>;
... ... @@ -885,7 +885,7 @@
885 885 };
886 886  
887 887 i2c2: i2c@01c2b400 {
888   - compatible = "allwinner,sun4i-i2c";
  888 + compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
889 889 reg = <0x01c2b400 0x400>;
890 890 interrupts = <0 9 4>;
891 891 clocks = <&apb1_gates 2>;
... ... @@ -896,7 +896,7 @@
896 896 };
897 897  
898 898 i2c3: i2c@01c2b800 {
899   - compatible = "allwinner,sun4i-i2c";
  899 + compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
900 900 reg = <0x01c2b800 0x400>;
901 901 interrupts = <0 88 4>;
902 902 clocks = <&apb1_gates 3>;
... ... @@ -907,7 +907,7 @@
907 907 };
908 908  
909 909 i2c4: i2c@01c2c000 {
910   - compatible = "allwinner,sun4i-i2c";
  910 + compatible = "allwinner,sun7i-a20-i2c", "allwinner,sun4i-a10-i2c";
911 911 reg = <0x01c2c000 0x400>;
912 912 interrupts = <0 89 4>;
913 913 clocks = <&apb1_gates 15>;
drivers/i2c/busses/Kconfig
Diff comments   View file @ 7b215de
... ... @@ -449,7 +449,7 @@
449 449  
450 450 config I2C_EG20T
451 451 tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) I2C"
452   - depends on PCI
  452 + depends on PCI && (X86_32 || COMPILE_TEST)
453 453 help
454 454 This driver is for PCH(Platform controller Hub) I2C of EG20T which
455 455 is an IOH(Input/Output Hub) for x86 embedded processor.
... ... @@ -569,13 +569,6 @@
569 569 If you say yes to this option, support will be included for the
570 570 I2C interface from ST-Ericsson's Nomadik and Ux500 architectures,
571 571 as well as the STA2X11 PCIe I/O HUB.
572   -
573   -config I2C_NUC900
574   - tristate "NUC900 I2C Driver"
575   - depends on ARCH_W90X900
576   - help
577   - Say Y here to include support for I2C controller in the
578   - Winbond/Nuvoton NUC900 based System-on-Chip devices.
579 572  
580 573 config I2C_OCORES
581 574 tristate "OpenCores I2C Controller"
drivers/i2c/busses/Makefile
Diff comments   View file @ 7b215de
... ... @@ -55,7 +55,6 @@
55 55 obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
56 56 obj-$(CONFIG_I2C_MXS) += i2c-mxs.o
57 57 obj-$(CONFIG_I2C_NOMADIK) += i2c-nomadik.o
58   -obj-$(CONFIG_I2C_NUC900) += i2c-nuc900.o
59 58 obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
60 59 obj-$(CONFIG_I2C_OMAP) += i2c-omap.o
61 60 obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
drivers/i2c/busses/i2c-ali1563.c
Diff comments   View file @ 7b215de
... ... @@ -63,7 +63,7 @@
63 63 static struct pci_driver ali1563_pci_driver;
64 64 static unsigned short ali1563_smba;
65 65  
66   -static int ali1563_transaction(struct i2c_adapter * a, int size)
  66 +static int ali1563_transaction(struct i2c_adapter *a, int size)
67 67 {
68 68 u32 data;
69 69 int timeout;
... ... @@ -78,7 +78,7 @@
78 78 data = inb_p(SMB_HST_STS);
79 79 if (data & HST_STS_BAD) {
80 80 dev_err(&a->dev, "ali1563: Trying to reset busy device\n");
81   - outb_p(data | HST_STS_BAD,SMB_HST_STS);
  81 + outb_p(data | HST_STS_BAD, SMB_HST_STS);
82 82 data = inb_p(SMB_HST_STS);
83 83 if (data & HST_STS_BAD)
84 84 return -EBUSY;
85 85  
... ... @@ -102,10 +102,10 @@
102 102 if (!timeout) {
103 103 dev_err(&a->dev, "Timeout - Trying to KILL transaction!\n");
104 104 /* Issue 'kill' to host controller */
105   - outb_p(HST_CNTL2_KILL,SMB_HST_CNTL2);
  105 + outb_p(HST_CNTL2_KILL, SMB_HST_CNTL2);
106 106 data = inb_p(SMB_HST_STS);
107 107 status = -ETIMEDOUT;
108   - }
  108 + }
109 109  
110 110 /* device error - no response, ignore the autodetection case */
111 111 if (data & HST_STS_DEVERR) {
112 112  
113 113  
... ... @@ -117,18 +117,18 @@
117 117 if (data & HST_STS_BUSERR) {
118 118 dev_err(&a->dev, "Bus collision!\n");
119 119 /* Issue timeout, hoping it helps */
120   - outb_p(HST_CNTL1_TIMEOUT,SMB_HST_CNTL1);
  120 + outb_p(HST_CNTL1_TIMEOUT, SMB_HST_CNTL1);
121 121 }
122 122  
123 123 if (data & HST_STS_FAIL) {
124 124 dev_err(&a->dev, "Cleaning fail after KILL!\n");
125   - outb_p(0x0,SMB_HST_CNTL2);
  125 + outb_p(0x0, SMB_HST_CNTL2);
126 126 }
127 127  
128 128 return status;
129 129 }
130 130  
131   -static int ali1563_block_start(struct i2c_adapter * a)
  131 +static int ali1563_block_start(struct i2c_adapter *a)
132 132 {
133 133 u32 data;
134 134 int timeout;
... ... @@ -142,8 +142,8 @@
142 142  
143 143 data = inb_p(SMB_HST_STS);
144 144 if (data & HST_STS_BAD) {
145   - dev_warn(&a->dev,"ali1563: Trying to reset busy device\n");
146   - outb_p(data | HST_STS_BAD,SMB_HST_STS);
  145 + dev_warn(&a->dev, "ali1563: Trying to reset busy device\n");
  146 + outb_p(data | HST_STS_BAD, SMB_HST_STS);
147 147 data = inb_p(SMB_HST_STS);
148 148 if (data & HST_STS_BAD)
149 149 return -EBUSY;
150 150  
... ... @@ -184,13 +184,14 @@
184 184 return status;
185 185 }
186 186  
187   -static int ali1563_block(struct i2c_adapter * a, union i2c_smbus_data * data, u8 rw)
  187 +static int ali1563_block(struct i2c_adapter *a,
  188 + union i2c_smbus_data *data, u8 rw)
188 189 {
189 190 int i, len;
190 191 int error = 0;
191 192  
192 193 /* Do we need this? */
193   - outb_p(HST_CNTL1_LAST,SMB_HST_CNTL1);
  194 + outb_p(HST_CNTL1_LAST, SMB_HST_CNTL1);
194 195  
195 196 if (rw == I2C_SMBUS_WRITE) {
196 197 len = data->block[0];
... ... @@ -198,8 +199,8 @@
198 199 len = 1;
199 200 else if (len > 32)
200 201 len = 32;
201   - outb_p(len,SMB_HST_DAT0);
202   - outb_p(data->block[1],SMB_BLK_DAT);
  202 + outb_p(len, SMB_HST_DAT0);
  203 + outb_p(data->block[1], SMB_BLK_DAT);
203 204 } else
204 205 len = 32;
205 206  
206 207  
... ... @@ -208,10 +209,12 @@
208 209 for (i = 0; i < len; i++) {
209 210 if (rw == I2C_SMBUS_WRITE) {
210 211 outb_p(data->block[i + 1], SMB_BLK_DAT);
211   - if ((error = ali1563_block_start(a)))
  212 + error = ali1563_block_start(a);
  213 + if (error)
212 214 break;
213 215 } else {
214   - if ((error = ali1563_block_start(a)))
  216 + error = ali1563_block_start(a);
  217 + if (error)
215 218 break;
216 219 if (i == 0) {
217 220 len = inb_p(SMB_HST_DAT0);
218 221  
219 222  
220 223  
221 224  
... ... @@ -224,25 +227,26 @@
224 227 }
225 228 }
226 229 /* Do we need this? */
227   - outb_p(HST_CNTL1_LAST,SMB_HST_CNTL1);
  230 + outb_p(HST_CNTL1_LAST, SMB_HST_CNTL1);
228 231 return error;
229 232 }
230 233  
231   -static s32 ali1563_access(struct i2c_adapter * a, u16 addr,
  234 +static s32 ali1563_access(struct i2c_adapter *a, u16 addr,
232 235 unsigned short flags, char rw, u8 cmd,
233   - int size, union i2c_smbus_data * data)
  236 + int size, union i2c_smbus_data *data)
234 237 {
235 238 int error = 0;
236 239 int timeout;
237 240 u32 reg;
238 241  
239 242 for (timeout = ALI1563_MAX_TIMEOUT; timeout; timeout--) {
240   - if (!(reg = inb_p(SMB_HST_STS) & HST_STS_BUSY))
  243 + reg = inb_p(SMB_HST_STS);
  244 + if (!(reg & HST_STS_BUSY))
241 245 break;
242 246 }
243 247 if (!timeout)
244   - dev_warn(&a->dev,"SMBus not idle. HST_STS = %02x\n",reg);
245   - outb_p(0xff,SMB_HST_STS);
  248 + dev_warn(&a->dev, "SMBus not idle. HST_STS = %02x\n", reg);
  249 + outb_p(0xff, SMB_HST_STS);
246 250  
247 251 /* Map the size to what the chip understands */
248 252 switch (size) {
249 253  
250 254  
... ... @@ -268,13 +272,14 @@
268 272 }
269 273  
270 274 outb_p(((addr & 0x7f) << 1) | (rw & 0x01), SMB_HST_ADD);
271   - outb_p((inb_p(SMB_HST_CNTL2) & ~HST_CNTL2_SIZEMASK) | (size << 3), SMB_HST_CNTL2);
  275 + outb_p((inb_p(SMB_HST_CNTL2) & ~HST_CNTL2_SIZEMASK) |
  276 + (size << 3), SMB_HST_CNTL2);
272 277  
273 278 /* Write the command register */
274 279  
275   - switch(size) {
  280 + switch (size) {
276 281 case HST_CNTL2_BYTE:
277   - if (rw== I2C_SMBUS_WRITE)
  282 + if (rw == I2C_SMBUS_WRITE)
278 283 /* Beware it uses DAT0 register and not CMD! */
279 284 outb_p(cmd, SMB_HST_DAT0);
280 285 break;
281 286  
... ... @@ -292,11 +297,12 @@
292 297 break;
293 298 case HST_CNTL2_BLOCK:
294 299 outb_p(cmd, SMB_HST_CMD);
295   - error = ali1563_block(a,data,rw);
  300 + error = ali1563_block(a, data, rw);
296 301 goto Done;
297 302 }
298 303  
299   - if ((error = ali1563_transaction(a, size)))
  304 + error = ali1563_transaction(a, size);
  305 + if (error)
300 306 goto Done;
301 307  
302 308 if ((rw == I2C_SMBUS_WRITE) || (size == HST_CNTL2_QUICK))
... ... @@ -317,7 +323,7 @@
317 323 return error;
318 324 }
319 325  
320   -static u32 ali1563_func(struct i2c_adapter * a)
  326 +static u32 ali1563_func(struct i2c_adapter *a)
321 327 {
322 328 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
323 329 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
324 330  
... ... @@ -329,13 +335,13 @@
329 335 {
330 336 u16 ctrl;
331 337  
332   - pci_read_config_word(dev,ALI1563_SMBBA,&ctrl);
  338 + pci_read_config_word(dev, ALI1563_SMBBA, &ctrl);
333 339  
334 340 /* SMB I/O Base in high 12 bits and must be aligned with the
335 341 * size of the I/O space. */
336 342 ali1563_smba = ctrl & ~(ALI1563_SMB_IOSIZE - 1);
337 343 if (!ali1563_smba) {
338   - dev_warn(&dev->dev,"ali1563_smba Uninitialized\n");
  344 + dev_warn(&dev->dev, "ali1563_smba Uninitialized\n");
339 345 goto Err;
340 346 }
341 347  
... ... @@ -350,8 +356,8 @@
350 356 ctrl | ALI1563_SMB_IOEN);
351 357 pci_read_config_word(dev, ALI1563_SMBBA, &ctrl);
352 358 if (!(ctrl & ALI1563_SMB_IOEN)) {
353   - dev_err(&dev->dev, "I/O space still not enabled, "
354   - "giving up\n");
  359 + dev_err(&dev->dev,
  360 + "I/O space still not enabled, giving up\n");
355 361 goto Err;
356 362 }
357 363 }
... ... @@ -375,7 +381,7 @@
375 381  
376 382 static void ali1563_shutdown(struct pci_dev *dev)
377 383 {
378   - release_region(ali1563_smba,ALI1563_SMB_IOSIZE);
  384 + release_region(ali1563_smba, ALI1563_SMB_IOSIZE);
379 385 }
380 386  
381 387 static const struct i2c_algorithm ali1563_algorithm = {
382 388  
... ... @@ -394,12 +400,14 @@
394 400 {
395 401 int error;
396 402  
397   - if ((error = ali1563_setup(dev)))
  403 + error = ali1563_setup(dev);
  404 + if (error)
398 405 goto exit;
399 406 ali1563_adapter.dev.parent = &dev->dev;
400 407 snprintf(ali1563_adapter.name, sizeof(ali1563_adapter.name),
401 408 "SMBus ALi 1563 Adapter @ %04x", ali1563_smba);
402   - if ((error = i2c_add_adapter(&ali1563_adapter)))
  409 + error = i2c_add_adapter(&ali1563_adapter);
  410 + if (error)
403 411 goto exit_shutdown;
404 412 return 0;
405 413  
406 414  
407 415  
... ... @@ -421,12 +429,12 @@
421 429 {},
422 430 };
423 431  
424   -MODULE_DEVICE_TABLE (pci, ali1563_id_table);
  432 +MODULE_DEVICE_TABLE(pci, ali1563_id_table);
425 433  
426 434 static struct pci_driver ali1563_pci_driver = {
427   - .name = "ali1563_smbus",
  435 + .name = "ali1563_smbus",
428 436 .id_table = ali1563_id_table,
429   - .probe = ali1563_probe,
  437 + .probe = ali1563_probe,
430 438 .remove = ali1563_remove,
431 439 };
432 440  
drivers/i2c/busses/i2c-bcm2835.c
Diff comments   View file @ 7b215de
... ... @@ -225,10 +225,8 @@
225 225 struct i2c_adapter *adap;
226 226  
227 227 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
228   - if (!i2c_dev) {
229   - dev_err(&pdev->dev, "Cannot allocate i2c_dev\n");
  228 + if (!i2c_dev)
230 229 return -ENOMEM;
231   - }
232 230 platform_set_drvdata(pdev, i2c_dev);
233 231 i2c_dev->dev = &pdev->dev;
234 232 init_completion(&i2c_dev->completion);
drivers/i2c/busses/i2c-bfin-twi.c
Diff comments   View file @ 7b215de
... ... @@ -620,35 +620,27 @@
620 620 int rc;
621 621 unsigned int clkhilow;
622 622  
623   - iface = kzalloc(sizeof(struct bfin_twi_iface), GFP_KERNEL);
  623 + iface = devm_kzalloc(&pdev->dev, sizeof(struct bfin_twi_iface),
  624 + GFP_KERNEL);
624 625 if (!iface) {
625 626 dev_err(&pdev->dev, "Cannot allocate memory\n");
626   - rc = -ENOMEM;
627   - goto out_error_nomem;
  627 + return -ENOMEM;
628 628 }
629 629  
630 630 spin_lock_init(&(iface->lock));
631 631  
632 632 /* Find and map our resources */
633 633 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
634   - if (res == NULL) {
635   - dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
636   - rc = -ENOENT;
637   - goto out_error_get_res;
638   - }
639   -
640   - iface->regs_base = ioremap(res->start, resource_size(res));
641   - if (iface->regs_base == NULL) {
  634 + iface->regs_base = devm_ioremap_resource(&pdev->dev, res);
  635 + if (IS_ERR(iface->regs_base)) {
642 636 dev_err(&pdev->dev, "Cannot map IO\n");
643   - rc = -ENXIO;
644   - goto out_error_ioremap;
  637 + return PTR_ERR(iface->regs_base);
645 638 }
646 639  
647 640 iface->irq = platform_get_irq(pdev, 0);
648 641 if (iface->irq < 0) {
649 642 dev_err(&pdev->dev, "No IRQ specified\n");
650   - rc = -ENOENT;
651   - goto out_error_no_irq;
  643 + return -ENOENT;
652 644 }
653 645  
654 646 p_adap = &iface->adap;
655 647  
656 648  
... ... @@ -666,15 +658,15 @@
666 658 "i2c-bfin-twi");
667 659 if (rc) {
668 660 dev_err(&pdev->dev, "Can't setup pin mux!\n");
669   - goto out_error_pin_mux;
  661 + return -EBUSY;
670 662 }
671 663  
672   - rc = request_irq(iface->irq, bfin_twi_interrupt_entry,
  664 + rc = devm_request_irq(&pdev->dev, iface->irq, bfin_twi_interrupt_entry,
673 665 0, pdev->name, iface);
674 666 if (rc) {
675 667 dev_err(&pdev->dev, "Can't get IRQ %d !\n", iface->irq);
676 668 rc = -ENODEV;
677   - goto out_error_req_irq;
  669 + goto out_error;
678 670 }
679 671  
680 672 /* Set TWI internal clock as 10MHz */
... ... @@ -695,7 +687,7 @@
695 687 rc = i2c_add_numbered_adapter(p_adap);
696 688 if (rc < 0) {
697 689 dev_err(&pdev->dev, "Can't add i2c adapter!\n");
698   - goto out_error_add_adapter;
  690 + goto out_error;
699 691 }
700 692  
701 693 platform_set_drvdata(pdev, iface);
702 694  
... ... @@ -705,17 +697,8 @@
705 697  
706 698 return 0;
707 699  
708   -out_error_add_adapter:
709   - free_irq(iface->irq, iface);
710   -out_error_req_irq:
711   -out_error_no_irq:
  700 +out_error:
712 701 peripheral_free_list(dev_get_platdata(&pdev->dev));
713   -out_error_pin_mux:
714   - iounmap(iface->regs_base);
715   -out_error_ioremap:
716   -out_error_get_res:
717   - kfree(iface);
718   -out_error_nomem:
719 702 return rc;
720 703 }
721 704  
722 705  
... ... @@ -724,10 +707,7 @@
724 707 struct bfin_twi_iface *iface = platform_get_drvdata(pdev);
725 708  
726 709 i2c_del_adapter(&(iface->adap));
727   - free_irq(iface->irq, iface);
728 710 peripheral_free_list(dev_get_platdata(&pdev->dev));
729   - iounmap(iface->regs_base);
730   - kfree(iface);
731 711  
732 712 return 0;
733 713 }
drivers/i2c/busses/i2c-designware-pcidrv.c
Diff comments   View file @ 7b215de
... ... @@ -56,6 +56,7 @@
56 56 medfield_5,
57 57  
58 58 baytrail,
  59 + haswell,
59 60 };
60 61  
61 62 struct dw_scl_sda_cfg {
... ... @@ -95,6 +96,15 @@
95 96 .sda_hold = 0x6,
96 97 };
97 98  
  99 +/* Haswell HCNT/LCNT/SDA hold time */
  100 +static struct dw_scl_sda_cfg hsw_config = {
  101 + .ss_hcnt = 0x01b0,
  102 + .fs_hcnt = 0x48,
  103 + .ss_lcnt = 0x01fb,
  104 + .fs_lcnt = 0xa0,
  105 + .sda_hold = 0x9,
  106 +};
  107 +
98 108 static struct dw_pci_controller dw_pci_controllers[] = {
99 109 [moorestown_0] = {
100 110 .bus_num = 0,
... ... @@ -168,6 +178,15 @@
168 178 .functionality = I2C_FUNC_10BIT_ADDR,
169 179 .scl_sda_cfg = &byt_config,
170 180 },
  181 + [haswell] = {
  182 + .bus_num = -1,
  183 + .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  184 + .tx_fifo_depth = 32,
  185 + .rx_fifo_depth = 32,
  186 + .clk_khz = 100000,
  187 + .functionality = I2C_FUNC_10BIT_ADDR,
  188 + .scl_sda_cfg = &hsw_config,
  189 + },
171 190 };
172 191 static struct i2c_algorithm i2c_dw_algo = {
173 192 .master_xfer = i2c_dw_xfer,
... ... @@ -328,6 +347,9 @@
328 347 { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
329 348 { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
330 349 { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
  350 + /* Haswell */
  351 + { PCI_VDEVICE(INTEL, 0x9c61), haswell },
  352 + { PCI_VDEVICE(INTEL, 0x9c62), haswell },
331 353 { 0,}
332 354 };
333 355 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
drivers/i2c/busses/i2c-designware-platdrv.c
Diff comments   View file @ 7b215de
... ... @@ -247,12 +247,13 @@
247 247 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
248 248 #endif
249 249  
250   -#ifdef CONFIG_PM_SLEEP
  250 +#ifdef CONFIG_PM
251 251 static int dw_i2c_suspend(struct device *dev)
252 252 {
253 253 struct platform_device *pdev = to_platform_device(dev);
254 254 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
255 255  
  256 + i2c_dw_disable(i_dev);
256 257 clk_disable_unprepare(i_dev->clk);
257 258  
258 259 return 0;
259 260  
... ... @@ -268,13 +269,11 @@
268 269  
269 270 return 0;
270 271 }
271   -
272   -static SIMPLE_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend, dw_i2c_resume);
273   -#define DW_I2C_DEV_PM_OPS (&dw_i2c_dev_pm_ops)
274   -#else
275   -#define DW_I2C_DEV_PM_OPS NULL
276 272 #endif
277 273  
  274 +static UNIVERSAL_DEV_PM_OPS(dw_i2c_dev_pm_ops, dw_i2c_suspend,
  275 + dw_i2c_resume, NULL);
  276 +
278 277 /* work with hotplug and coldplug */
279 278 MODULE_ALIAS("platform:i2c_designware");
280 279  
... ... @@ -286,7 +285,7 @@
286 285 .owner = THIS_MODULE,
287 286 .of_match_table = of_match_ptr(dw_i2c_of_match),
288 287 .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
289   - .pm = DW_I2C_DEV_PM_OPS,
  288 + .pm = &dw_i2c_dev_pm_ops,
290 289 },
291 290 };
292 291  
drivers/i2c/busses/i2c-diolan-u2c.c
Diff comments   View file @ 7b215de
... ... @@ -455,7 +455,6 @@
455 455 /* allocate memory for our device state and initialize it */
456 456 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
457 457 if (dev == NULL) {
458   - dev_err(&interface->dev, "no memory for device state\n");
459 458 ret = -ENOMEM;
460 459 goto error;
461 460 }
drivers/i2c/busses/i2c-efm32.c
Diff comments   View file @ 7b215de
... ... @@ -320,10 +320,8 @@
320 320 return -EINVAL;
321 321  
322 322 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
323   - if (!ddata) {
324   - dev_dbg(&pdev->dev, "failed to allocate private data\n");
  323 + if (!ddata)
325 324 return -ENOMEM;
326   - }
327 325 platform_set_drvdata(pdev, ddata);
328 326  
329 327 init_completion(&ddata->done);
drivers/i2c/busses/i2c-eg20t.c
Diff comments   View file @ 7b215de
... ... @@ -751,10 +751,8 @@
751 751 pch_pci_dbg(pdev, "Entered.\n");
752 752  
753 753 adap_info = kzalloc((sizeof(struct adapter_info)), GFP_KERNEL);
754   - if (adap_info == NULL) {
755   - pch_pci_err(pdev, "Memory allocation FAILED\n");
  754 + if (adap_info == NULL)
756 755 return -ENOMEM;
757   - }
758 756  
759 757 ret = pci_enable_device(pdev);
760 758 if (ret) {
drivers/i2c/busses/i2c-exynos5.c
Diff comments   View file @ 7b215de
... ... @@ -76,12 +76,6 @@
76 76 #define HSI2C_RXFIFO_TRIGGER_LEVEL(x) ((x) << 4)
77 77 #define HSI2C_TXFIFO_TRIGGER_LEVEL(x) ((x) << 16)
78 78  
79   -/* As per user manual FIFO max depth is 64bytes */
80   -#define HSI2C_FIFO_MAX 0x40
81   -/* default trigger levels for Tx and Rx FIFOs */
82   -#define HSI2C_DEF_TXFIFO_LVL (HSI2C_FIFO_MAX - 0x30)
83   -#define HSI2C_DEF_RXFIFO_LVL (HSI2C_FIFO_MAX - 0x10)
84   -
85 79 /* I2C_TRAILING_CTL Register bits */
86 80 #define HSI2C_TRAILING_COUNT (0xf)
87 81  
88 82  
89 83  
90 84  
... ... @@ -183,14 +177,54 @@
183 177 * 2. Fast speed upto 1Mbps
184 178 */
185 179 int speed_mode;
  180 +
  181 + /* Version of HS-I2C Hardware */
  182 + struct exynos_hsi2c_variant *variant;
186 183 };
187 184  
  185 +/**
  186 + * struct exynos_hsi2c_variant - platform specific HSI2C driver data
  187 + * @fifo_depth: the fifo depth supported by the HSI2C module
  188 + *
  189 + * Specifies platform specific configuration of HSI2C module.
  190 + * Note: A structure for driver specific platform data is used for future
  191 + * expansion of its usage.
  192 + */
  193 +struct exynos_hsi2c_variant {
  194 + unsigned int fifo_depth;
  195 +};
  196 +
  197 +static const struct exynos_hsi2c_variant exynos5250_hsi2c_data = {
  198 + .fifo_depth = 64,
  199 +};
  200 +
  201 +static const struct exynos_hsi2c_variant exynos5260_hsi2c_data = {
  202 + .fifo_depth = 16,
  203 +};
  204 +
188 205 static const struct of_device_id exynos5_i2c_match[] = {
189   - { .compatible = "samsung,exynos5-hsi2c" },
190   - {},
  206 + {
  207 + .compatible = "samsung,exynos5-hsi2c",
  208 + .data = &exynos5250_hsi2c_data
  209 + }, {
  210 + .compatible = "samsung,exynos5250-hsi2c",
  211 + .data = &exynos5250_hsi2c_data
  212 + }, {
  213 + .compatible = "samsung,exynos5260-hsi2c",
  214 + .data = &exynos5260_hsi2c_data
  215 + }, {},
191 216 };
192 217 MODULE_DEVICE_TABLE(of, exynos5_i2c_match);
193 218  
  219 +static inline struct exynos_hsi2c_variant *exynos5_i2c_get_variant
  220 + (struct platform_device *pdev)
  221 +{
  222 + const struct of_device_id *match;
  223 +
  224 + match = of_match_node(exynos5_i2c_match, pdev->dev.of_node);
  225 + return (struct exynos_hsi2c_variant *)match->data;
  226 +}
  227 +
194 228 static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c)
195 229 {
196 230 writel(readl(i2c->regs + HSI2C_INT_STATUS),
... ... @@ -415,7 +449,7 @@
415 449 fifo_status = readl(i2c->regs + HSI2C_FIFO_STATUS);
416 450 fifo_level = HSI2C_TX_FIFO_LVL(fifo_status);
417 451  
418   - len = HSI2C_FIFO_MAX - fifo_level;
  452 + len = i2c->variant->fifo_depth - fifo_level;
419 453 if (len > (i2c->msg->len - i2c->msg_ptr))
420 454 len = i2c->msg->len - i2c->msg_ptr;
421 455  
... ... @@ -483,6 +517,7 @@
483 517 u32 i2c_auto_conf = 0;
484 518 u32 fifo_ctl;
485 519 unsigned long flags;
  520 + unsigned short trig_lvl;
486 521  
487 522 i2c_ctl = readl(i2c->regs + HSI2C_CTL);
488 523 i2c_ctl &= ~(HSI2C_TXCHON | HSI2C_RXCHON);
489 524  
... ... @@ -493,13 +528,19 @@
493 528  
494 529 i2c_auto_conf = HSI2C_READ_WRITE;
495 530  
496   - fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(HSI2C_DEF_TXFIFO_LVL);
  531 + trig_lvl = (i2c->msg->len > i2c->variant->fifo_depth) ?
  532 + (i2c->variant->fifo_depth * 3 / 4) : i2c->msg->len;
  533 + fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(trig_lvl);
  534 +
497 535 int_en |= (HSI2C_INT_RX_ALMOSTFULL_EN |
498 536 HSI2C_INT_TRAILING_EN);
499 537 } else {
500 538 i2c_ctl |= HSI2C_TXCHON;
501 539  
502   - fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(HSI2C_DEF_RXFIFO_LVL);
  540 + trig_lvl = (i2c->msg->len > i2c->variant->fifo_depth) ?
  541 + (i2c->variant->fifo_depth * 1 / 4) : i2c->msg->len;
  542 + fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(trig_lvl);
  543 +
503 544 int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN;
504 545 }
505 546  
506 547  
... ... @@ -621,10 +662,8 @@
621 662 int ret;
622 663  
623 664 i2c = devm_kzalloc(&pdev->dev, sizeof(struct exynos5_i2c), GFP_KERNEL);
624   - if (!i2c) {
625   - dev_err(&pdev->dev, "no memory for state\n");
  665 + if (!i2c)
626 666 return -ENOMEM;
627   - }
628 667  
629 668 if (of_property_read_u32(np, "clock-frequency", &op_clock)) {
630 669 i2c->speed_mode = HSI2C_FAST_SPD;
... ... @@ -691,7 +730,9 @@
691 730 if (ret)
692 731 goto err_clk;
693 732  
694   - exynos5_i2c_init(i2c);
  733 + i2c->variant = exynos5_i2c_get_variant(pdev);
  734 +
  735 + exynos5_i2c_reset(i2c);
695 736  
696 737 ret = i2c_add_adapter(&i2c->adap);
697 738 if (ret < 0) {
drivers/i2c/busses/i2c-gpio.c
Diff comments   View file @ 7b215de
... ... @@ -147,24 +147,22 @@
147 147 scl_pin = pdata->scl_pin;
148 148 }
149 149  
150   - ret = gpio_request(sda_pin, "sda");
  150 + ret = devm_gpio_request(&pdev->dev, sda_pin, "sda");
151 151 if (ret) {
152 152 if (ret == -EINVAL)
153 153 ret = -EPROBE_DEFER; /* Try again later */
154   - goto err_request_sda;
  154 + return ret;
155 155 }
156   - ret = gpio_request(scl_pin, "scl");
  156 + ret = devm_gpio_request(&pdev->dev, scl_pin, "scl");
157 157 if (ret) {
158 158 if (ret == -EINVAL)
159 159 ret = -EPROBE_DEFER; /* Try again later */
160   - goto err_request_scl;
  160 + return ret;
161 161 }
162 162  
163 163 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
164   - if (!priv) {
165   - ret = -ENOMEM;
166   - goto err_add_bus;
167   - }
  164 + if (!priv)
  165 + return -ENOMEM;
168 166 adap = &priv->adap;
169 167 bit_data = &priv->bit_data;
170 168 pdata = &priv->pdata;
... ... @@ -225,7 +223,7 @@
225 223 adap->nr = pdev->id;
226 224 ret = i2c_bit_add_numbered_bus(adap);
227 225 if (ret)
228   - goto err_add_bus;
  226 + return ret;
229 227  
230 228 platform_set_drvdata(pdev, priv);
231 229  
... ... @@ -235,13 +233,6 @@
235 233 ? ", no clock stretching" : "");
236 234  
237 235 return 0;
238   -
239   -err_add_bus:
240   - gpio_free(scl_pin);
241   -err_request_scl:
242   - gpio_free(sda_pin);
243   -err_request_sda:
244   - return ret;
245 236 }
246 237  
247 238 static int i2c_gpio_remove(struct platform_device *pdev)
... ... @@ -255,8 +246,6 @@
255 246 pdata = &priv->pdata;
256 247  
257 248 i2c_del_adapter(adap);
258   - gpio_free(pdata->scl_pin);
259   - gpio_free(pdata->sda_pin);
260 249  
261 250 return 0;
262 251 }
drivers/i2c/busses/i2c-imx.c
Diff comments   View file @ 7b215de
... ... @@ -183,6 +183,8 @@
183 183 unsigned int disable_delay;
184 184 int stopped;
185 185 unsigned int ifdr; /* IMX_I2C_IFDR */
  186 + unsigned int cur_clk;
  187 + unsigned int bitrate;
186 188 const struct imx_i2c_hwdata *hwdata;
187 189 };
188 190  
... ... @@ -305,6 +307,48 @@
305 307 return 0;
306 308 }
307 309  
  310 +static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx)
  311 +{
  312 + struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
  313 + unsigned int i2c_clk_rate;
  314 + unsigned int div;
  315 + int i;
  316 +
  317 + /* Divider value calculation */
  318 + i2c_clk_rate = clk_get_rate(i2c_imx->clk);
  319 + if (i2c_imx->cur_clk == i2c_clk_rate)
  320 + return;
  321 + else
  322 + i2c_imx->cur_clk = i2c_clk_rate;
  323 +
  324 + div = (i2c_clk_rate + i2c_imx->bitrate - 1) / i2c_imx->bitrate;
  325 + if (div < i2c_clk_div[0].div)
  326 + i = 0;
  327 + else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
  328 + i = i2c_imx->hwdata->ndivs - 1;
  329 + else
  330 + for (i = 0; i2c_clk_div[i].div < div; i++);
  331 +
  332 + /* Store divider value */
  333 + i2c_imx->ifdr = i2c_clk_div[i].val;
  334 +
  335 + /*
  336 + * There dummy delay is calculated.
  337 + * It should be about one I2C clock period long.
  338 + * This delay is used in I2C bus disable function
  339 + * to fix chip hardware bug.
  340 + */
  341 + i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
  342 + + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
  343 +
  344 +#ifdef CONFIG_I2C_DEBUG_BUS
  345 + dev_dbg(&i2c_imx->adapter.dev, "I2C_CLK=%d, REQ DIV=%d\n",
  346 + i2c_clk_rate, div);
  347 + dev_dbg(&i2c_imx->adapter.dev, "IFDR[IC]=0x%x, REAL DIV=%d\n",
  348 + i2c_clk_div[i].val, i2c_clk_div[i].div);
  349 +#endif
  350 +}
  351 +
308 352 static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
309 353 {
310 354 unsigned int temp = 0;
... ... @@ -312,6 +356,8 @@
312 356  
313 357 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
314 358  
  359 + i2c_imx_set_clk(i2c_imx);
  360 +
315 361 result = clk_prepare_enable(i2c_imx->clk);
316 362 if (result)
317 363 return result;
... ... @@ -367,45 +413,6 @@
367 413 clk_disable_unprepare(i2c_imx->clk);
368 414 }
369 415  
370   -static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
371   - unsigned int rate)
372   -{
373   - struct imx_i2c_clk_pair *i2c_clk_div = i2c_imx->hwdata->clk_div;
374   - unsigned int i2c_clk_rate;
375   - unsigned int div;
376   - int i;
377   -
378   - /* Divider value calculation */
379   - i2c_clk_rate = clk_get_rate(i2c_imx->clk);
380   - div = (i2c_clk_rate + rate - 1) / rate;
381   - if (div < i2c_clk_div[0].div)
382   - i = 0;
383   - else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
384   - i = i2c_imx->hwdata->ndivs - 1;
385   - else
386   - for (i = 0; i2c_clk_div[i].div < div; i++);
387   -
388   - /* Store divider value */
389   - i2c_imx->ifdr = i2c_clk_div[i].val;
390   -
391   - /*
392   - * There dummy delay is calculated.
393   - * It should be about one I2C clock period long.
394   - * This delay is used in I2C bus disable function
395   - * to fix chip hardware bug.
396   - */
397   - i2c_imx->disable_delay = (500000U * i2c_clk_div[i].div
398   - + (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
399   -
400   - /* dev_dbg() can't be used, because adapter is not yet registered */
401   -#ifdef CONFIG_I2C_DEBUG_BUS
402   - dev_dbg(&i2c_imx->adapter.dev, "<%s> I2C_CLK=%d, REQ DIV=%d\n",
403   - __func__, i2c_clk_rate, div);
404   - dev_dbg(&i2c_imx->adapter.dev, "<%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
405   - __func__, i2c_clk_div[i].val, i2c_clk_div[i].div);
406   -#endif
407   -}
408   -
409 416 static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
410 417 {
411 418 struct imx_i2c_struct *i2c_imx = dev_id;
412 419  
... ... @@ -458,10 +465,11 @@
458 465 return 0;
459 466 }
460 467  
461   -static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
  468 +static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bool is_lastmsg)
462 469 {
463 470 int i, result;
464 471 unsigned int temp;
  472 + int block_data = msgs->flags & I2C_M_RECV_LEN;
465 473  
466 474 dev_dbg(&i2c_imx->adapter.dev,
467 475 "<%s> write slave address: addr=0x%x\n",
... ... @@ -481,7 +489,12 @@
481 489 /* setup bus to read data */
482 490 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
483 491 temp &= ~I2CR_MTX;
484   - if (msgs->len - 1)
  492 +
  493 + /*
  494 + * Reset the I2CR_TXAK flag initially for SMBus block read since the
  495 + * length is unknown
  496 + */
  497 + if ((msgs->len - 1) || block_data)
485 498 temp &= ~I2CR_TXAK;
486 499 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
487 500 imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); /* dummy read */
488 501  
489 502  
... ... @@ -490,19 +503,49 @@
490 503  
491 504 /* read data */
492 505 for (i = 0; i < msgs->len; i++) {
  506 + u8 len = 0;
493 507 result = i2c_imx_trx_complete(i2c_imx);
494 508 if (result)
495 509 return result;
496   - if (i == (msgs->len - 1)) {
497   - /* It must generate STOP before read I2DR to prevent
498   - controller from generating another clock cycle */
  510 + /*
  511 + * First byte is the length of remaining packet
  512 + * in the SMBus block data read. Add it to
  513 + * msgs->len.
  514 + */
  515 + if ((!i) && block_data) {
  516 + len = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
  517 + if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX))
  518 + return -EPROTO;
499 519 dev_dbg(&i2c_imx->adapter.dev,
500   - "<%s> clear MSTA\n", __func__);
501   - temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
502   - temp &= ~(I2CR_MSTA | I2CR_MTX);
503   - imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
504   - i2c_imx_bus_busy(i2c_imx, 0);
505   - i2c_imx->stopped = 1;
  520 + "<%s> read length: 0x%X\n",
  521 + __func__, len);
  522 + msgs->len += len;
  523 + }
  524 + if (i == (msgs->len - 1)) {
  525 + if (is_lastmsg) {
  526 + /*
  527 + * It must generate STOP before read I2DR to prevent
  528 + * controller from generating another clock cycle
  529 + */
  530 + dev_dbg(&i2c_imx->adapter.dev,
  531 + "<%s> clear MSTA\n", __func__);
  532 + temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
  533 + temp &= ~(I2CR_MSTA | I2CR_MTX);
  534 + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
  535 + i2c_imx_bus_busy(i2c_imx, 0);
  536 + i2c_imx->stopped = 1;
  537 + } else {
  538 + /*
  539 + * For i2c master receiver repeat restart operation like:
  540 + * read -> repeat MSTA -> read/write
  541 + * The controller must set MTX before read the last byte in
  542 + * the first read operation, otherwise the first read cost
  543 + * one extra clock cycle.
  544 + */
  545 + temp = readb(i2c_imx->base + IMX_I2C_I2CR);
  546 + temp |= I2CR_MTX;
  547 + writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
  548 + }
506 549 } else if (i == (msgs->len - 2)) {
507 550 dev_dbg(&i2c_imx->adapter.dev,
508 551 "<%s> set TXAK\n", __func__);
... ... @@ -510,7 +553,10 @@
510 553 temp |= I2CR_TXAK;
511 554 imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
512 555 }
513   - msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
  556 + if ((!i) && block_data)
  557 + msgs->buf[0] = len;
  558 + else
  559 + msgs->buf[i] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
514 560 dev_dbg(&i2c_imx->adapter.dev,
515 561 "<%s> read byte: B%d=0x%X\n",
516 562 __func__, i, msgs->buf[i]);
... ... @@ -523,6 +569,7 @@
523 569 {
524 570 unsigned int i, temp;
525 571 int result;
  572 + bool is_lastmsg = false;
526 573 struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
527 574  
528 575 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
... ... @@ -534,6 +581,9 @@
534 581  
535 582 /* read/write data */
536 583 for (i = 0; i < num; i++) {
  584 + if (i == num - 1)
  585 + is_lastmsg = true;
  586 +
537 587 if (i) {
538 588 dev_dbg(&i2c_imx->adapter.dev,
539 589 "<%s> repeated start\n", __func__);
... ... @@ -564,7 +614,7 @@
564 614 (temp & I2SR_RXAK ? 1 : 0));
565 615 #endif
566 616 if (msgs[i].flags & I2C_M_RD)
567   - result = i2c_imx_read(i2c_imx, &msgs[i]);
  617 + result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg);
568 618 else
569 619 result = i2c_imx_write(i2c_imx, &msgs[i]);
570 620 if (result)
... ... @@ -583,7 +633,8 @@
583 633  
584 634 static u32 i2c_imx_func(struct i2c_adapter *adapter)
585 635 {
586   - return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
  636 + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL
  637 + | I2C_FUNC_SMBUS_READ_BLOCK_DATA;
587 638 }
588 639  
589 640 static struct i2c_algorithm i2c_imx_algo = {
... ... @@ -600,7 +651,6 @@
600 651 struct imxi2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
601 652 void __iomem *base;
602 653 int irq, ret;
603   - u32 bitrate;
604 654  
605 655 dev_dbg(&pdev->dev, "<%s>\n", __func__);
606 656  
607 657  
... ... @@ -617,10 +667,8 @@
617 667  
618 668 i2c_imx = devm_kzalloc(&pdev->dev, sizeof(struct imx_i2c_struct),
619 669 GFP_KERNEL);
620   - if (!i2c_imx) {
621   - dev_err(&pdev->dev, "can't allocate interface\n");
  670 + if (!i2c_imx)
622 671 return -ENOMEM;
623   - }
624 672  
625 673 if (of_id)
626 674 i2c_imx->hwdata = of_id->data;
627 675  
628 676  
... ... @@ -664,12 +712,11 @@
664 712 i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
665 713  
666 714 /* Set up clock divider */
667   - bitrate = IMX_I2C_BIT_RATE;
  715 + i2c_imx->bitrate = IMX_I2C_BIT_RATE;
668 716 ret = of_property_read_u32(pdev->dev.of_node,
669   - "clock-frequency", &bitrate);
  717 + "clock-frequency", &i2c_imx->bitrate);
670 718 if (ret < 0 && pdata && pdata->bitrate)
671   - bitrate = pdata->bitrate;
672   - i2c_imx_set_clk(i2c_imx, bitrate);
  719 + i2c_imx->bitrate = pdata->bitrate;
673 720  
674 721 /* Set up chip registers to defaults */
675 722 imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
drivers/i2c/busses/i2c-mpc.c
Diff comments   View file @ 7b215de
... ... @@ -115,7 +115,7 @@
115 115 for (k = 9; k; k--) {
116 116 writeccr(i2c, 0);
117 117 writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
118   - udelay(delay_val);
  118 + readb(i2c->base + MPC_I2C_DR);
119 119 writeccr(i2c, CCR_MEN);
120 120 udelay(delay_val << 1);
121 121 }
drivers/i2c/busses/i2c-mv64xxx.c
Diff comments   View file @ 7b215de
... ... @@ -681,7 +681,7 @@
681 681 *****************************************************************************
682 682 */
683 683 static const struct of_device_id mv64xxx_i2c_of_match_table[] = {
684   - { .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i},
  684 + { .compatible = "allwinner,sun4i-a10-i2c", .data = &mv64xxx_i2c_regs_sun4i},
685 685 { .compatible = "allwinner,sun6i-a31-i2c", .data = &mv64xxx_i2c_regs_sun4i},
686 686 { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
687 687 { .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
drivers/i2c/busses/i2c-nomadik.c
Diff comments   View file @ 7b215de
... ... @@ -879,19 +879,19 @@
879 879 #ifdef CONFIG_PM_SLEEP
880 880 static int nmk_i2c_suspend_late(struct device *dev)
881 881 {
882   - pinctrl_pm_select_sleep_state(dev);
  882 + int ret;
883 883  
  884 + ret = pm_runtime_force_suspend(dev);
  885 + if (ret)
  886 + return ret;
  887 +
  888 + pinctrl_pm_select_sleep_state(dev);
884 889 return 0;
885 890 }
886 891  
887 892 static int nmk_i2c_resume_early(struct device *dev)
888 893 {
889   - /* First go to the default state */
890   - pinctrl_pm_select_default_state(dev);
891   - /* Then let's idle the pins until the next transfer happens */
892   - pinctrl_pm_select_idle_state(dev);
893   -
894   - return 0;
  894 + return pm_runtime_force_resume(dev);
895 895 }
896 896 #endif
897 897  
drivers/i2c/busses/i2c-nuc900.c
View file @ 7b215de
1   -/*
2   - * linux/drivers/i2c/busses/i2c-nuc900.c
3   - *
4   - * Copyright (c) 2010 Nuvoton technology corporation.
5   - *
6   - * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>.
7   - * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
8   - *
9   - * This program is free software; you can redistribute it and/or modify
10   - * it under the terms of the GNU General Public License as published by
11   - * the Free Software Foundation;version 2 of the License.
12   - *
13   - */
14   -
15   -#include <linux/kernel.h>
16   -#include <linux/module.h>
17   -
18   -#include <linux/i2c.h>
19   -#include <linux/init.h>
20   -#include <linux/time.h>
21   -#include <linux/interrupt.h>
22   -#include <linux/delay.h>
23   -#include <linux/errno.h>
24   -#include <linux/err.h>
25   -#include <linux/platform_device.h>
26   -#include <linux/clk.h>
27   -#include <linux/cpufreq.h>
28   -#include <linux/slab.h>
29   -#include <linux/io.h>
30   -
31   -#include <mach/mfp.h>
32   -#include <linux/platform_data/i2c-nuc900.h>
33   -
34   -/* nuc900 i2c registers offset */
35   -
36   -#define CSR 0x00
37   -#define DIVIDER 0x04
38   -#define CMDR 0x08
39   -#define SWR 0x0C
40   -#define RXR 0x10
41   -#define TXR 0x14
42   -
43   -/* nuc900 i2c CSR register bits */
44   -
45   -#define IRQEN 0x003
46   -#define I2CBUSY 0x400
47   -#define I2CSTART 0x018
48   -#define IRQFLAG 0x004
49   -#define ARBIT_LOST 0x200
50   -#define SLAVE_ACK 0x800
51   -
52   -/* nuc900 i2c CMDR register bits */
53   -
54   -#define I2C_CMD_START 0x10
55   -#define I2C_CMD_STOP 0x08
56   -#define I2C_CMD_READ 0x04
57   -#define I2C_CMD_WRITE 0x02
58   -#define I2C_CMD_NACK 0x01
59   -
60   -/* i2c controller state */
61   -
62   -enum nuc900_i2c_state {
63   - STATE_IDLE,
64   - STATE_START,
65   - STATE_READ,
66   - STATE_WRITE,
67   - STATE_STOP
68   -};
69   -
70   -/* i2c controller private data */
71   -
72   -struct nuc900_i2c {
73   - spinlock_t lock;
74   - wait_queue_head_t wait;
75   -
76   - struct i2c_msg *msg;
77   - unsigned int msg_num;
78   - unsigned int msg_idx;
79   - unsigned int msg_ptr;
80   - unsigned int irq;
81   -
82   - enum nuc900_i2c_state state;
83   -
84   - void __iomem *regs;
85   - struct clk *clk;
86   - struct device *dev;
87   - struct resource *ioarea;
88   - struct i2c_adapter adap;
89   -};
90   -
91   -/* nuc900_i2c_master_complete
92   - *
93   - * complete the message and wake up the caller, using the given return code,
94   - * or zero to mean ok.
95   -*/
96   -
97   -static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret)
98   -{
99   - dev_dbg(i2c->dev, "master_complete %d\n", ret);
100   -
101   - i2c->msg_ptr = 0;
102   - i2c->msg = NULL;
103   - i2c->msg_idx++;
104   - i2c->msg_num = 0;
105   - if (ret)
106   - i2c->msg_idx = ret;
107   -
108   - wake_up(&i2c->wait);
109   -}
110   -
111   -/* irq enable/disable functions */
112   -
113   -static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c)
114   -{
115   - unsigned long tmp;
116   -
117   - tmp = readl(i2c->regs + CSR);
118   - writel(tmp & ~IRQEN, i2c->regs + CSR);
119   -}
120   -
121   -static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c)
122   -{
123   - unsigned long tmp;
124   -
125   - tmp = readl(i2c->regs + CSR);
126   - writel(tmp | IRQEN, i2c->regs + CSR);
127   -}
128   -
129   -
130   -/* nuc900_i2c_message_start
131   - *
132   - * put the start of a message onto the bus
133   -*/
134   -
135   -static void nuc900_i2c_message_start(struct nuc900_i2c *i2c,
136   - struct i2c_msg *msg)
137   -{
138   - unsigned int addr = (msg->addr & 0x7f) << 1;
139   -
140   - if (msg->flags & I2C_M_RD)
141   - addr |= 0x1;
142   - writel(addr & 0xff, i2c->regs + TXR);
143   - writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR);
144   -}
145   -
146   -static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret)
147   -{
148   -
149   - dev_dbg(i2c->dev, "STOP\n");
150   -
151   - /* stop the transfer */
152   - i2c->state = STATE_STOP;
153   - writel(I2C_CMD_STOP, i2c->regs + CMDR);
154   -
155   - nuc900_i2c_master_complete(i2c, ret);
156   - nuc900_i2c_disable_irq(i2c);
157   -}
158   -
159   -/* helper functions to determine the current state in the set of
160   - * messages we are sending
161   -*/
162   -
163   -/* is_lastmsg()
164   - *
165   - * returns TRUE if the current message is the last in the set
166   -*/
167   -
168   -static inline int is_lastmsg(struct nuc900_i2c *i2c)
169   -{
170   - return i2c->msg_idx >= (i2c->msg_num - 1);
171   -}
172   -
173   -/* is_msglast
174   - *
175   - * returns TRUE if we this is the last byte in the current message
176   -*/
177   -
178   -static inline int is_msglast(struct nuc900_i2c *i2c)
179   -{
180   - return i2c->msg_ptr == i2c->msg->len-1;
181   -}
182   -
183   -/* is_msgend
184   - *
185   - * returns TRUE if we reached the end of the current message
186   -*/
187   -
188   -static inline int is_msgend(struct nuc900_i2c *i2c)
189   -{
190   - return i2c->msg_ptr >= i2c->msg->len;
191   -}
192   -
193   -/* i2c_nuc900_irq_nextbyte
194   - *
195   - * process an interrupt and work out what to do
196   - */
197   -
198   -static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c,
199   - unsigned long iicstat)
200   -{
201   - unsigned char byte;
202   -
203   - switch (i2c->state) {
204   -
205   - case STATE_IDLE:
206   - dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__);
207   - break;
208   -
209   - case STATE_STOP:
210   - dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);
211   - nuc900_i2c_disable_irq(i2c);
212   - break;
213   -
214   - case STATE_START:
215   - /* last thing we did was send a start condition on the
216   - * bus, or started a new i2c message
217   - */
218   -
219   - if (iicstat & SLAVE_ACK &&
220   - !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
221   - /* ack was not received... */
222   -
223   - dev_dbg(i2c->dev, "ack was not received\n");
224   - nuc900_i2c_stop(i2c, -ENXIO);
225   - break;
226   - }
227   -
228   - if (i2c->msg->flags & I2C_M_RD)
229   - i2c->state = STATE_READ;
230   - else
231   - i2c->state = STATE_WRITE;
232   -
233   - /* terminate the transfer if there is nothing to do
234   - * as this is used by the i2c probe to find devices.
235   - */
236   -
237   - if (is_lastmsg(i2c) && i2c->msg->len == 0) {
238   - nuc900_i2c_stop(i2c, 0);
239   - break;
240   - }
241   -
242   - if (i2c->state == STATE_READ)
243   - goto prepare_read;
244   -
245   - /* fall through to the write state, as we will need to
246   - * send a byte as well
247   - */
248   -
249   - case STATE_WRITE:
250   - /* we are writing data to the device... check for the
251   - * end of the message, and if so, work out what to do
252   - */
253   -
254   - if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
255   - if (iicstat & SLAVE_ACK) {
256   - dev_dbg(i2c->dev, "WRITE: No Ack\n");
257   -
258   - nuc900_i2c_stop(i2c, -ECONNREFUSED);
259   - break;
260   - }
261   - }
262   -
263   -retry_write:
264   -
265   - if (!is_msgend(i2c)) {
266   - byte = i2c->msg->buf[i2c->msg_ptr++];
267   - writeb(byte, i2c->regs + TXR);
268   - writel(I2C_CMD_WRITE, i2c->regs + CMDR);
269   -
270   - } else if (!is_lastmsg(i2c)) {
271   - /* we need to go to the next i2c message */
272   -
273   - dev_dbg(i2c->dev, "WRITE: Next Message\n");
274   -
275   - i2c->msg_ptr = 0;
276   - i2c->msg_idx++;
277   - i2c->msg++;
278   -
279   - /* check to see if we need to do another message */
280   - if (i2c->msg->flags & I2C_M_NOSTART) {
281   -
282   - if (i2c->msg->flags & I2C_M_RD) {
283   - /* cannot do this, the controller
284   - * forces us to send a new START
285   - * when we change direction
286   - */
287   -
288   - nuc900_i2c_stop(i2c, -EINVAL);
289   - }
290   -
291   - goto retry_write;
292   - } else {
293   - /* send the new start */
294   - nuc900_i2c_message_start(i2c, i2c->msg);
295   - i2c->state = STATE_START;
296   - }
297   -
298   - } else {
299   - /* send stop */
300   -
301   - nuc900_i2c_stop(i2c, 0);
302   - }
303   - break;
304   -
305   - case STATE_READ:
306   - /* we have a byte of data in the data register, do
307   - * something with it, and then work out whether we are
308   - * going to do any more read/write
309   - */
310   -
311   - byte = readb(i2c->regs + RXR);
312   - i2c->msg->buf[i2c->msg_ptr++] = byte;
313   -
314   -prepare_read:
315   - if (is_msglast(i2c)) {
316   - /* last byte of buffer */
317   -
318   - if (is_lastmsg(i2c))
319   - writel(I2C_CMD_READ | I2C_CMD_NACK,
320   - i2c->regs + CMDR);
321   -
322   - } else if (is_msgend(i2c)) {
323   - /* ok, we've read the entire buffer, see if there
324   - * is anything else we need to do
325   - */
326   -
327   - if (is_lastmsg(i2c)) {
328   - /* last message, send stop and complete */
329   - dev_dbg(i2c->dev, "READ: Send Stop\n");
330   -
331   - nuc900_i2c_stop(i2c, 0);
332   - } else {
333   - /* go to the next transfer */
334   - dev_dbg(i2c->dev, "READ: Next Transfer\n");
335   -
336   - i2c->msg_ptr = 0;
337   - i2c->msg_idx++;
338   - i2c->msg++;
339   -
340   - writel(I2C_CMD_READ, i2c->regs + CMDR);
341   - }
342   -
343   - } else {
344   - writel(I2C_CMD_READ, i2c->regs + CMDR);
345   - }
346   -
347   - break;
348   - }
349   -}
350   -
351   -/* nuc900_i2c_irq
352   - *
353   - * top level IRQ servicing routine
354   -*/
355   -
356   -static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id)
357   -{
358   - struct nuc900_i2c *i2c = dev_id;
359   - unsigned long status;
360   -
361   - status = readl(i2c->regs + CSR);
362   - writel(status | IRQFLAG, i2c->regs + CSR);
363   -
364   - if (status & ARBIT_LOST) {
365   - /* deal with arbitration loss */
366   - dev_err(i2c->dev, "deal with arbitration loss\n");
367   - goto out;
368   - }
369   -
370   - if (i2c->state == STATE_IDLE) {
371   - dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");
372   - goto out;
373   - }
374   -
375   - /* pretty much this leaves us with the fact that we've
376   - * transmitted or received whatever byte we last sent
377   - */
378   -
379   - i2c_nuc900_irq_nextbyte(i2c, status);
380   -
381   - out:
382   - return IRQ_HANDLED;
383   -}
384   -
385   -
386   -/* nuc900_i2c_set_master
387   - *
388   - * get the i2c bus for a master transaction
389   -*/
390   -
391   -static int nuc900_i2c_set_master(struct nuc900_i2c *i2c)
392   -{
393   - int timeout = 400;
394   -
395   - while (timeout-- > 0) {
396   - if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) &&
397   - ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) {
398   - return 0;
399   - }
400   -
401   - msleep(1);
402   - }
403   -
404   - return -ETIMEDOUT;
405   -}
406   -
407   -/* nuc900_i2c_doxfer
408   - *
409   - * this starts an i2c transfer
410   -*/
411   -
412   -static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c,
413   - struct i2c_msg *msgs, int num)
414   -{
415   - unsigned long iicstat, timeout;
416   - int spins = 20;
417   - int ret;
418   -
419   - ret = nuc900_i2c_set_master(i2c);
420   - if (ret != 0) {
421   - dev_err(i2c->dev, "cannot get bus (error %d)\n", ret);
422   - ret = -EAGAIN;
423   - goto out;
424   - }
425   -
426   - spin_lock_irq(&i2c->lock);
427   -
428   - i2c->msg = msgs;
429   - i2c->msg_num = num;
430   - i2c->msg_ptr = 0;
431   - i2c->msg_idx = 0;
432   - i2c->state = STATE_START;
433   -
434   - nuc900_i2c_message_start(i2c, msgs);
435   - spin_unlock_irq(&i2c->lock);
436   -
437   - timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
438   -
439   - ret = i2c->msg_idx;
440   -
441   - /* having these next two as dev_err() makes life very
442   - * noisy when doing an i2cdetect
443   - */
444   -
445   - if (timeout == 0)
446   - dev_dbg(i2c->dev, "timeout\n");
447   - else if (ret != num)
448   - dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret);
449   -
450   - /* ensure the stop has been through the bus */
451   -
452   - dev_dbg(i2c->dev, "waiting for bus idle\n");
453   -
454   - /* first, try busy waiting briefly */
455   - do {
456   - iicstat = readl(i2c->regs + CSR);
457   - } while ((iicstat & I2CBUSY) && --spins);
458   -
459   - /* if that timed out sleep */
460   - if (!spins) {
461   - msleep(1);
462   - iicstat = readl(i2c->regs + CSR);
463   - }
464   -
465   - if (iicstat & I2CBUSY)
466   - dev_warn(i2c->dev, "timeout waiting for bus idle\n");
467   -
468   - out:
469   - return ret;
470   -}
471   -
472   -/* nuc900_i2c_xfer
473   - *
474   - * first port of call from the i2c bus code when an message needs
475   - * transferring across the i2c bus.
476   -*/
477   -
478   -static int nuc900_i2c_xfer(struct i2c_adapter *adap,
479   - struct i2c_msg *msgs, int num)
480   -{
481   - struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data;
482   - int retry;
483   - int ret;
484   -
485   - nuc900_i2c_enable_irq(i2c);
486   -
487   - for (retry = 0; retry < adap->retries; retry++) {
488   -
489   - ret = nuc900_i2c_doxfer(i2c, msgs, num);
490   -
491   - if (ret != -EAGAIN)
492   - return ret;
493   -
494   - dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry);
495   -
496   - udelay(100);
497   - }
498   -
499   - return -EREMOTEIO;
500   -}
501   -
502   -/* declare our i2c functionality */
503   -static u32 nuc900_i2c_func(struct i2c_adapter *adap)
504   -{
505   - return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART |
506   - I2C_FUNC_PROTOCOL_MANGLING;
507   -}
508   -
509   -/* i2c bus registration info */
510   -
511   -static const struct i2c_algorithm nuc900_i2c_algorithm = {
512   - .master_xfer = nuc900_i2c_xfer,
513   - .functionality = nuc900_i2c_func,
514   -};
515   -
516   -/* nuc900_i2c_probe
517   - *
518   - * called by the bus driver when a suitable device is found
519   -*/
520   -
521   -static int nuc900_i2c_probe(struct platform_device *pdev)
522   -{
523   - struct nuc900_i2c *i2c;
524   - struct nuc900_platform_i2c *pdata;
525   - struct resource *res;
526   - int ret;
527   -
528   - pdata = dev_get_platdata(&pdev->dev);
529   - if (!pdata) {
530   - dev_err(&pdev->dev, "no platform data\n");
531   - return -EINVAL;
532   - }
533   -
534   - i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL);
535   - if (!i2c) {
536   - dev_err(&pdev->dev, "no memory for state\n");
537   - return -ENOMEM;
538   - }
539   -
540   - strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name));
541   - i2c->adap.owner = THIS_MODULE;
542   - i2c->adap.algo = &nuc900_i2c_algorithm;
543   - i2c->adap.retries = 2;
544   - i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
545   -
546   - spin_lock_init(&i2c->lock);
547   - init_waitqueue_head(&i2c->wait);
548   -
549   - /* find the clock and enable it */
550   -
551   - i2c->dev = &pdev->dev;
552   - i2c->clk = clk_get(&pdev->dev, NULL);
553   - if (IS_ERR(i2c->clk)) {
554   - dev_err(&pdev->dev, "cannot get clock\n");
555   - ret = -ENOENT;
556   - goto err_noclk;
557   - }
558   -
559   - dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk);
560   -
561   - clk_enable(i2c->clk);
562   -
563   - /* map the registers */
564   -
565   - res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
566   - if (res == NULL) {
567   - dev_err(&pdev->dev, "cannot find IO resource\n");
568   - ret = -ENOENT;
569   - goto err_clk;
570   - }
571   -
572   - i2c->ioarea = request_mem_region(res->start, resource_size(res),
573   - pdev->name);
574   -
575   - if (i2c->ioarea == NULL) {
576   - dev_err(&pdev->dev, "cannot request IO\n");
577   - ret = -ENXIO;
578   - goto err_clk;
579   - }
580   -
581   - i2c->regs = ioremap(res->start, resource_size(res));
582   -
583   - if (i2c->regs == NULL) {
584   - dev_err(&pdev->dev, "cannot map IO\n");
585   - ret = -ENXIO;
586   - goto err_ioarea;
587   - }
588   -
589   - dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",
590   - i2c->regs, i2c->ioarea, res);
591   -
592   - /* setup info block for the i2c core */
593   -
594   - i2c->adap.algo_data = i2c;
595   - i2c->adap.dev.parent = &pdev->dev;
596   -
597   - mfp_set_groupg(&pdev->dev, NULL);
598   -
599   - clk_get_rate(i2c->clk);
600   -
601   - ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1;
602   - writel(ret & 0xffff, i2c->regs + DIVIDER);
603   -
604   - /* find the IRQ for this unit (note, this relies on the init call to
605   - * ensure no current IRQs pending
606   - */
607   -
608   - i2c->irq = ret = platform_get_irq(pdev, 0);
609   - if (ret <= 0) {
610   - dev_err(&pdev->dev, "cannot find IRQ\n");
611   - goto err_iomap;
612   - }
613   -
614   - ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED,
615   - dev_name(&pdev->dev), i2c);
616   -
617   - if (ret != 0) {
618   - dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);
619   - goto err_iomap;
620   - }
621   -
622   - /* Note, previous versions of the driver used i2c_add_adapter()
623   - * to add the bus at any number. We now pass the bus number via
624   - * the platform data, so if unset it will now default to always
625   - * being bus 0.
626   - */
627   -
628   - i2c->adap.nr = pdata->bus_num;
629   -
630   - ret = i2c_add_numbered_adapter(&i2c->adap);
631   - if (ret < 0) {
632   - dev_err(&pdev->dev, "failed to add bus to i2c core\n");
633   - goto err_irq;
634   - }
635   -
636   - platform_set_drvdata(pdev, i2c);
637   -
638   - dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n",
639   - dev_name(&i2c->adap.dev));
640   - return 0;
641   -
642   - err_irq:
643   - free_irq(i2c->irq, i2c);
644   -
645   - err_iomap:
646   - iounmap(i2c->regs);
647   -
648   - err_ioarea:
649   - release_resource(i2c->ioarea);
650   - kfree(i2c->ioarea);
651   -
652   - err_clk:
653   - clk_disable(i2c->clk);
654   - clk_put(i2c->clk);
655   -
656   - err_noclk:
657   - kfree(i2c);
658   - return ret;
659   -}
660   -
661   -/* nuc900_i2c_remove
662   - *
663   - * called when device is removed from the bus
664   -*/
665   -
666   -static int nuc900_i2c_remove(struct platform_device *pdev)
667   -{
668   - struct nuc900_i2c *i2c = platform_get_drvdata(pdev);
669   -
670   - i2c_del_adapter(&i2c->adap);
671   - free_irq(i2c->irq, i2c);
672   -
673   - clk_disable(i2c->clk);
674   - clk_put(i2c->clk);
675   -
676   - iounmap(i2c->regs);
677   -
678   - release_resource(i2c->ioarea);
679   - kfree(i2c->ioarea);
680   - kfree(i2c);
681   -
682   - return 0;
683   -}
684   -
685   -static struct platform_driver nuc900_i2c_driver = {
686   - .probe = nuc900_i2c_probe,
687   - .remove = nuc900_i2c_remove,
688   - .driver = {
689   - .owner = THIS_MODULE,
690   - .name = "nuc900-i2c0",
691   - },
692   -};
693   -
694   -static int __init i2c_adap_nuc900_init(void)
695   -{
696   - return platform_driver_register(&nuc900_i2c_driver);
697   -}
698   -
699   -static void __exit i2c_adap_nuc900_exit(void)
700   -{
701   - platform_driver_unregister(&nuc900_i2c_driver);
702   -}
703   -subsys_initcall(i2c_adap_nuc900_init);
704   -module_exit(i2c_adap_nuc900_exit);
705   -
706   -MODULE_DESCRIPTION("NUC900 I2C Bus driver");
707   -MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>");
708   -MODULE_LICENSE("GPL");
709   -MODULE_ALIAS("platform:nuc900-i2c0");
drivers/i2c/busses/i2c-ocores.c
Diff comments   View file @ 7b215de
... ... @@ -250,7 +250,7 @@
250 250 .algo = &ocores_algorithm,
251 251 };
252 252  
253   -static struct of_device_id ocores_i2c_match[] = {
  253 +static const struct of_device_id ocores_i2c_match[] = {
254 254 {
255 255 .compatible = "opencores,i2c-ocores",
256 256 .data = (void *)TYPE_OCORES,
drivers/i2c/busses/i2c-omap.c
Diff comments   View file @ 7b215de
... ... @@ -1114,10 +1114,8 @@
1114 1114 }
1115 1115  
1116 1116 dev = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL);
1117   - if (!dev) {
1118   - dev_err(&pdev->dev, "Menory allocation failed\n");
  1117 + if (!dev)
1119 1118 return -ENOMEM;
1120   - }
1121 1119  
1122 1120 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1123 1121 dev->base = devm_ioremap_resource(&pdev->dev, mem);
drivers/i2c/busses/i2c-pxa.c
Diff comments   View file @ 7b215de
... ... @@ -1084,7 +1084,7 @@
1084 1084 .functionality = i2c_pxa_functionality,
1085 1085 };
1086 1086  
1087   -static struct of_device_id i2c_pxa_dt_ids[] = {
  1087 +static const struct of_device_id i2c_pxa_dt_ids[] = {
1088 1088 { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
1089 1089 { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX },
1090 1090 { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX },
drivers/i2c/busses/i2c-rcar.c
Diff comments   View file @ 7b215de
1 1 /*
2   - * drivers/i2c/busses/i2c-rcar.c
  2 + * Driver for the Renesas RCar I2C unit
3 3 *
4   - * Copyright (C) 2012 Renesas Solutions Corp.
  4 + * Copyright (C) 2014 Wolfram Sang <wsa@sang-engineering.com>
  5 + *
  6 + * Copyright (C) 2012-14 Renesas Solutions Corp.
5 7 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 8 *
7 9 * This file is based on the drivers/i2c/busses/i2c-sh7760.c
8 10  
... ... @@ -12,16 +14,12 @@
12 14 *
13 15 * This program is free software; you can redistribute it and/or modify
14 16 * it under the terms of the GNU General Public License as published by
15   - * the Free Software Foundation; either version 2 of the License
  17 + * the Free Software Foundation; version 2 of the License.
16 18 *
17 19 * This program is distributed in the hope that it will be useful,
18 20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 22 * GNU General Public License for more details.
21   - *
22   - * You should have received a copy of the GNU General Public License
23   - * along with this program; if not, write to the Free Software
24   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 23 */
26 24 #include <linux/clk.h>
27 25 #include <linux/delay.h>
... ... @@ -36,7 +34,6 @@
36 34 #include <linux/platform_device.h>
37 35 #include <linux/pm_runtime.h>
38 36 #include <linux/slab.h>
39   -#include <linux/spinlock.h>
40 37  
41 38 /* register offsets */
42 39 #define ICSCR 0x00 /* slave ctrl */
... ... @@ -60,7 +57,7 @@
60 57 #define FSB (1 << 1) /* force stop bit */
61 58 #define ESG (1 << 0) /* en startbit gen */
62 59  
63   -/* ICMSR */
  60 +/* ICMSR (also for ICMIE) */
64 61 #define MNR (1 << 6) /* nack received */
65 62 #define MAL (1 << 5) /* arbitration lost */
66 63 #define MST (1 << 4) /* sent a stop */
67 64  
68 65  
69 66  
70 67  
... ... @@ -69,32 +66,18 @@
69 66 #define MDR (1 << 1)
70 67 #define MAT (1 << 0) /* slave addr xfer done */
71 68  
72   -/* ICMIE */
73   -#define MNRE (1 << 6) /* nack irq en */
74   -#define MALE (1 << 5) /* arblos irq en */
75   -#define MSTE (1 << 4) /* stop irq en */
76   -#define MDEE (1 << 3)
77   -#define MDTE (1 << 2)
78   -#define MDRE (1 << 1)
79   -#define MATE (1 << 0) /* address sent irq en */
80 69  
  70 +#define RCAR_BUS_PHASE_START (MDBS | MIE | ESG)
  71 +#define RCAR_BUS_PHASE_DATA (MDBS | MIE)
  72 +#define RCAR_BUS_PHASE_STOP (MDBS | MIE | FSB)
81 73  
82   -enum {
83   - RCAR_BUS_PHASE_ADDR,
84   - RCAR_BUS_PHASE_DATA,
85   - RCAR_BUS_PHASE_STOP,
86   -};
  74 +#define RCAR_IRQ_SEND (MNR | MAL | MST | MAT | MDE)
  75 +#define RCAR_IRQ_RECV (MNR | MAL | MST | MAT | MDR)
  76 +#define RCAR_IRQ_STOP (MST)
87 77  
88   -enum {
89   - RCAR_IRQ_CLOSE,
90   - RCAR_IRQ_OPEN_FOR_SEND,
91   - RCAR_IRQ_OPEN_FOR_RECV,
92   - RCAR_IRQ_OPEN_FOR_STOP,
93   -};
  78 +#define RCAR_IRQ_ACK_SEND (~(MAT | MDE))
  79 +#define RCAR_IRQ_ACK_RECV (~(MAT | MDR))
94 80  
95   -/*
96   - * flags
97   - */
98 81 #define ID_LAST_MSG (1 << 0)
99 82 #define ID_IOERROR (1 << 1)
100 83 #define ID_DONE (1 << 2)
101 84  
102 85  
... ... @@ -112,14 +95,12 @@
112 95 struct i2c_msg *msg;
113 96 struct clk *clk;
114 97  
115   - spinlock_t lock;
116 98 wait_queue_head_t wait;
117 99  
118 100 int pos;
119   - int irq;
120 101 u32 icccr;
121 102 u32 flags;
122   - enum rcar_i2c_type devtype;
  103 + enum rcar_i2c_type devtype;
123 104 };
124 105  
125 106 #define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent)
... ... @@ -130,9 +111,7 @@
130 111  
131 112 #define LOOP_TIMEOUT 1024
132 113  
133   -/*
134   - * basic functions
135   - */
  114 +
136 115 static void rcar_i2c_write(struct rcar_i2c_priv *priv, int reg, u32 val)
137 116 {
138 117 writel(val, priv->io + reg);
... ... @@ -161,36 +140,6 @@
161 140 rcar_i2c_write(priv, ICMAR, 0);
162 141 }
163 142  
164   -static void rcar_i2c_irq_mask(struct rcar_i2c_priv *priv, int open)
165   -{
166   - u32 val = MNRE | MALE | MSTE | MATE; /* default */
167   -
168   - switch (open) {
169   - case RCAR_IRQ_OPEN_FOR_SEND:
170   - val |= MDEE; /* default + send */
171   - break;
172   - case RCAR_IRQ_OPEN_FOR_RECV:
173   - val |= MDRE; /* default + read */
174   - break;
175   - case RCAR_IRQ_OPEN_FOR_STOP:
176   - val = MSTE; /* stop irq only */
177   - break;
178   - case RCAR_IRQ_CLOSE:
179   - default:
180   - val = 0; /* all close */
181   - break;
182   - }
183   - rcar_i2c_write(priv, ICMIER, val);
184   -}
185   -
186   -static void rcar_i2c_set_addr(struct rcar_i2c_priv *priv, u32 recv)
187   -{
188   - rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | recv);
189   -}
190   -
191   -/*
192   - * bus control functions
193   - */
194 143 static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
195 144 {
196 145 int i;
... ... @@ -205,24 +154,6 @@
205 154 return -EBUSY;
206 155 }
207 156  
208   -static void rcar_i2c_bus_phase(struct rcar_i2c_priv *priv, int phase)
209   -{
210   - switch (phase) {
211   - case RCAR_BUS_PHASE_ADDR:
212   - rcar_i2c_write(priv, ICMCR, MDBS | MIE | ESG);
213   - break;
214   - case RCAR_BUS_PHASE_DATA:
215   - rcar_i2c_write(priv, ICMCR, MDBS | MIE);
216   - break;
217   - case RCAR_BUS_PHASE_STOP:
218   - rcar_i2c_write(priv, ICMCR, MDBS | MIE | FSB);
219   - break;
220   - }
221   -}
222   -
223   -/*
224   - * clock function
225   - */
226 157 static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
227 158 u32 bus_speed,
228 159 struct device *dev)
229 160  
230 161  
231 162  
232 163  
... ... @@ -312,60 +243,18 @@
312 243 return 0;
313 244 }
314 245  
315   -static void rcar_i2c_clock_start(struct rcar_i2c_priv *priv)
  246 +static int rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
316 247 {
317   - rcar_i2c_write(priv, ICCCR, priv->icccr);
318   -}
  248 + int read = !!rcar_i2c_is_recv(priv);
319 249  
320   -/*
321   - * status functions
322   - */
323   -static u32 rcar_i2c_status_get(struct rcar_i2c_priv *priv)
324   -{
325   - return rcar_i2c_read(priv, ICMSR);
326   -}
  250 + rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) | read);
  251 + rcar_i2c_write(priv, ICMSR, 0);
  252 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
  253 + rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
327 254  
328   -#define rcar_i2c_status_clear(priv) rcar_i2c_status_bit_clear(priv, 0xffffffff)
329   -static void rcar_i2c_status_bit_clear(struct rcar_i2c_priv *priv, u32 bit)
330   -{
331   - rcar_i2c_write(priv, ICMSR, ~bit);
332   -}
333   -
334   -/*
335   - * recv/send functions
336   - */
337   -static int rcar_i2c_recv(struct rcar_i2c_priv *priv)
338   -{
339   - rcar_i2c_set_addr(priv, 1);
340   - rcar_i2c_status_clear(priv);
341   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
342   - rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_RECV);
343   -
344 255 return 0;
345 256 }
346 257  
347   -static int rcar_i2c_send(struct rcar_i2c_priv *priv)
348   -{
349   - int ret;
350   -
351   - /*
352   - * It should check bus status when send case
353   - */
354   - ret = rcar_i2c_bus_barrier(priv);
355   - if (ret < 0)
356   - return ret;
357   -
358   - rcar_i2c_set_addr(priv, 0);
359   - rcar_i2c_status_clear(priv);
360   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_ADDR);
361   - rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_SEND);
362   -
363   - return 0;
364   -}
365   -
366   -#define rcar_i2c_send_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDE))
367   -#define rcar_i2c_recv_restart(priv) rcar_i2c_status_bit_clear(priv, (MAT | MDR))
368   -
369 258 /*
370 259 * interrupt functions
371 260 */
... ... @@ -386,7 +275,7 @@
386 275 * goto data phase.
387 276 */
388 277 if (msr & MAT)
389   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA);
  278 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
390 279  
391 280 if (priv->pos < msg->len) {
392 281 /*
... ... @@ -414,7 +303,7 @@
414 303 * prepare stop condition here.
415 304 * ID_DONE will be set on STOP irq.
416 305 */
417   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
  306 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
418 307 else
419 308 /*
420 309 * If current msg is _NOT_ last msg,
... ... @@ -425,7 +314,7 @@
425 314 return ID_DONE;
426 315 }
427 316  
428   - rcar_i2c_send_restart(priv);
  317 + rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
429 318  
430 319 return 0;
431 320 }
432 321  
433 322  
... ... @@ -462,11 +351,11 @@
462 351 * otherwise, go to DATA phase.
463 352 */
464 353 if (priv->pos + 1 >= msg->len)
465   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
  354 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
466 355 else
467   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_DATA);
  356 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);
468 357  
469   - rcar_i2c_recv_restart(priv);
  358 + rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);
470 359  
471 360 return 0;
472 361 }
473 362  
474 363  
475 364  
476 365  
477 366  
478 367  
479 368  
480 369  
481 370  
... ... @@ -474,53 +363,31 @@
474 363 static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
475 364 {
476 365 struct rcar_i2c_priv *priv = ptr;
477   - struct device *dev = rcar_i2c_priv_to_dev(priv);
478 366 u32 msr;
479 367  
480   - /*-------------- spin lock -----------------*/
481   - spin_lock(&priv->lock);
  368 + msr = rcar_i2c_read(priv, ICMSR);
482 369  
483   - msr = rcar_i2c_status_get(priv);
484   -
485   - /*
486   - * Arbitration lost
487   - */
  370 + /* Arbitration lost */
488 371 if (msr & MAL) {
489   - /*
490   - * CAUTION
491   - *
492   - * When arbitration lost, device become _slave_ mode.
493   - */
494   - dev_dbg(dev, "Arbitration Lost\n");
495 372 rcar_i2c_flags_set(priv, (ID_DONE | ID_ARBLOST));
496 373 goto out;
497 374 }
498 375  
499   - /*
500   - * Stop
501   - */
  376 + /* Stop */
502 377 if (msr & MST) {
503   - dev_dbg(dev, "Stop\n");
504 378 rcar_i2c_flags_set(priv, ID_DONE);
505 379 goto out;
506 380 }
507 381  
508   - /*
509   - * Nack
510   - */
  382 + /* Nack */
511 383 if (msr & MNR) {
512   - dev_dbg(dev, "Nack\n");
513   -
514 384 /* go to stop phase */
515   - rcar_i2c_bus_phase(priv, RCAR_BUS_PHASE_STOP);
516   - rcar_i2c_irq_mask(priv, RCAR_IRQ_OPEN_FOR_STOP);
  385 + rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
  386 + rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
517 387 rcar_i2c_flags_set(priv, ID_NACK);
518 388 goto out;
519 389 }
520 390  
521   - /*
522   - * recv/send
523   - */
524 391 if (rcar_i2c_is_recv(priv))
525 392 rcar_i2c_flags_set(priv, rcar_i2c_irq_recv(priv, msr));
526 393 else
527 394  
... ... @@ -528,14 +395,11 @@
528 395  
529 396 out:
530 397 if (rcar_i2c_flags_has(priv, ID_DONE)) {
531   - rcar_i2c_irq_mask(priv, RCAR_IRQ_CLOSE);
532   - rcar_i2c_status_clear(priv);
  398 + rcar_i2c_write(priv, ICMIER, 0);
  399 + rcar_i2c_write(priv, ICMSR, 0);
533 400 wake_up(&priv->wait);
534 401 }
535 402  
536   - spin_unlock(&priv->lock);
537   - /*-------------- spin unlock -----------------*/
538   -
539 403 return IRQ_HANDLED;
540 404 }
541 405  
542 406  
543 407  
544 408  
545 409  
... ... @@ -545,21 +409,18 @@
545 409 {
546 410 struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
547 411 struct device *dev = rcar_i2c_priv_to_dev(priv);
548   - unsigned long flags;
549 412 int i, ret, timeout;
550 413  
551 414 pm_runtime_get_sync(dev);
552 415  
553   - /*-------------- spin lock -----------------*/
554   - spin_lock_irqsave(&priv->lock, flags);
555   -
556 416 rcar_i2c_init(priv);
557   - rcar_i2c_clock_start(priv);
  417 + /* start clock */
  418 + rcar_i2c_write(priv, ICCCR, priv->icccr);
558 419  
559   - spin_unlock_irqrestore(&priv->lock, flags);
560   - /*-------------- spin unlock -----------------*/
  420 + ret = rcar_i2c_bus_barrier(priv);
  421 + if (ret < 0)
  422 + goto out;
561 423  
562   - ret = -EINVAL;
563 424 for (i = 0; i < num; i++) {
564 425 /* This HW can't send STOP after address phase */
565 426 if (msgs[i].len == 0) {
... ... @@ -567,9 +428,6 @@
567 428 break;
568 429 }
569 430  
570   - /*-------------- spin lock -----------------*/
571   - spin_lock_irqsave(&priv->lock, flags);
572   -
573 431 /* init each data */
574 432 priv->msg = &msgs[i];
575 433 priv->pos = 0;
576 434  
577 435  
... ... @@ -577,21 +435,11 @@
577 435 if (priv->msg == &msgs[num - 1])
578 436 rcar_i2c_flags_set(priv, ID_LAST_MSG);
579 437  
580   - /* start send/recv */
581   - if (rcar_i2c_is_recv(priv))
582   - ret = rcar_i2c_recv(priv);
583   - else
584   - ret = rcar_i2c_send(priv);
  438 + ret = rcar_i2c_prepare_msg(priv);
585 439  
586   - spin_unlock_irqrestore(&priv->lock, flags);
587   - /*-------------- spin unlock -----------------*/
588   -
589 440 if (ret < 0)
590 441 break;
591 442  
592   - /*
593   - * wait result
594   - */
595 443 timeout = wait_event_timeout(priv->wait,
596 444 rcar_i2c_flags_has(priv, ID_DONE),
597 445 5 * HZ);
... ... @@ -600,9 +448,6 @@
600 448 break;
601 449 }
602 450  
603   - /*
604   - * error handling
605   - */
606 451 if (rcar_i2c_flags_has(priv, ID_NACK)) {
607 452 ret = -ENXIO;
608 453 break;
... ... @@ -620,7 +465,7 @@
620 465  
621 466 ret = i + 1; /* The number of transfer */
622 467 }
623   -
  468 +out:
624 469 pm_runtime_put(dev);
625 470  
626 471 if (ret < 0 && ret != -ENXIO)
... ... @@ -646,6 +491,9 @@
646 491 { .compatible = "renesas,i2c-r8a7779", .data = (void *)I2C_RCAR_GEN1 },
647 492 { .compatible = "renesas,i2c-r8a7790", .data = (void *)I2C_RCAR_GEN2 },
648 493 { .compatible = "renesas,i2c-r8a7791", .data = (void *)I2C_RCAR_GEN2 },
  494 + { .compatible = "renesas,i2c-r8a7792", .data = (void *)I2C_RCAR_GEN2 },
  495 + { .compatible = "renesas,i2c-r8a7793", .data = (void *)I2C_RCAR_GEN2 },
  496 + { .compatible = "renesas,i2c-r8a7794", .data = (void *)I2C_RCAR_GEN2 },
649 497 {},
650 498 };
651 499 MODULE_DEVICE_TABLE(of, rcar_i2c_dt_ids);
652 500  
653 501  
... ... @@ -658,13 +506,11 @@
658 506 struct resource *res;
659 507 struct device *dev = &pdev->dev;
660 508 u32 bus_speed;
661   - int ret;
  509 + int irq, ret;
662 510  
663 511 priv = devm_kzalloc(dev, sizeof(struct rcar_i2c_priv), GFP_KERNEL);
664   - if (!priv) {
665   - dev_err(dev, "no mem for private data\n");
  512 + if (!priv)
666 513 return -ENOMEM;
667   - }
668 514  
669 515 priv->clk = devm_clk_get(dev, NULL);
670 516 if (IS_ERR(priv->clk)) {
671 517  
... ... @@ -692,9 +538,8 @@
692 538 if (IS_ERR(priv->io))
693 539 return PTR_ERR(priv->io);
694 540  
695   - priv->irq = platform_get_irq(pdev, 0);
  541 + irq = platform_get_irq(pdev, 0);
696 542 init_waitqueue_head(&priv->wait);
697   - spin_lock_init(&priv->lock);
698 543  
699 544 adap = &priv->adap;
700 545 adap->nr = pdev->id;
701 546  
... ... @@ -706,10 +551,10 @@
706 551 i2c_set_adapdata(adap, priv);
707 552 strlcpy(adap->name, pdev->name, sizeof(adap->name));
708 553  
709   - ret = devm_request_irq(dev, priv->irq, rcar_i2c_irq, 0,
  554 + ret = devm_request_irq(dev, irq, rcar_i2c_irq, 0,
710 555 dev_name(dev), priv);
711 556 if (ret < 0) {
712   - dev_err(dev, "cannot get irq %d\n", priv->irq);
  557 + dev_err(dev, "cannot get irq %d\n", irq);
713 558 return ret;
714 559 }
715 560  
... ... @@ -759,7 +604,7 @@
759 604  
760 605 module_platform_driver(rcar_i2c_driver);
761 606  
762   -MODULE_LICENSE("GPL");
  607 +MODULE_LICENSE("GPL v2");
763 608 MODULE_DESCRIPTION("Renesas R-Car I2C bus driver");
764 609 MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
drivers/i2c/busses/i2c-riic.c
Diff comments   View file @ 7b215de
... ... @@ -404,7 +404,7 @@
404 404 return 0;
405 405 }
406 406  
407   -static struct of_device_id riic_i2c_dt_ids[] = {
  407 +static const struct of_device_id riic_i2c_dt_ids[] = {
408 408 { .compatible = "renesas,riic-rz" },
409 409 { /* Sentinel */ },
410 410 };
drivers/i2c/busses/i2c-s3c2410.c
Diff comments   View file @ 7b215de
... ... @@ -1114,16 +1114,12 @@
1114 1114 }
1115 1115  
1116 1116 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL);
1117   - if (!i2c) {
1118   - dev_err(&pdev->dev, "no memory for state\n");
  1117 + if (!i2c)
1119 1118 return -ENOMEM;
1120   - }
1121 1119  
1122 1120 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1123   - if (!i2c->pdata) {
1124   - dev_err(&pdev->dev, "no memory for platform data\n");
  1121 + if (!i2c->pdata)
1125 1122 return -ENOMEM;
1126   - }
1127 1123  
1128 1124 i2c->quirks = s3c24xx_get_device_quirks(pdev);
1129 1125 if (pdata)
drivers/i2c/busses/i2c-sh_mobile.c
Diff comments   View file @ 7b215de
... ... @@ -32,6 +32,7 @@
32 32 #include <linux/clk.h>
33 33 #include <linux/io.h>
34 34 #include <linux/slab.h>
  35 +#include <linux/of_device.h>
35 36 #include <linux/i2c/i2c-sh_mobile.h>
36 37  
37 38 /* Transmit operation: */
... ... @@ -139,6 +140,10 @@
139 140 bool send_stop;
140 141 };
141 142  
  143 +struct sh_mobile_dt_config {
  144 + int clks_per_count;
  145 +};
  146 +
142 147 #define IIC_FLAG_HAS_ICIC67 (1 << 0)
143 148  
144 149 #define STANDARD_MODE 100000
... ... @@ -194,7 +199,7 @@
194 199 iic_wr(pd, offs, (iic_rd(pd, offs) | set) & ~clr);
195 200 }
196 201  
197   -static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf, int offset)
  202 +static u32 sh_mobile_i2c_iccl(unsigned long count_khz, u32 tLOW, u32 tf)
198 203 {
199 204 /*
200 205 * Conditional expression:
201 206  
... ... @@ -206,10 +211,10 @@
206 211 * account the fall time of SCL signal (tf). Default tf value
207 212 * should be 0.3 us, for safety.
208 213 */
209   - return (((count_khz * (tLOW + tf)) + 5000) / 10000) + offset;
  214 + return (((count_khz * (tLOW + tf)) + 5000) / 10000);
210 215 }
211 216  
212   -static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf, int offset)
  217 +static u32 sh_mobile_i2c_icch(unsigned long count_khz, u32 tHIGH, u32 tf)
213 218 {
214 219 /*
215 220 * Conditional expression:
216 221  
217 222  
218 223  
219 224  
220 225  
221 226  
222 227  
223 228  
224 229  
225 230  
226 231  
... ... @@ -225,52 +230,58 @@
225 230 * to take into account the fall time of SDA signal (tf) at START
226 231 * condition, in order to meet both tHIGH and tHD;STA specs.
227 232 */
228   - return (((count_khz * (tHIGH + tf)) + 5000) / 10000) + offset;
  233 + return (((count_khz * (tHIGH + tf)) + 5000) / 10000);
229 234 }
230 235  
231   -static void sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
  236 +static int sh_mobile_i2c_init(struct sh_mobile_i2c_data *pd)
232 237 {
233 238 unsigned long i2c_clk_khz;
234 239 u32 tHIGH, tLOW, tf;
235   - int offset;
  240 + uint16_t max_val;
236 241  
237 242 /* Get clock rate after clock is enabled */
238 243 clk_prepare_enable(pd->clk);
239 244 i2c_clk_khz = clk_get_rate(pd->clk) / 1000;
  245 + clk_disable_unprepare(pd->clk);
240 246 i2c_clk_khz /= pd->clks_per_count;
241 247  
242 248 if (pd->bus_speed == STANDARD_MODE) {
243 249 tLOW = 47; /* tLOW = 4.7 us */
244 250 tHIGH = 40; /* tHD;STA = tHIGH = 4.0 us */
245 251 tf = 3; /* tf = 0.3 us */
246   - offset = 0; /* No offset */
247 252 } else if (pd->bus_speed == FAST_MODE) {
248 253 tLOW = 13; /* tLOW = 1.3 us */
249 254 tHIGH = 6; /* tHD;STA = tHIGH = 0.6 us */
250 255 tf = 3; /* tf = 0.3 us */
251   - offset = 0; /* No offset */
252 256 } else {
253 257 dev_err(pd->dev, "unrecognized bus speed %lu Hz\n",
254 258 pd->bus_speed);
255   - goto out;
  259 + return -EINVAL;
256 260 }
257 261  
258   - pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf, offset);
  262 + pd->iccl = sh_mobile_i2c_iccl(i2c_clk_khz, tLOW, tf);
  263 + pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf);
  264 +
  265 + max_val = pd->flags & IIC_FLAG_HAS_ICIC67 ? 0x1ff : 0xff;
  266 + if (pd->iccl > max_val || pd->icch > max_val) {
  267 + dev_err(pd->dev, "timing values out of range: L/H=0x%x/0x%x\n",
  268 + pd->iccl, pd->icch);
  269 + return -EINVAL;
  270 + }
  271 +
259 272 /* one more bit of ICCL in ICIC */
260   - if ((pd->iccl > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
  273 + if (pd->iccl & 0x100)
261 274 pd->icic |= ICIC_ICCLB8;
262 275 else
263 276 pd->icic &= ~ICIC_ICCLB8;
264 277  
265   - pd->icch = sh_mobile_i2c_icch(i2c_clk_khz, tHIGH, tf, offset);
266 278 /* one more bit of ICCH in ICIC */
267   - if ((pd->icch > 0xff) && (pd->flags & IIC_FLAG_HAS_ICIC67))
  279 + if (pd->icch & 0x100)
268 280 pd->icic |= ICIC_ICCHB8;
269 281 else
270 282 pd->icic &= ~ICIC_ICCHB8;
271 283  
272   -out:
273   - clk_disable_unprepare(pd->clk);
  284 + return 0;
274 285 }
275 286  
276 287 static void activate_ch(struct sh_mobile_i2c_data *pd)
... ... @@ -316,7 +327,7 @@
316 327  
317 328 switch (op) {
318 329 case OP_START: /* issue start and trigger DTE interrupt */
319   - iic_wr(pd, ICCR, 0x94);
  330 + iic_wr(pd, ICCR, ICCR_ICE | ICCR_TRS | ICCR_BBSY);
320 331 break;
321 332 case OP_TX_FIRST: /* disable DTE interrupt and write data */
322 333 iic_wr(pd, ICIC, ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
323 334  
... ... @@ -327,10 +338,11 @@
327 338 break;
328 339 case OP_TX_STOP: /* write data and issue a stop afterwards */
329 340 iic_wr(pd, ICDR, data);
330   - iic_wr(pd, ICCR, pd->send_stop ? 0x90 : 0x94);
  341 + iic_wr(pd, ICCR, pd->send_stop ? ICCR_ICE | ICCR_TRS
  342 + : ICCR_ICE | ICCR_TRS | ICCR_BBSY);
331 343 break;
332 344 case OP_TX_TO_RX: /* select read mode */
333   - iic_wr(pd, ICCR, 0x81);
  345 + iic_wr(pd, ICCR, ICCR_ICE | ICCR_SCP);
334 346 break;
335 347 case OP_RX: /* just read data */
336 348 ret = iic_rd(pd, ICDR);
337 349  
... ... @@ -338,13 +350,13 @@
338 350 case OP_RX_STOP: /* enable DTE interrupt, issue stop */
339 351 iic_wr(pd, ICIC,
340 352 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
341   - iic_wr(pd, ICCR, 0xc0);
  353 + iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
342 354 break;
343 355 case OP_RX_STOP_DATA: /* enable DTE interrupt, read data, issue stop */
344 356 iic_wr(pd, ICIC,
345 357 ICIC_DTEE | ICIC_WAITE | ICIC_ALE | ICIC_TACKE);
346 358 ret = iic_rd(pd, ICDR);
347   - iic_wr(pd, ICCR, 0xc0);
  359 + iic_wr(pd, ICCR, ICCR_ICE | ICCR_RACK);
348 360 break;
349 361 }
350 362  
... ... @@ -479,7 +491,7 @@
479 491 {
480 492 if (usr_msg->len == 0 && (usr_msg->flags & I2C_M_RD)) {
481 493 dev_err(pd->dev, "Unsupported zero length i2c read\n");
482   - return -EIO;
  494 + return -EOPNOTSUPP;
483 495 }
484 496  
485 497 if (do_init) {
486 498  
... ... @@ -514,17 +526,12 @@
514 526 break;
515 527  
516 528 if (val & ICSR_TACK)
517   - return -EIO;
  529 + return -ENXIO;
518 530  
519 531 udelay(10);
520 532 }
521 533  
522   - if (!i) {
523   - dev_warn(pd->dev, "Timeout polling for DTE!\n");
524   - return -ETIMEDOUT;
525   - }
526   -
527   - return 0;
  534 + return i ? 0 : -ETIMEDOUT;
528 535 }
529 536  
530 537 static int poll_busy(struct sh_mobile_i2c_data *pd)
531 538  
... ... @@ -542,20 +549,18 @@
542 549 */
543 550 if (!(val & ICSR_BUSY)) {
544 551 /* handle missing acknowledge and arbitration lost */
545   - if ((val | pd->sr) & (ICSR_TACK | ICSR_AL))
546   - return -EIO;
  552 + val |= pd->sr;
  553 + if (val & ICSR_TACK)
  554 + return -ENXIO;
  555 + if (val & ICSR_AL)
  556 + return -EAGAIN;
547 557 break;
548 558 }
549 559  
550 560 udelay(10);
551 561 }
552 562  
553   - if (!i) {
554   - dev_err(pd->dev, "Polling timed out\n");
555   - return -ETIMEDOUT;
556   - }
557   -
558   - return 0;
  563 + return i ? 0 : -ETIMEDOUT;
559 564 }
560 565  
561 566 static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
562 567  
563 568  
564 569  
... ... @@ -617,42 +622,44 @@
617 622 .master_xfer = sh_mobile_i2c_xfer,
618 623 };
619 624  
620   -static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
  625 +static const struct sh_mobile_dt_config default_dt_config = {
  626 + .clks_per_count = 1,
  627 +};
  628 +
  629 +static const struct sh_mobile_dt_config rcar_gen2_dt_config = {
  630 + .clks_per_count = 2,
  631 +};
  632 +
  633 +static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
  634 + { .compatible = "renesas,rmobile-iic", .data = &default_dt_config },
  635 + { .compatible = "renesas,iic-r8a7790", .data = &rcar_gen2_dt_config },
  636 + { .compatible = "renesas,iic-r8a7791", .data = &rcar_gen2_dt_config },
  637 + { .compatible = "renesas,iic-r8a7792", .data = &rcar_gen2_dt_config },
  638 + { .compatible = "renesas,iic-r8a7793", .data = &rcar_gen2_dt_config },
  639 + { .compatible = "renesas,iic-r8a7794", .data = &rcar_gen2_dt_config },
  640 + {},
  641 +};
  642 +MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
  643 +
  644 +static int sh_mobile_i2c_hook_irqs(struct platform_device *dev)
621 645 {
622 646 struct resource *res;
623   - int ret = -ENXIO;
624   - int n, k = 0;
  647 + resource_size_t n;
  648 + int k = 0, ret;
625 649  
626 650 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
627   - for (n = res->start; hook && n <= res->end; n++) {
628   - if (request_irq(n, sh_mobile_i2c_isr, 0,
629   - dev_name(&dev->dev), dev)) {
630   - for (n--; n >= res->start; n--)
631   - free_irq(n, dev);
632   -
633   - goto rollback;
  651 + for (n = res->start; n <= res->end; n++) {
  652 + ret = devm_request_irq(&dev->dev, n, sh_mobile_i2c_isr,
  653 + 0, dev_name(&dev->dev), dev);
  654 + if (ret) {
  655 + dev_err(&dev->dev, "cannot request IRQ %pa\n", &n);
  656 + return ret;
634 657 }
635 658 }
636 659 k++;
637 660 }
638 661  
639   - if (hook)
640   - return k > 0 ? 0 : -ENOENT;
641   -
642   - ret = 0;
643   -
644   - rollback:
645   - k--;
646   -
647   - while (k >= 0) {
648   - res = platform_get_resource(dev, IORESOURCE_IRQ, k);
649   - for (n = res->start; n <= res->end; n++)
650   - free_irq(n, dev);
651   -
652   - k--;
653   - }
654   -
655   - return ret;
  662 + return k > 0 ? 0 : -ENOENT;
656 663 }
657 664  
658 665 static int sh_mobile_i2c_probe(struct platform_device *dev)
659 666  
660 667  
661 668  
662 669  
663 670  
664 671  
665 672  
666 673  
667 674  
668 675  
669 676  
670 677  
671 678  
672 679  
... ... @@ -661,62 +668,64 @@
661 668 struct sh_mobile_i2c_data *pd;
662 669 struct i2c_adapter *adap;
663 670 struct resource *res;
664   - int size;
665 671 int ret;
  672 + u32 bus_speed;
666 673  
667   - pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
668   - if (pd == NULL) {
669   - dev_err(&dev->dev, "cannot allocate private data\n");
  674 + pd = devm_kzalloc(&dev->dev, sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
  675 + if (!pd)
670 676 return -ENOMEM;
671   - }
672 677  
673   - pd->clk = clk_get(&dev->dev, NULL);
  678 + pd->clk = devm_clk_get(&dev->dev, NULL);
674 679 if (IS_ERR(pd->clk)) {
675 680 dev_err(&dev->dev, "cannot get clock\n");
676   - ret = PTR_ERR(pd->clk);
677   - goto err;
  681 + return PTR_ERR(pd->clk);
678 682 }
679 683  
680   - ret = sh_mobile_i2c_hook_irqs(dev, 1);
681   - if (ret) {
682   - dev_err(&dev->dev, "cannot request IRQ\n");
683   - goto err_clk;
684   - }
  684 + ret = sh_mobile_i2c_hook_irqs(dev);
  685 + if (ret)
  686 + return ret;
685 687  
686 688 pd->dev = &dev->dev;
687 689 platform_set_drvdata(dev, pd);
688 690  
689 691 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
690   - if (res == NULL) {
691   - dev_err(&dev->dev, "cannot find IO resource\n");
692   - ret = -ENOENT;
693   - goto err_irq;
694   - }
695 692  
696   - size = resource_size(res);
  693 + pd->reg = devm_ioremap_resource(&dev->dev, res);
  694 + if (IS_ERR(pd->reg))
  695 + return PTR_ERR(pd->reg);
697 696  
698   - pd->reg = ioremap(res->start, size);
699   - if (pd->reg == NULL) {
700   - dev_err(&dev->dev, "cannot map IO\n");
701   - ret = -ENXIO;
702   - goto err_irq;
703   - }
704   -
705 697 /* Use platform data bus speed or STANDARD_MODE */
706   - pd->bus_speed = STANDARD_MODE;
707   - if (pdata && pdata->bus_speed)
708   - pd->bus_speed = pdata->bus_speed;
  698 + ret = of_property_read_u32(dev->dev.of_node, "clock-frequency", &bus_speed);
  699 + pd->bus_speed = ret ? STANDARD_MODE : bus_speed;
  700 +
709 701 pd->clks_per_count = 1;
710   - if (pdata && pdata->clks_per_count)
711   - pd->clks_per_count = pdata->clks_per_count;
712 702  
  703 + if (dev->dev.of_node) {
  704 + const struct of_device_id *match;
  705 +
  706 + match = of_match_device(sh_mobile_i2c_dt_ids, &dev->dev);
  707 + if (match) {
  708 + const struct sh_mobile_dt_config *config;
  709 +
  710 + config = match->data;
  711 + pd->clks_per_count = config->clks_per_count;
  712 + }
  713 + } else {
  714 + if (pdata && pdata->bus_speed)
  715 + pd->bus_speed = pdata->bus_speed;
  716 + if (pdata && pdata->clks_per_count)
  717 + pd->clks_per_count = pdata->clks_per_count;
  718 + }
  719 +
713 720 /* The IIC blocks on SH-Mobile ARM processors
714 721 * come with two new bits in ICIC.
715 722 */
716   - if (size > 0x17)
  723 + if (resource_size(res) > 0x17)
717 724 pd->flags |= IIC_FLAG_HAS_ICIC67;
718 725  
719   - sh_mobile_i2c_init(pd);
  726 + ret = sh_mobile_i2c_init(pd);
  727 + if (ret)
  728 + return ret;
720 729  
721 730 /* Enable Runtime PM for this device.
722 731 *
723 732  
724 733  
... ... @@ -750,24 +759,14 @@
750 759 ret = i2c_add_numbered_adapter(adap);
751 760 if (ret < 0) {
752 761 dev_err(&dev->dev, "cannot add numbered adapter\n");
753   - goto err_all;
  762 + return ret;
754 763 }
755 764  
756 765 dev_info(&dev->dev,
757   - "I2C adapter %d with bus speed %lu Hz (L/H=%x/%x)\n",
  766 + "I2C adapter %d with bus speed %lu Hz (L/H=0x%x/0x%x)\n",
758 767 adap->nr, pd->bus_speed, pd->iccl, pd->icch);
759 768  
760 769 return 0;
761   -
762   - err_all:
763   - iounmap(pd->reg);
764   - err_irq:
765   - sh_mobile_i2c_hook_irqs(dev, 0);
766   - err_clk:
767   - clk_put(pd->clk);
768   - err:
769   - kfree(pd);
770   - return ret;
771 770 }
772 771  
773 772 static int sh_mobile_i2c_remove(struct platform_device *dev)
774 773  
... ... @@ -775,11 +774,7 @@
775 774 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
776 775  
777 776 i2c_del_adapter(&pd->adap);
778   - iounmap(pd->reg);
779   - sh_mobile_i2c_hook_irqs(dev, 0);
780   - clk_put(pd->clk);
781 777 pm_runtime_disable(&dev->dev);
782   - kfree(pd);
783 778 return 0;
784 779 }
785 780  
... ... @@ -799,12 +794,6 @@
799 794 .runtime_suspend = sh_mobile_i2c_runtime_nop,
800 795 .runtime_resume = sh_mobile_i2c_runtime_nop,
801 796 };
802   -
803   -static const struct of_device_id sh_mobile_i2c_dt_ids[] = {
804   - { .compatible = "renesas,rmobile-iic", },
805   - {},
806   -};
807   -MODULE_DEVICE_TABLE(of, sh_mobile_i2c_dt_ids);
808 797  
809 798 static struct platform_driver sh_mobile_i2c_driver = {
810 799 .driver = {
drivers/i2c/busses/i2c-simtec.c
Diff comments   View file @ 7b215de
... ... @@ -77,10 +77,8 @@
77 77 int ret;
78 78  
79 79 pd = kzalloc(sizeof(struct simtec_i2c_data), GFP_KERNEL);
80   - if (pd == NULL) {
81   - dev_err(&dev->dev, "cannot allocate private data\n");
  80 + if (pd == NULL)
82 81 return -ENOMEM;
83   - }
84 82  
85 83 platform_set_drvdata(dev, pd);
86 84  
drivers/i2c/busses/i2c-sirf.c
Diff comments   View file @ 7b215de
... ... @@ -307,7 +307,6 @@
307 307  
308 308 siic = devm_kzalloc(&pdev->dev, sizeof(*siic), GFP_KERNEL);
309 309 if (!siic) {
310   - dev_err(&pdev->dev, "Can't allocate driver data\n");
311 310 err = -ENOMEM;
312 311 goto out;
313 312 }
drivers/i2c/busses/i2c-st.c
Diff comments   View file @ 7b215de
... ... @@ -847,7 +847,7 @@
847 847 return 0;
848 848 }
849 849  
850   -static struct of_device_id st_i2c_match[] = {
  850 +static const struct of_device_id st_i2c_match[] = {
851 851 { .compatible = "st,comms-ssc-i2c", },
852 852 { .compatible = "st,comms-ssc4-i2c", },
853 853 {},
drivers/i2c/busses/i2c-stu300.c
Diff comments   View file @ 7b215de
... ... @@ -868,10 +868,8 @@
868 868 int ret = 0;
869 869  
870 870 dev = devm_kzalloc(&pdev->dev, sizeof(struct stu300_dev), GFP_KERNEL);
871   - if (!dev) {
872   - dev_err(&pdev->dev, "could not allocate device struct\n");
  871 + if (!dev)
873 872 return -ENOMEM;
874   - }
875 873  
876 874 bus_nr = pdev->id;
877 875 dev->clk = devm_clk_get(&pdev->dev, NULL);
drivers/i2c/busses/i2c-tegra.c
Diff comments   View file @ 7b215de
... ... @@ -732,10 +732,8 @@
732 732 }
733 733  
734 734 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
735   - if (!i2c_dev) {
736   - dev_err(&pdev->dev, "Could not allocate struct tegra_i2c_dev");
  735 + if (!i2c_dev)
737 736 return -ENOMEM;
738   - }
739 737  
740 738 i2c_dev->base = base;
741 739 i2c_dev->div_clk = div_clk;
drivers/i2c/busses/i2c-wmt.c
Diff comments   View file @ 7b215de
... ... @@ -379,10 +379,8 @@
379 379 u32 clk_rate;
380 380  
381 381 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
382   - if (!i2c_dev) {
383   - dev_err(&pdev->dev, "device memory allocation failed\n");
  382 + if (!i2c_dev)
384 383 return -ENOMEM;
385   - }
386 384  
387 385 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
388 386 i2c_dev->base = devm_ioremap_resource(&pdev->dev, res);
... ... @@ -454,7 +452,7 @@
454 452 return 0;
455 453 }
456 454  
457   -static struct of_device_id wmt_i2c_dt_ids[] = {
  455 +static const struct of_device_id wmt_i2c_dt_ids[] = {
458 456 { .compatible = "wm,wm8505-i2c" },
459 457 { /* Sentinel */ },
460 458 };
drivers/i2c/busses/scx200_acb.c
Diff comments   View file @ 7b215de
... ... @@ -431,10 +431,8 @@
431 431 struct i2c_adapter *adapter;
432 432  
433 433 iface = kzalloc(sizeof(*iface), GFP_KERNEL);
434   - if (!iface) {
435   - pr_err("can't allocate memory\n");
  434 + if (!iface)
436 435 return NULL;
437   - }
438 436  
439 437 adapter = &iface->adapter;
440 438 i2c_set_adapdata(adapter, iface);
drivers/i2c/muxes/i2c-mux-pca954x.c
Diff comments   View file @ 7b215de
... ... @@ -36,12 +36,11 @@
36 36 */
37 37  
38 38 #include <linux/device.h>
39   -#include <linux/gpio.h>
  39 +#include <linux/gpio/consumer.h>
40 40 #include <linux/i2c.h>
41 41 #include <linux/i2c-mux.h>
42 42 #include <linux/i2c/pca954x.h>
43 43 #include <linux/module.h>
44   -#include <linux/of_gpio.h>
45 44 #include <linux/slab.h>
46 45  
47 46 #define PCA954X_MAX_NCHANS 8
... ... @@ -186,7 +185,7 @@
186 185 {
187 186 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
188 187 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
189   - struct device_node *np = client->dev.of_node;
  188 + struct gpio_desc *gpio;
190 189 int num, force, class;
191 190 struct pca954x *data;
192 191 int ret;
... ... @@ -200,21 +199,10 @@
200 199  
201 200 i2c_set_clientdata(client, data);
202 201  
203   - if (IS_ENABLED(CONFIG_OF) && np) {
204   - enum of_gpio_flags flags;
205   - int gpio;
206   -
207   - /* Get the mux out of reset if a reset GPIO is specified. */
208   - gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
209   - if (gpio_is_valid(gpio)) {
210   - ret = devm_gpio_request_one(&client->dev, gpio,
211   - flags & OF_GPIO_ACTIVE_LOW ?
212   - GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
213   - "pca954x reset");
214   - if (ret < 0)
215   - return ret;
216   - }
217   - }
  202 + /* Get the mux out of reset if a reset GPIO is specified. */
  203 + gpio = devm_gpiod_get(&client->dev, "reset");
  204 + if (!IS_ERR(gpio))
  205 + gpiod_direction_output(gpio, 0);
218 206  
219 207 /* Write the mux register at addr to verify
220 208 * that the mux is in fact present. This also