Commit 7c8d948f1633da5ff81e4f5b31ef237d74c40127
Committed by
Ralf Baechle
1 parent
9fcecaf02d
Exists in
master
and in
20 other branches
MIPS: i8259: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Showing 3 changed files with 24 additions and 26 deletions Side-by-side Diff
arch/mips/include/asm/irq.h
... | ... | @@ -55,8 +55,8 @@ |
55 | 55 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
56 | 56 | #include <linux/cpumask.h> |
57 | 57 | |
58 | -extern int plat_set_irq_affinity(unsigned int irq, | |
59 | - const struct cpumask *affinity); | |
58 | +extern int plat_set_irq_affinity(struct irq_data *d, | |
59 | + const struct cpumask *affinity, bool force); | |
60 | 60 | extern void smtc_forward_irq(unsigned int irq); |
61 | 61 | |
62 | 62 | /* |
arch/mips/kernel/i8259.c
... | ... | @@ -31,19 +31,19 @@ |
31 | 31 | |
32 | 32 | static int i8259A_auto_eoi = -1; |
33 | 33 | DEFINE_RAW_SPINLOCK(i8259A_lock); |
34 | -static void disable_8259A_irq(unsigned int irq); | |
35 | -static void enable_8259A_irq(unsigned int irq); | |
36 | -static void mask_and_ack_8259A(unsigned int irq); | |
34 | +static void disable_8259A_irq(struct irq_data *d); | |
35 | +static void enable_8259A_irq(struct irq_data *d); | |
36 | +static void mask_and_ack_8259A(struct irq_data *d); | |
37 | 37 | static void init_8259A(int auto_eoi); |
38 | 38 | |
39 | 39 | static struct irq_chip i8259A_chip = { |
40 | - .name = "XT-PIC", | |
41 | - .mask = disable_8259A_irq, | |
42 | - .disable = disable_8259A_irq, | |
43 | - .unmask = enable_8259A_irq, | |
44 | - .mask_ack = mask_and_ack_8259A, | |
40 | + .name = "XT-PIC", | |
41 | + .irq_mask = disable_8259A_irq, | |
42 | + .irq_disable = disable_8259A_irq, | |
43 | + .irq_unmask = enable_8259A_irq, | |
44 | + .irq_mask_ack = mask_and_ack_8259A, | |
45 | 45 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
46 | - .set_affinity = plat_set_irq_affinity, | |
46 | + .irq_set_affinity = plat_set_irq_affinity, | |
47 | 47 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
48 | 48 | }; |
49 | 49 | |
50 | 50 | |
51 | 51 | |
... | ... | @@ -59,12 +59,11 @@ |
59 | 59 | #define cached_master_mask (cached_irq_mask) |
60 | 60 | #define cached_slave_mask (cached_irq_mask >> 8) |
61 | 61 | |
62 | -static void disable_8259A_irq(unsigned int irq) | |
62 | +static void disable_8259A_irq(struct irq_data *d) | |
63 | 63 | { |
64 | - unsigned int mask; | |
64 | + unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; | |
65 | 65 | unsigned long flags; |
66 | 66 | |
67 | - irq -= I8259A_IRQ_BASE; | |
68 | 67 | mask = 1 << irq; |
69 | 68 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
70 | 69 | cached_irq_mask |= mask; |
71 | 70 | |
72 | 71 | |
... | ... | @@ -75,12 +74,11 @@ |
75 | 74 | raw_spin_unlock_irqrestore(&i8259A_lock, flags); |
76 | 75 | } |
77 | 76 | |
78 | -static void enable_8259A_irq(unsigned int irq) | |
77 | +static void enable_8259A_irq(struct irq_data *d) | |
79 | 78 | { |
80 | - unsigned int mask; | |
79 | + unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; | |
81 | 80 | unsigned long flags; |
82 | 81 | |
83 | - irq -= I8259A_IRQ_BASE; | |
84 | 82 | mask = ~(1 << irq); |
85 | 83 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
86 | 84 | cached_irq_mask &= mask; |
87 | 85 | |
88 | 86 | |
... | ... | @@ -145,12 +143,11 @@ |
145 | 143 | * first, _then_ send the EOI, and the order of EOI |
146 | 144 | * to the two 8259s is important! |
147 | 145 | */ |
148 | -static void mask_and_ack_8259A(unsigned int irq) | |
146 | +static void mask_and_ack_8259A(struct irq_data *d) | |
149 | 147 | { |
150 | - unsigned int irqmask; | |
148 | + unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE; | |
151 | 149 | unsigned long flags; |
152 | 150 | |
153 | - irq -= I8259A_IRQ_BASE; | |
154 | 151 | irqmask = 1 << irq; |
155 | 152 | raw_spin_lock_irqsave(&i8259A_lock, flags); |
156 | 153 | /* |
157 | 154 | |
... | ... | @@ -290,9 +287,9 @@ |
290 | 287 | * In AEOI mode we just have to mask the interrupt |
291 | 288 | * when acking. |
292 | 289 | */ |
293 | - i8259A_chip.mask_ack = disable_8259A_irq; | |
290 | + i8259A_chip.irq_mask_ack = disable_8259A_irq; | |
294 | 291 | else |
295 | - i8259A_chip.mask_ack = mask_and_ack_8259A; | |
292 | + i8259A_chip.irq_mask_ack = mask_and_ack_8259A; | |
296 | 293 | |
297 | 294 | udelay(100); /* wait for 8259A to initialize */ |
298 | 295 |
arch/mips/mti-malta/malta-smtc.c
... | ... | @@ -113,7 +113,8 @@ |
113 | 113 | */ |
114 | 114 | |
115 | 115 | |
116 | -int plat_set_irq_affinity(unsigned int irq, const struct cpumask *affinity) | |
116 | +int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, | |
117 | + bool force) | |
117 | 118 | { |
118 | 119 | cpumask_t tmask; |
119 | 120 | int cpu = 0; |
... | ... | @@ -143,7 +144,7 @@ |
143 | 144 | if ((cpu_data[cpu].vpe_id != 0) || !cpu_online(cpu)) |
144 | 145 | cpu_clear(cpu, tmask); |
145 | 146 | } |
146 | - cpumask_copy(irq_desc[irq].affinity, &tmask); | |
147 | + cpumask_copy(d->affinity, &tmask); | |
147 | 148 | |
148 | 149 | if (cpus_empty(tmask)) |
149 | 150 | /* |
150 | 151 | |
... | ... | @@ -154,9 +155,9 @@ |
154 | 155 | "IRQ affinity leaves no legal CPU for IRQ %d\n", irq); |
155 | 156 | |
156 | 157 | /* Do any generic SMTC IRQ affinity setup */ |
157 | - smtc_set_irq_affinity(irq, tmask); | |
158 | + smtc_set_irq_affinity(d->irq, tmask); | |
158 | 159 | |
159 | - return 0; | |
160 | + return IRQ_SET_MASK_OK_NOCOPY; | |
160 | 161 | } |
161 | 162 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |