Commit 7da4b29d496b1389d3a29b55d3668efecaa08ebd

Authored by Mathias Krause
Committed by Herbert Xu
1 parent c9f21cb638

crypto: aesni - disable "by8" AVX CTR optimization

The "by8" implementation introduced in commit 22cddcc7df8f ("crypto: aes
- AES CTR x86_64 "by8" AVX optimization") is failing crypto tests as it
handles counter block overflows differently. It only accounts the right
most 32 bit as a counter -- not the whole block as all other
implementations do. This makes it fail the cryptomgr test #4 that
specifically tests this corner case.

As we're quite late in the release cycle, just disable the "by8" variant
for now.

Reported-by: Romain Francoise <romain@orebokech.com>
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Cc: Chandramouli Narayanan <mouli@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

Showing 1 changed file with 2 additions and 2 deletions Side-by-side Diff

arch/x86/crypto/aesni-intel_glue.c
... ... @@ -481,7 +481,7 @@
481 481 crypto_inc(ctrblk, AES_BLOCK_SIZE);
482 482 }
483 483  
484   -#ifdef CONFIG_AS_AVX
  484 +#if 0 /* temporary disabled due to failing crypto tests */
485 485 static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
486 486 const u8 *in, unsigned int len, u8 *iv)
487 487 {
... ... @@ -1522,7 +1522,7 @@
1522 1522 aesni_gcm_dec_tfm = aesni_gcm_dec;
1523 1523 }
1524 1524 aesni_ctr_enc_tfm = aesni_ctr_enc;
1525   -#ifdef CONFIG_AS_AVX
  1525 +#if 0 /* temporary disabled due to failing crypto tests */
1526 1526 if (cpu_has_avx) {
1527 1527 /* optimize performance of ctr mode encryption transform */
1528 1528 aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;