Commit 83692898642a6d4950d3cd47971b101424d47859
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "Here's our last set of fixes for 3.17. Most of these are for TI platforms, fixing some noisy Kconfig issues, runtime clock and power issues on several platforms and NAND timings on DRA7. There are also a couple of bug fixes for i.MX, one for QCOM and a small fix to avoid section mismatch noise on PXA. Diffstat looks large, partially due to some tables being updated and thus touching many lines. The qcom gsbi change also restructures clock management a bit and thus touches a bunch of lines. All in all, a bit more changes than we'd like at this point, but nothing stands out as risky either so it seems like the right thing to send it up now instead of holding it to the merge window" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: drivers/soc: qcom: do not disable the iface clock in probe ARM: imx: fix .is_enabled() of shared gate clock ARM: OMAP3: Fix I/O chain clock line assertion timed out error ARM: keystone: dts: fix bindings for pcie and usb clock nodes bus: omap_l3_noc: Fix connID for OMAP4 ARM: DT: imx53: fix lvds channel 1 port ARM: dts: cm-t54: fix serial console power supply. ARM: dts: dra7-evm: Fix NAND GPMC timings ARM: pxa: fix section mismatch warning for pxa_timer_nodt_init ARM: OMAP: Fix Kconfig warning for omap1
Showing 13 changed files Side-by-side Diff
- Documentation/devicetree/bindings/staging/imx-drm/ldb.txt
- arch/arm/boot/dts/dra7-evm.dts
- arch/arm/boot/dts/imx53.dtsi
- arch/arm/boot/dts/k2e-clocks.dtsi
- arch/arm/boot/dts/omap5-cm-t54.dts
- arch/arm/mach-imx/clk-gate2.c
- arch/arm/mach-omap2/Kconfig
- arch/arm/mach-omap2/omap_hwmod.c
- arch/arm/mach-omap2/prm3xxx.c
- arch/arm/mach-pxa/generic.c
- arch/arm/plat-omap/Kconfig
- drivers/bus/omap_l3_noc.h
- drivers/soc/qcom/qcom_gsbi.c
Documentation/devicetree/bindings/staging/imx-drm/ldb.txt
... | ... | @@ -56,6 +56,9 @@ |
56 | 56 | - fsl,data-width : should be <18> or <24> |
57 | 57 | - port: A port node with endpoint definitions as defined in |
58 | 58 | Documentation/devicetree/bindings/media/video-interfaces.txt. |
59 | + On i.MX5, the internal two-input-multiplexer is used. | |
60 | + Due to hardware limitations, only one port (port@[0,1]) | |
61 | + can be used for each channel (lvds-channel@[0,1], respectively) | |
59 | 62 | On i.MX6, there should be four ports (port@[0-3]) that correspond |
60 | 63 | to the four LVDS multiplexer inputs. |
61 | 64 | |
... | ... | @@ -78,6 +81,8 @@ |
78 | 81 | "di0", "di1"; |
79 | 82 | |
80 | 83 | lvds-channel@0 { |
84 | + #address-cells = <1>; | |
85 | + #size-cells = <0>; | |
81 | 86 | reg = <0>; |
82 | 87 | fsl,data-mapping = "spwg"; |
83 | 88 | fsl,data-width = <24>; |
... | ... | @@ -86,7 +91,9 @@ |
86 | 91 | /* ... */ |
87 | 92 | }; |
88 | 93 | |
89 | - port { | |
94 | + port@0 { | |
95 | + reg = <0>; | |
96 | + | |
90 | 97 | lvds0_in: endpoint { |
91 | 98 | remote-endpoint = <&ipu_di0_lvds0>; |
92 | 99 | }; |
... | ... | @@ -94,6 +101,8 @@ |
94 | 101 | }; |
95 | 102 | |
96 | 103 | lvds-channel@1 { |
104 | + #address-cells = <1>; | |
105 | + #size-cells = <0>; | |
97 | 106 | reg = <1>; |
98 | 107 | fsl,data-mapping = "spwg"; |
99 | 108 | fsl,data-width = <24>; |
... | ... | @@ -102,7 +111,9 @@ |
102 | 111 | /* ... */ |
103 | 112 | }; |
104 | 113 | |
105 | - port { | |
114 | + port@1 { | |
115 | + reg = <1>; | |
116 | + | |
106 | 117 | lvds1_in: endpoint { |
107 | 118 | remote-endpoint = <&ipu_di1_lvds1>; |
108 | 119 | }; |
arch/arm/boot/dts/dra7-evm.dts
... | ... | @@ -447,22 +447,19 @@ |
447 | 447 | gpmc,device-width = <2>; |
448 | 448 | gpmc,sync-clk-ps = <0>; |
449 | 449 | gpmc,cs-on-ns = <0>; |
450 | - gpmc,cs-rd-off-ns = <40>; | |
451 | - gpmc,cs-wr-off-ns = <40>; | |
450 | + gpmc,cs-rd-off-ns = <80>; | |
451 | + gpmc,cs-wr-off-ns = <80>; | |
452 | 452 | gpmc,adv-on-ns = <0>; |
453 | - gpmc,adv-rd-off-ns = <30>; | |
454 | - gpmc,adv-wr-off-ns = <30>; | |
455 | - gpmc,we-on-ns = <5>; | |
456 | - gpmc,we-off-ns = <25>; | |
457 | - gpmc,oe-on-ns = <2>; | |
458 | - gpmc,oe-off-ns = <20>; | |
459 | - gpmc,access-ns = <20>; | |
460 | - gpmc,wr-access-ns = <40>; | |
461 | - gpmc,rd-cycle-ns = <40>; | |
462 | - gpmc,wr-cycle-ns = <40>; | |
463 | - gpmc,wait-pin = <0>; | |
464 | - gpmc,wait-on-read; | |
465 | - gpmc,wait-on-write; | |
453 | + gpmc,adv-rd-off-ns = <60>; | |
454 | + gpmc,adv-wr-off-ns = <60>; | |
455 | + gpmc,we-on-ns = <10>; | |
456 | + gpmc,we-off-ns = <50>; | |
457 | + gpmc,oe-on-ns = <4>; | |
458 | + gpmc,oe-off-ns = <40>; | |
459 | + gpmc,access-ns = <40>; | |
460 | + gpmc,wr-access-ns = <80>; | |
461 | + gpmc,rd-cycle-ns = <80>; | |
462 | + gpmc,wr-cycle-ns = <80>; | |
466 | 463 | gpmc,bus-turnaround-ns = <0>; |
467 | 464 | gpmc,cycle2cycle-delay-ns = <0>; |
468 | 465 | gpmc,clk-activation-ns = <0>; |
arch/arm/boot/dts/imx53.dtsi
... | ... | @@ -423,10 +423,14 @@ |
423 | 423 | status = "disabled"; |
424 | 424 | |
425 | 425 | lvds-channel@0 { |
426 | + #address-cells = <1>; | |
427 | + #size-cells = <0>; | |
426 | 428 | reg = <0>; |
427 | 429 | status = "disabled"; |
428 | 430 | |
429 | - port { | |
431 | + port@0 { | |
432 | + reg = <0>; | |
433 | + | |
430 | 434 | lvds0_in: endpoint { |
431 | 435 | remote-endpoint = <&ipu_di0_lvds0>; |
432 | 436 | }; |
433 | 437 | |
... | ... | @@ -434,10 +438,14 @@ |
434 | 438 | }; |
435 | 439 | |
436 | 440 | lvds-channel@1 { |
441 | + #address-cells = <1>; | |
442 | + #size-cells = <0>; | |
437 | 443 | reg = <1>; |
438 | 444 | status = "disabled"; |
439 | 445 | |
440 | - port { | |
446 | + port@1 { | |
447 | + reg = <1>; | |
448 | + | |
441 | 449 | lvds1_in: endpoint { |
442 | 450 | remote-endpoint = <&ipu_di1_lvds1>; |
443 | 451 | }; |
arch/arm/boot/dts/k2e-clocks.dtsi
... | ... | @@ -40,7 +40,7 @@ |
40 | 40 | #clock-cells = <0>; |
41 | 41 | compatible = "ti,keystone,psc-clock"; |
42 | 42 | clocks = <&chipclk16>; |
43 | - clock-output-names = "usb"; | |
43 | + clock-output-names = "usb1"; | |
44 | 44 | reg = <0x02350004 0xb00>, <0x02350000 0x400>; |
45 | 45 | reg-names = "control", "domain"; |
46 | 46 | domain-id = <0>; |
... | ... | @@ -60,8 +60,8 @@ |
60 | 60 | #clock-cells = <0>; |
61 | 61 | compatible = "ti,keystone,psc-clock"; |
62 | 62 | clocks = <&chipclk12>; |
63 | - clock-output-names = "pcie"; | |
64 | - reg = <0x0235006c 0xb00>, <0x02350000 0x400>; | |
63 | + clock-output-names = "pcie1"; | |
64 | + reg = <0x0235006c 0xb00>, <0x02350048 0x400>; | |
65 | 65 | reg-names = "control", "domain"; |
66 | 66 | domain-id = <18>; |
67 | 67 | }; |
arch/arm/boot/dts/omap5-cm-t54.dts
... | ... | @@ -353,13 +353,12 @@ |
353 | 353 | }; |
354 | 354 | |
355 | 355 | ldo8_reg: ldo8 { |
356 | - /* VDD_3v0: Does not go anywhere */ | |
356 | + /* VDD_3V_GP: act led/serial console */ | |
357 | 357 | regulator-name = "ldo8"; |
358 | 358 | regulator-min-microvolt = <3000000>; |
359 | 359 | regulator-max-microvolt = <3000000>; |
360 | + regulator-always-on; | |
360 | 361 | regulator-boot-on; |
361 | - /* Unused */ | |
362 | - status = "disabled"; | |
363 | 362 | }; |
364 | 363 | |
365 | 364 | ldo9_reg: ldo9 { |
arch/arm/mach-imx/clk-gate2.c
... | ... | @@ -97,7 +97,7 @@ |
97 | 97 | struct clk_gate2 *gate = to_clk_gate2(hw); |
98 | 98 | |
99 | 99 | if (gate->share_count) |
100 | - return !!(*gate->share_count); | |
100 | + return !!__clk_get_enable_count(hw->clk); | |
101 | 101 | else |
102 | 102 | return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx); |
103 | 103 | } |
... | ... | @@ -127,10 +127,6 @@ |
127 | 127 | gate->bit_idx = bit_idx; |
128 | 128 | gate->flags = clk_gate2_flags; |
129 | 129 | gate->lock = lock; |
130 | - | |
131 | - /* Initialize share_count per hardware state */ | |
132 | - if (share_count) | |
133 | - *share_count = clk_gate2_reg_is_enabled(reg, bit_idx) ? 1 : 0; | |
134 | 130 | gate->share_count = share_count; |
135 | 131 | |
136 | 132 | init.name = name; |
arch/arm/mach-omap2/Kconfig
arch/arm/mach-omap2/omap_hwmod.c
... | ... | @@ -2065,7 +2065,7 @@ |
2065 | 2065 | |
2066 | 2066 | spin_lock_irqsave(&io_chain_lock, flags); |
2067 | 2067 | |
2068 | - if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl()) | |
2068 | + if (cpu_is_omap34xx()) | |
2069 | 2069 | omap3xxx_prm_reconfigure_io_chain(); |
2070 | 2070 | else if (cpu_is_omap44xx()) |
2071 | 2071 | omap44xx_prm_reconfigure_io_chain(); |
arch/arm/mach-omap2/prm3xxx.c
... | ... | @@ -45,7 +45,7 @@ |
45 | 45 | .ocp_barrier = &omap3xxx_prm_ocp_barrier, |
46 | 46 | .save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen, |
47 | 47 | .restore_irqen = &omap3xxx_prm_restore_irqen, |
48 | - .reconfigure_io_chain = &omap3xxx_prm_reconfigure_io_chain, | |
48 | + .reconfigure_io_chain = NULL, | |
49 | 49 | }; |
50 | 50 | |
51 | 51 | /* |
52 | 52 | |
53 | 53 | |
54 | 54 | |
... | ... | @@ -369,15 +369,30 @@ |
369 | 369 | } |
370 | 370 | |
371 | 371 | /** |
372 | - * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain | |
372 | + * omap3430_pre_es3_1_reconfigure_io_chain - restart wake-up daisy chain | |
373 | 373 | * |
374 | + * The ST_IO_CHAIN bit does not exist in 3430 before es3.1. The only | |
375 | + * thing we can do is toggle EN_IO bit for earlier omaps. | |
376 | + */ | |
377 | +void omap3430_pre_es3_1_reconfigure_io_chain(void) | |
378 | +{ | |
379 | + omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, | |
380 | + PM_WKEN); | |
381 | + omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, | |
382 | + PM_WKEN); | |
383 | + omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN); | |
384 | +} | |
385 | + | |
386 | +/** | |
387 | + * omap3_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain | |
388 | + * | |
374 | 389 | * Clear any previously-latched I/O wakeup events and ensure that the |
375 | 390 | * I/O wakeup gates are aligned with the current mux settings. Works |
376 | 391 | * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then |
377 | 392 | * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No |
378 | - * return value. | |
393 | + * return value. These registers are only available in 3430 es3.1 and later. | |
379 | 394 | */ |
380 | -void omap3xxx_prm_reconfigure_io_chain(void) | |
395 | +void omap3_prm_reconfigure_io_chain(void) | |
381 | 396 | { |
382 | 397 | int i = 0; |
383 | 398 | |
... | ... | @@ -400,6 +415,15 @@ |
400 | 415 | } |
401 | 416 | |
402 | 417 | /** |
418 | + * omap3xxx_prm_reconfigure_io_chain - reconfigure I/O chain | |
419 | + */ | |
420 | +void omap3xxx_prm_reconfigure_io_chain(void) | |
421 | +{ | |
422 | + if (omap3_prcm_irq_setup.reconfigure_io_chain) | |
423 | + omap3_prcm_irq_setup.reconfigure_io_chain(); | |
424 | +} | |
425 | + | |
426 | +/** | |
403 | 427 | * omap3xxx_prm_enable_io_wakeup - enable wakeup events from I/O wakeup latches |
404 | 428 | * |
405 | 429 | * Activates the I/O wakeup event latches and allows events logged by |
... | ... | @@ -655,6 +679,13 @@ |
655 | 679 | |
656 | 680 | if (!(prm_features & PRM_HAS_IO_WAKEUP)) |
657 | 681 | return 0; |
682 | + | |
683 | + if (omap3_has_io_chain_ctrl()) | |
684 | + omap3_prcm_irq_setup.reconfigure_io_chain = | |
685 | + omap3_prm_reconfigure_io_chain; | |
686 | + else | |
687 | + omap3_prcm_irq_setup.reconfigure_io_chain = | |
688 | + omap3430_pre_es3_1_reconfigure_io_chain; | |
658 | 689 | |
659 | 690 | omap3xxx_prm_enable_io_wakeup(); |
660 | 691 | ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); |
arch/arm/mach-pxa/generic.c
arch/arm/plat-omap/Kconfig
drivers/bus/omap_l3_noc.h
... | ... | @@ -188,31 +188,31 @@ |
188 | 188 | }; |
189 | 189 | |
190 | 190 | static struct l3_masters_data omap_l3_masters[] = { |
191 | - { 0x0 , "MPU"}, | |
192 | - { 0x10, "CS_ADP"}, | |
193 | - { 0x14, "xxx"}, | |
194 | - { 0x20, "DSP"}, | |
195 | - { 0x30, "IVAHD"}, | |
196 | - { 0x40, "ISS"}, | |
197 | - { 0x44, "DucatiM3"}, | |
198 | - { 0x48, "FaceDetect"}, | |
199 | - { 0x50, "SDMA_Rd"}, | |
200 | - { 0x54, "SDMA_Wr"}, | |
201 | - { 0x58, "xxx"}, | |
202 | - { 0x5C, "xxx"}, | |
203 | - { 0x60, "SGX"}, | |
204 | - { 0x70, "DSS"}, | |
205 | - { 0x80, "C2C"}, | |
206 | - { 0x88, "xxx"}, | |
207 | - { 0x8C, "xxx"}, | |
208 | - { 0x90, "HSI"}, | |
209 | - { 0xA0, "MMC1"}, | |
210 | - { 0xA4, "MMC2"}, | |
211 | - { 0xA8, "MMC6"}, | |
212 | - { 0xB0, "UNIPRO1"}, | |
213 | - { 0xC0, "USBHOSTHS"}, | |
214 | - { 0xC4, "USBOTGHS"}, | |
215 | - { 0xC8, "USBHOSTFS"} | |
191 | + { 0x00, "MPU"}, | |
192 | + { 0x04, "CS_ADP"}, | |
193 | + { 0x05, "xxx"}, | |
194 | + { 0x08, "DSP"}, | |
195 | + { 0x0C, "IVAHD"}, | |
196 | + { 0x10, "ISS"}, | |
197 | + { 0x11, "DucatiM3"}, | |
198 | + { 0x12, "FaceDetect"}, | |
199 | + { 0x14, "SDMA_Rd"}, | |
200 | + { 0x15, "SDMA_Wr"}, | |
201 | + { 0x16, "xxx"}, | |
202 | + { 0x17, "xxx"}, | |
203 | + { 0x18, "SGX"}, | |
204 | + { 0x1C, "DSS"}, | |
205 | + { 0x20, "C2C"}, | |
206 | + { 0x22, "xxx"}, | |
207 | + { 0x23, "xxx"}, | |
208 | + { 0x24, "HSI"}, | |
209 | + { 0x28, "MMC1"}, | |
210 | + { 0x29, "MMC2"}, | |
211 | + { 0x2A, "MMC6"}, | |
212 | + { 0x2C, "UNIPRO1"}, | |
213 | + { 0x30, "USBHOSTHS"}, | |
214 | + { 0x31, "USBOTGHS"}, | |
215 | + { 0x32, "USBHOSTFS"} | |
216 | 216 | }; |
217 | 217 | |
218 | 218 | static struct l3_flagmux_data *omap_l3_flagmux[] = { |
drivers/soc/qcom/qcom_gsbi.c
... | ... | @@ -22,46 +22,65 @@ |
22 | 22 | #define GSBI_CTRL_REG 0x0000 |
23 | 23 | #define GSBI_PROTOCOL_SHIFT 4 |
24 | 24 | |
25 | +struct gsbi_info { | |
26 | + struct clk *hclk; | |
27 | + u32 mode; | |
28 | + u32 crci; | |
29 | +}; | |
30 | + | |
25 | 31 | static int gsbi_probe(struct platform_device *pdev) |
26 | 32 | { |
27 | 33 | struct device_node *node = pdev->dev.of_node; |
28 | 34 | struct resource *res; |
29 | 35 | void __iomem *base; |
30 | - struct clk *hclk; | |
31 | - u32 mode, crci = 0; | |
36 | + struct gsbi_info *gsbi; | |
32 | 37 | |
38 | + gsbi = devm_kzalloc(&pdev->dev, sizeof(*gsbi), GFP_KERNEL); | |
39 | + | |
40 | + if (!gsbi) | |
41 | + return -ENOMEM; | |
42 | + | |
33 | 43 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
34 | 44 | base = devm_ioremap_resource(&pdev->dev, res); |
35 | 45 | if (IS_ERR(base)) |
36 | 46 | return PTR_ERR(base); |
37 | 47 | |
38 | - if (of_property_read_u32(node, "qcom,mode", &mode)) { | |
48 | + if (of_property_read_u32(node, "qcom,mode", &gsbi->mode)) { | |
39 | 49 | dev_err(&pdev->dev, "missing mode configuration\n"); |
40 | 50 | return -EINVAL; |
41 | 51 | } |
42 | 52 | |
43 | 53 | /* not required, so default to 0 if not present */ |
44 | - of_property_read_u32(node, "qcom,crci", &crci); | |
54 | + of_property_read_u32(node, "qcom,crci", &gsbi->crci); | |
45 | 55 | |
46 | - dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n", mode, crci); | |
56 | + dev_info(&pdev->dev, "GSBI port protocol: %d crci: %d\n", | |
57 | + gsbi->mode, gsbi->crci); | |
58 | + gsbi->hclk = devm_clk_get(&pdev->dev, "iface"); | |
59 | + if (IS_ERR(gsbi->hclk)) | |
60 | + return PTR_ERR(gsbi->hclk); | |
47 | 61 | |
48 | - hclk = devm_clk_get(&pdev->dev, "iface"); | |
49 | - if (IS_ERR(hclk)) | |
50 | - return PTR_ERR(hclk); | |
62 | + clk_prepare_enable(gsbi->hclk); | |
51 | 63 | |
52 | - clk_prepare_enable(hclk); | |
53 | - | |
54 | - writel_relaxed((mode << GSBI_PROTOCOL_SHIFT) | crci, | |
64 | + writel_relaxed((gsbi->mode << GSBI_PROTOCOL_SHIFT) | gsbi->crci, | |
55 | 65 | base + GSBI_CTRL_REG); |
56 | 66 | |
57 | 67 | /* make sure the gsbi control write is not reordered */ |
58 | 68 | wmb(); |
59 | 69 | |
60 | - clk_disable_unprepare(hclk); | |
70 | + platform_set_drvdata(pdev, gsbi); | |
61 | 71 | |
62 | - return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev); | |
72 | + return of_platform_populate(node, NULL, NULL, &pdev->dev); | |
63 | 73 | } |
64 | 74 | |
75 | +static int gsbi_remove(struct platform_device *pdev) | |
76 | +{ | |
77 | + struct gsbi_info *gsbi = platform_get_drvdata(pdev); | |
78 | + | |
79 | + clk_disable_unprepare(gsbi->hclk); | |
80 | + | |
81 | + return 0; | |
82 | +} | |
83 | + | |
65 | 84 | static const struct of_device_id gsbi_dt_match[] = { |
66 | 85 | { .compatible = "qcom,gsbi-v1.0.0", }, |
67 | 86 | { }, |
... | ... | @@ -76,6 +95,7 @@ |
76 | 95 | .of_match_table = gsbi_dt_match, |
77 | 96 | }, |
78 | 97 | .probe = gsbi_probe, |
98 | + .remove = gsbi_remove, | |
79 | 99 | }; |
80 | 100 | |
81 | 101 | module_platform_driver(gsbi_driver); |