Commit 83d71c4de563fded93454d2c62cc7951a66c1897
Committed by
Sekhar Nori
Sekhar Nori
1 parent
5f6901eb3c
Exists in
ti-linux-3.14.y
and in
2 other branches
usb: dwc3: core: Add DWC3 OTG specific register defines
Add OTG reggister defines to DWC3 core.h Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Showing 1 changed file with 68 additions and 0 deletions Side-by-side Diff
drivers/usb/dwc3/core.h
| ... | ... | @@ -357,6 +357,74 @@ |
| 357 | 357 | #define DWC3_DEPCMD_TYPE_BULK 2 |
| 358 | 358 | #define DWC3_DEPCMD_TYPE_INTR 3 |
| 359 | 359 | |
| 360 | +/* OTG Configuration Register */ | |
| 361 | +#define DWC3_OCFG_DISPWRCUTTOFF (1 << 5) | |
| 362 | +#define DWC3_OCFG_HIBDISMASK (1 << 4) | |
| 363 | +#define DWC3_OCFG_SFTRSTMASK (1 << 3) | |
| 364 | +#define DWC3_OCFG_OTGVERSION (1 << 2) | |
| 365 | +#define DWC3_OCFG_HNPCAP (1 << 1) | |
| 366 | +#define DWC3_OCFG_SRPCAP (1 << 0) | |
| 367 | + | |
| 368 | +/* OTG CTL Register */ | |
| 369 | +#define DWC3_OCTL_OTG3GOERR (1 << 7) | |
| 370 | +#define DWC3_OCTL_PERIMODE (1 << 6) | |
| 371 | +#define DWC3_OCTL_PRTPWRCTL (1 << 5) | |
| 372 | +#define DWC3_OCTL_HNPREQ (1 << 4) | |
| 373 | +#define DWC3_OCTL_SESREQ (1 << 3) | |
| 374 | +#define DWC3_OCTL_TERMSELIDPULSE (1 << 2) | |
| 375 | +#define DWC3_OCTL_DEVSETHNPEN (1 << 1) | |
| 376 | +#define DWC3_OCTL_HOSTSETHNPEN (1 << 0) | |
| 377 | + | |
| 378 | +/* OTG Event Register */ | |
| 379 | +#define DWC3_OEVT_DEVICEMODE (1 << 31) | |
| 380 | +#define DWC3_OEVT_XHCIRUNSTPSET (1 << 27) | |
| 381 | +#define DWC3_OEVT_DEVRUNSTPSET (1 << 26) | |
| 382 | +#define DWC3_OEVT_HIBENTRY (1 << 25) | |
| 383 | +#define DWC3_OEVT_IDSTSCHNG (1 << 24) | |
| 384 | +#define DWC3_OEVT_HRRCONFNOTIF (1 << 23) | |
| 385 | +#define DWC3_OEVT_HRRINITNOTIF (1 << 22) | |
| 386 | +#define DWC3_OEVT_ADEVIDLE (1 << 21) | |
| 387 | +#define DWC3_OEVT_ADEVBHOSTEND (1 << 20) | |
| 388 | +#define DWC3_OEVT_ADEVHOST (1 << 19) | |
| 389 | +#define DWC3_OEVT_ADEVHNPCHNG (1 << 18) | |
| 390 | +#define DWC3_OEVT_ADEVSRPDET (1 << 17) | |
| 391 | +#define DWC3_OEVT_ADEVSESSENDDET (1 << 16) | |
| 392 | +#define DWC3_OEVT_BDEVBHOSTEND (1 << 11) | |
| 393 | +#define DWC3_OEVT_BDEVHNPCHNG (1 << 10) | |
| 394 | +#define DWC3_OEVT_BDEVSESSVLDDET (1 << 9) | |
| 395 | +#define DWC3_OEVT_BDEVVBUSCHNG (1 << 8) | |
| 396 | +#define DWC3_OEVT_BSESSVLD (1 << 3) | |
| 397 | +#define DWC3_OEVT_HOSTNEGSTS (1 << 2) | |
| 398 | +#define DWC3_OEVT_SESSREQSTS (1 << 1) | |
| 399 | +#define DWC3_OEVT_ERR (1 << 0) | |
| 400 | + | |
| 401 | +/* OTG Event Enable Register */ | |
| 402 | +#define DWC3_OEVTEN_XHCIRUNSTPSETEN (1 << 27) | |
| 403 | +#define DWC3_OEVTEN_DEVRUNSTPSETEN (1 << 26) | |
| 404 | +#define DWC3_OEVTEN_HIBENTRYEN (1 << 25) | |
| 405 | +#define DWC3_OEVTEN_CONIDSTSCHNGEN (1 << 24) | |
| 406 | +#define DWC3_OEVTEN_HRRCONFNOTIFEN (1 << 23) | |
| 407 | +#define DWC3_OEVTEN_HRRINITNOTIFEN (1 << 22) | |
| 408 | +#define DWC3_OEVTEN_ADEVIDLEEN (1 << 21) | |
| 409 | +#define DWC3_OEVTEN_ADEVBHOSTENDEN (1 << 20) | |
| 410 | +#define DWC3_OEVTEN_ADEVHOSTEN (1 << 19) | |
| 411 | +#define DWC3_OEVTEN_ADEVHNPCHNGEN (1 << 18) | |
| 412 | +#define DWC3_OEVTEN_ADEVSRPDETEN (1 << 17) | |
| 413 | +#define DWC3_OEVTEN_ADEVSESSENDDETEN (1 << 16) | |
| 414 | +#define DWC3_OEVTEN_BDEVHOSTENDEN (1 << 11) | |
| 415 | +#define DWC3_OEVTEN_BDEVHNPCHNGEN (1 << 10) | |
| 416 | +#define DWC3_OEVTEN_BDEVSESSVLDDETEN (1 << 9) | |
| 417 | +#define DWC3_OEVTEN_BDEVVBUSCHNGEVNTEN (1 << 8) | |
| 418 | + | |
| 419 | +/* OTG Status Register */ | |
| 420 | +#define DWC3_OSTS_DEVRUNSTP (1 << 13) | |
| 421 | +#define DWC3_OSTS_XHCIRUNSTP (1 << 12) | |
| 422 | +#define DWC3_OSTS_PERIPHERALSTATE (1 << 4) | |
| 423 | +#define DWC3_OSTS_XHCIPORTPOWER (1 << 3) | |
| 424 | +#define DWC3_OSTS_BSESVLD (1 << 2) | |
| 425 | +#define DWC3_OSTS_VBUSVLD (1 << 1) | |
| 426 | +#define DWC3_OSTS_CONIDSTS (1 << 0) | |
| 427 | + | |
| 360 | 428 | /* Structures */ |
| 361 | 429 | |
| 362 | 430 | struct dwc3_trb; |
