Commit 8fee986801b53d2c0b082d60db64ee05b3fe8e70

Authored by Dan Murphy

Merge branch 'connectivity-ti-linux-3.12.y' of git://git.ti.com/connectivity-int…

…egration-tree/connectivity-ti-linux-kernel into ti-linux-3.12.y

TI-Feature: connectivity
TI-Tree: git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel.git
TI-Branch: connectivity-ti-linux-3.12.y

* 'connectivity-ti-linux-3.12.y' of git://git.ti.com/connectivity-integration-tree/connectivity-ti-linux-kernel: (22 commits)
  arm: dts: am4372: Add hdq device tree data.
  drivers: w1: omap_hdq: cleanup and bug fixes.
  w1: omap_hdq: Add compatible property for omap hdq driver.
  arm: mach-omap2: Remove device build from __init path.
  arm: hwmod: am437x-hdq: Add hwmod data for hdq1w.
  arm: dts: am43x-epos-evm: Resize qspi uboot and kernel partition size.
  arm: dts: dra7-evm: Resize qspi uboot and kernel partition size.
  usb: phy: am335x: Don't manage PHY power in suspend/resume
  usb: musb: dsps: Resume early in noirq context
  usb: musb: host: Don't resume port on bus_resume()
  arm: dts: am335x-evm: Add pinmux configuration for uart1
  arm: dts: am33xx: update pinmux configuration for mmc1
  serial: omap-serial : Enhance pinctrl support
  arm: dts: am335x-evm: add sleep states for i2c-1
  arm: dts: am33xx: add pinctrl sleep states for nand
  arm: dts: am33xx: add sleep states for pwm-tiecap pins
  ARM: mach-omap2: gpmc: adopt pinctrl support
  arm: dts: am335x-evm: add sleep states for gpio-matrix-keypad
  arm: dts: am33xx: add sleep states for gpio-led pins
  leds: leds-gpio: Enhance pinctrl support
  ...

Conflicts:
	arch/arm/boot/dts/am335x-evmsk.dts

Signed-off-by: Dan Murphy <DMurphy@ti.com>

Showing 19 changed files Side-by-side Diff

arch/arm/boot/dts/am335x-bone-common.dtsi
... ... @@ -25,7 +25,7 @@
25 25 pinctrl-names = "default";
26 26 pinctrl-0 = <&clkout2_pin>;
27 27  
28   - user_leds_s0: user_leds_s0 {
  28 + user_leds_default: user_leds_default {
29 29 pinctrl-single,pins = <
30 30 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
31 31 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */
... ... @@ -34,6 +34,15 @@
34 34 >;
35 35 };
36 36  
  37 + user_leds_sleep: user_leds_sleep {
  38 + pinctrl-single,pins = <
  39 + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  40 + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  41 + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
  42 + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */
  43 + >;
  44 + };
  45 +
37 46 i2c0_pins: pinmux_i2c0_pins {
38 47 pinctrl-single,pins = <
39 48 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
40 49  
41 50  
... ... @@ -108,12 +117,32 @@
108 117 >;
109 118 };
110 119  
111   - mmc1_pins: pinmux_mmc1_pins {
  120 + mmc1_pins_default: pinmux_mmc1_pins {
112 121 pinctrl-single,pins = <
113   - 0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
  122 + 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  123 + 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  124 + 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  125 + 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  126 + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  127 + 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  128 + 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */
  129 + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
114 130 >;
115 131 };
116 132  
  133 + mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
  134 + pinctrl-single,pins = <
  135 + 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  136 + 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  137 + 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  138 + 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
  139 + 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  140 + 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  141 + 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  142 + 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  143 + >;
  144 + };
  145 +
117 146 emmc_pins: pinmux_emmc_pins {
118 147 pinctrl-single,pins = <
119 148 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
... ... @@ -205,8 +234,9 @@
205 234 };
206 235  
207 236 leds {
208   - pinctrl-names = "default";
209   - pinctrl-0 = <&user_leds_s0>;
  237 + pinctrl-names = "default", "sleep";
  238 + pinctrl-0 = <&user_leds_default>;
  239 + pinctrl-1 = <&user_leds_sleep>;
210 240  
211 241 compatible = "gpio-leds";
212 242  
... ... @@ -312,8 +342,9 @@
312 342 &mmc1 {
313 343 status = "okay";
314 344 bus-width = <0x4>;
315   - pinctrl-names = "default";
316   - pinctrl-0 = <&mmc1_pins>;
  345 + pinctrl-names = "default", "sleep";
  346 + pinctrl-0 = <&mmc1_pins_default>;
  347 + pinctrl-1 = <&mmc1_pins_sleep>;
317 348 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
318 349 cd-inverted;
319 350 };
arch/arm/boot/dts/am335x-evm.dts
... ... @@ -26,9 +26,9 @@
26 26  
27 27 am33xx_pinmux: pinmux@44e10800 {
28 28 pinctrl-names = "default";
29   - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin &mmc2_pins &wlan_pins>;
  29 + pinctrl-0 = <&volume_keys_s0 &clkout2_pin &mmc2_pins &wlan_pins>;
30 30  
31   - matrix_keypad_s0: matrix_keypad_s0 {
  31 + matrix_keypad_default: matrix_keypad_default {
32 32 pinctrl-single,pins = <
33 33 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
34 34 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
... ... @@ -38,6 +38,13 @@
38 38 >;
39 39 };
40 40  
  41 + matrix_keypad_sleep: matrix_keypad_sleep {
  42 + pinctrl-single,pins = <
  43 + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  44 + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  45 + >;
  46 + };
  47 +
41 48 volume_keys_s0: volume_keys_s0 {
42 49 pinctrl-single,pins = <
43 50 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
44 51  
... ... @@ -52,13 +59,20 @@
52 59 >;
53 60 };
54 61  
55   - i2c1_pins: pinmux_i2c1_pins {
  62 + i2c1_pins_default: pinmux_i2c1_pins {
56 63 pinctrl-single,pins = <
57 64 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
58 65 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
59 66 >;
60 67 };
61 68  
  69 + i2c1_pins_sleep: i2c1_pins_sleep {
  70 + pinctrl-single,pins = <
  71 + 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
  72 + 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
  73 + >;
  74 + };
  75 +
62 76 uart0_pins: pinmux_uart0_pins {
63 77 pinctrl-single,pins = <
64 78 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
... ... @@ -66,7 +80,7 @@
66 80 >;
67 81 };
68 82  
69   - uart1_pins: pinmux_uart1_pins {
  83 + uart1_pins_default: pinmux_uart1_pins_default {
70 84 pinctrl-single,pins = <
71 85 0x178 (PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
72 86 0x17C (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
73 87  
... ... @@ -75,13 +89,22 @@
75 89 >;
76 90 };
77 91  
  92 + uart1_pins_sleep: pinmux_uart1_pins_sleep {
  93 + pinctrl-single,pins = <
  94 + 0x178 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  95 + 0x17C (PIN_INPUT_PULLDOWN | MUX_MODE7)
  96 + 0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  97 + 0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  98 + >;
  99 + };
  100 +
78 101 clkout2_pin: pinmux_clkout2_pin {
79 102 pinctrl-single,pins = <
80 103 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
81 104 >;
82 105 };
83 106  
84   - nandflash_pins_s0: nandflash_pins_s0 {
  107 + nandflash_pins_default: nandflash_pins_default {
85 108 pinctrl-single,pins = <
86 109 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
87 110 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
88 111  
89 112  
... ... @@ -101,12 +124,38 @@
101 124 >;
102 125 };
103 126  
104   - ecap0_pins: backlight_pins {
  127 + nandflash_pins_sleep: nandflash_pins_sleep {
105 128 pinctrl-single,pins = <
  129 + 0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  130 + 0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  131 + 0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  132 + 0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
  133 + 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  134 + 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  135 + 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  136 + 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  137 + 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  138 + 0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  139 + 0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  140 + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  141 + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  142 + 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  143 + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  144 + >;
  145 + };
  146 +
  147 + ecap0_pins_default: backlight_pins {
  148 + pinctrl-single,pins = <
106 149 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
107 150 >;
108 151 };
109 152  
  153 + ecap0_pins_sleep: ecap0_pins_sleep {
  154 + pinctrl-single,pins = <
  155 + 0x164 (PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
  156 + >;
  157 + };
  158 +
110 159 cpsw_default: cpsw_default {
111 160 pinctrl-single,pins = <
112 161 /* Slave 1 */
113 162  
114 163  
... ... @@ -159,13 +208,32 @@
159 208 >;
160 209 };
161 210  
162   - mmc1_pins: pinmux_mmc1_pins {
  211 + mmc1_pins_default: pinmux_mmc1_pins {
163 212 pinctrl-single,pins = <
164   - 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
165   - 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */
  213 + 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  214 + 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  215 + 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  216 + 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  217 + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  218 + 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  219 + 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */
  220 + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
166 221 >;
167 222 };
168 223  
  224 + mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
  225 + pinctrl-single,pins = <
  226 + 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  227 + 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  228 + 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  229 + 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
  230 + 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  231 + 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  232 + 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  233 + 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  234 + >;
  235 + };
  236 +
169 237 lcd_pins_default: lcd_pins_default {
170 238 pinctrl-single,pins = <
171 239 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
... ... @@ -281,8 +349,9 @@
281 349 };
282 350  
283 351 uart1: serial@48022000 {
284   - pinctrl-names = "default";
285   - pinctrl-0 = <&uart1_pins>;
  352 + pinctrl-names = "default", "sleep";
  353 + pinctrl-0 = <&uart1_pins_default>;
  354 + pinctrl-1 = <&uart1_pins_sleep>;
286 355  
287 356 status = "okay";
288 357 };
... ... @@ -338,8 +407,9 @@
338 407 };
339 408  
340 409 i2c1: i2c@4802a000 {
341   - pinctrl-names = "default";
342   - pinctrl-0 = <&i2c1_pins>;
  410 + pinctrl-names = "default", "sleep";
  411 + pinctrl-0 = <&i2c1_pins_default>;
  412 + pinctrl-1 = <&i2c1_pins_sleep>;
343 413  
344 414 status = "okay";
345 415 clock-frequency = <100000>;
346 416  
... ... @@ -404,15 +474,17 @@
404 474  
405 475 ecap0: ecap@48300100 {
406 476 status = "okay";
407   - pinctrl-names = "default";
408   - pinctrl-0 = <&ecap0_pins>;
  477 + pinctrl-names = "default", "sleep";
  478 + pinctrl-0 = <&ecap0_pins_default>;
  479 + pinctrl-1 = <&ecap0_pins_sleep>;
409 480 };
410 481 };
411 482  
412 483 gpmc: gpmc@50000000 {
413 484 status = "okay";
414   - pinctrl-names = "default";
415   - pinctrl-0 = <&nandflash_pins_s0>;
  485 + pinctrl-names = "default", "sleep";
  486 + pinctrl-0 = <&nandflash_pins_default>;
  487 + pinctrl-1 = <&nandflash_pins_sleep>;
416 488 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
417 489 nand@0,0 {
418 490 reg = <0 0 0>; /* CS0, offset 0 */
... ... @@ -560,6 +632,10 @@
560 632 debounce-delay-ms = <5>;
561 633 col-scan-delay-us = <2>;
562 634  
  635 + pinctrl-names = "default", "sleep";
  636 + pinctrl-0 = <&matrix_keypad_default>;
  637 + pinctrl-1 = <&matrix_keypad_sleep>;
  638 +
563 639 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
564 640 &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
565 641 &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
... ... @@ -799,8 +875,9 @@
799 875 status = "okay";
800 876 vmmc-supply = <&vmmc_reg>;
801 877 bus-width = <4>;
802   - pinctrl-names = "default";
803   - pinctrl-0 = <&mmc1_pins>;
  878 + pinctrl-names = "default", "sleep";
  879 + pinctrl-0 = <&mmc1_pins_default>;
  880 + pinctrl-1 = <&mmc1_pins_sleep>;
804 881 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
805 882 wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
806 883 };
arch/arm/boot/dts/am335x-evmsk.dts
... ... @@ -107,7 +107,7 @@
107 107 >;
108 108 };
109 109  
110   - user_leds_s0: user_leds_s0 {
  110 + user_leds_default: user_leds_default {
111 111 pinctrl-single,pins = <
112 112 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
113 113 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
... ... @@ -116,6 +116,15 @@
116 116 >;
117 117 };
118 118  
  119 + user_leds_sleep: user_leds_sleep {
  120 + pinctrl-single,pins = <
  121 + 0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  122 + 0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  123 + 0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */
  124 + 0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a8.gpio1_24 */
  125 + >;
  126 + };
  127 +
119 128 gpio_keys_s0: gpio_keys_s0 {
120 129 pinctrl-single,pins = <
121 130 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
122 131  
... ... @@ -151,12 +160,18 @@
151 160 >;
152 161 };
153 162  
154   - ecap2_pins: backlight_pins {
  163 + ecap2_pins_default: backlight_pins {
155 164 pinctrl-single,pins = <
156 165 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */
157 166 >;
158 167 };
159 168  
  169 + ecap2_pins_sleep: ecap2_pins_sleep {
  170 + pinctrl-single,pins = <
  171 + 0x19c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
  172 + >;
  173 + };
  174 +
160 175 cpsw_default: cpsw_default {
161 176 pinctrl-single,pins = <
162 177 /* Slave 1 */
163 178  
164 179  
... ... @@ -237,12 +252,32 @@
237 252 >;
238 253 };
239 254  
240   - mmc1_pins: pinmux_mmc1_pins {
  255 + mmc1_pins_default: pinmux_mmc1_pins {
241 256 pinctrl-single,pins = <
242   - 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  257 + 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  258 + 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  259 + 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  260 + 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  261 + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  262 + 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  263 + 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */
  264 + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
243 265 >;
244 266 };
245 267  
  268 + mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
  269 + pinctrl-single,pins = <
  270 + 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  271 + 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  272 + 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  273 + 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
  274 + 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  275 + 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  276 + 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  277 + 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  278 + >;
  279 + };
  280 +
246 281 mcasp1_pins: mcasp1_pins {
247 282 pinctrl-single,pins = <
248 283 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
... ... @@ -367,8 +402,9 @@
367 402  
368 403 ecap2: ecap@48304100 {
369 404 status = "okay";
370   - pinctrl-names = "default";
371   - pinctrl-0 = <&ecap2_pins>;
  405 + pinctrl-names = "default", "sleep";
  406 + pinctrl-0 = <&ecap2_pins_default>;
  407 + pinctrl-1 = <&ecap2_pins_sleep>;
372 408 };
373 409 };
374 410  
... ... @@ -421,8 +457,9 @@
421 457 };
422 458  
423 459 leds {
424   - pinctrl-names = "default";
425   - pinctrl-0 = <&user_leds_s0>;
  460 + pinctrl-names = "default", "sleep";
  461 + pinctrl-0 = <&user_leds_default>;
  462 + pinctrl-1 = <&user_leds_sleep>;
426 463  
427 464 compatible = "gpio-leds";
428 465  
... ... @@ -617,8 +654,9 @@
617 654 status = "okay";
618 655 vmmc-supply = <&vmmc_reg>;
619 656 bus-width = <4>;
620   - pinctrl-names = "default";
621   - pinctrl-0 = <&mmc1_pins>;
  657 + pinctrl-names = "default", "sleep";
  658 + pinctrl-0 = <&mmc1_pins_default>;
  659 + pinctrl-1 = <&mmc1_pins_sleep>;
622 660 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
623 661 };
624 662  
arch/arm/boot/dts/am4372.dtsi
... ... @@ -1108,6 +1108,15 @@
1108 1108 status = "disabled";
1109 1109 };
1110 1110  
  1111 + hdq: hdq@48347000 {
  1112 + compatible = "ti,am43xx-hdq";
  1113 + reg = <0x48347000 0x1000>;
  1114 + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
  1115 + clocks = <&func_12m_clk>;
  1116 + clock-names = "fck";
  1117 + ti,hwmods = "hdq1w";
  1118 + status = "disabled";
  1119 + };
1111 1120 };
1112 1121  
1113 1122 clocks {
arch/arm/boot/dts/am43x-epos-evm.dts
... ... @@ -494,6 +494,12 @@
494 494 0x138 (PULL_UP | MUX_MODE7)
495 495 >;
496 496 };
  497 +
  498 + hdq_pins: pinmux_hdq_pins {
  499 + pinctrl-single,pins = <
  500 + 0x234 (PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
  501 + >;
  502 + };
497 503 };
498 504  
499 505 &gpio0 {
500 506  
501 507  
502 508  
503 509  
504 510  
... ... @@ -558,27 +564,27 @@
558 564 };
559 565 partition@4 {
560 566 label = "QSPI.u-boot";
561   - reg = <0x00040000 0x00180000>;
  567 + reg = <0x00040000 0x00100000>;
562 568 };
563 569 partition@5 {
564 570 label = "QSPI.u-boot-spl-os";
565   - reg = <0x001c0000 0x00010000>;
  571 + reg = <0x00150000 0x00010000>;
566 572 };
567 573 partition@6 {
568 574 label = "QSPI.u-boot-env";
569   - reg = <0x001d0000 0x00010000>;
  575 + reg = <0x00150000 0x00010000>;
570 576 };
571 577 partition@7 {
572 578 label = "QSPI.u-boot-env.backup1";
573   - reg = <0x001e0000 0x0010000>;
  579 + reg = <0x00160000 0x0010000>;
574 580 };
575 581 partition@8 {
576 582 label = "QSPI.kernel";
577   - reg = <0x001f0000 0x00500000>;
  583 + reg = <0x00170000 0x00800000>;
578 584 };
579 585 partition@9 {
580 586 label = "QSPI.file-system";
581   - reg = <0x006f0000 0x03910000>;
  587 + reg = <0x00970000 0x03690000>;
582 588 };
583 589 };
584 590 };
... ... @@ -918,5 +924,11 @@
918 924  
919 925 &clkout_32k_mux_ck {
920 926 clock-default = <&clk_32k_tpm_ck>;
  927 +};
  928 +
  929 +&hdq {
  930 + status = "okay";
  931 + pinctrl-names = "default";
  932 + pinctrl-0 = <&hdq_pins>;
921 933 };
arch/arm/boot/dts/dra7-evm.dts
... ... @@ -681,27 +681,27 @@
681 681 };
682 682 partition@4 {
683 683 label = "QSPI.u-boot";
684   - reg = <0x00040000 0x00180000>;
  684 + reg = <0x00040000 0x00100000>;
685 685 };
686 686 partition@5 {
687 687 label = "QSPI.u-boot-spl-os";
688   - reg = <0x001c0000 0x00010000>;
  688 + reg = <0x00140000 0x00010000>;
689 689 };
690 690 partition@6 {
691 691 label = "QSPI.u-boot-env";
692   - reg = <0x001d0000 0x00010000>;
  692 + reg = <0x00150000 0x00010000>;
693 693 };
694 694 partition@7 {
695 695 label = "QSPI.u-boot-env.backup1";
696   - reg = <0x001e0000 0x0010000>;
  696 + reg = <0x00160000 0x0010000>;
697 697 };
698 698 partition@8 {
699 699 label = "QSPI.kernel";
700   - reg = <0x001f0000 0x00500000>;
  700 + reg = <0x00170000 0x00970000>;
701 701 };
702 702 partition@9 {
703 703 label = "QSPI.file-system";
704   - reg = <0x006f0000 0x01910000>;
  704 + reg = <0x00970000 0x01690000>;
705 705 };
706 706 };
707 707 };
arch/arm/mach-omap2/gpmc.c
... ... @@ -31,6 +31,7 @@
31 31 #include <linux/of_device.h>
32 32 #include <linux/mtd/nand.h>
33 33 #include <linux/pm_runtime.h>
  34 +#include <linux/pinctrl/consumer.h>
34 35  
35 36 #include <linux/platform_data/mtd-nand-omap2.h>
36 37  
37 38  
... ... @@ -1699,11 +1700,18 @@
1699 1700 {
1700 1701 omap3_gpmc_save_context();
1701 1702 pm_runtime_put_sync(dev);
  1703 +
  1704 + /* Select sleep pin state */
  1705 + pinctrl_pm_select_sleep_state(dev);
  1706 +
1702 1707 return 0;
1703 1708 }
1704 1709  
1705 1710 static int gpmc_resume(struct device *dev)
1706 1711 {
  1712 + /* Select default pin state */
  1713 + pinctrl_pm_select_default_state(dev);
  1714 +
1707 1715 pm_runtime_get_sync(dev);
1708 1716 omap3_gpmc_restore_context();
1709 1717 return 0;
arch/arm/mach-omap2/hdq1w.c
... ... @@ -75,24 +75,4 @@
75 75  
76 76 return 0;
77 77 }
78   -
79   -static int __init omap_init_hdq(void)
80   -{
81   - int id = -1;
82   - struct platform_device *pdev;
83   - struct omap_hwmod *oh;
84   - char *oh_name = "hdq1w";
85   - char *devname = "omap_hdq";
86   -
87   - oh = omap_hwmod_lookup(oh_name);
88   - if (!oh)
89   - return 0;
90   -
91   - pdev = omap_device_build(devname, id, oh, NULL, 0);
92   - WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
93   - devname, oh->name);
94   -
95   - return 0;
96   -}
97   -omap_arch_initcall(omap_init_hdq);
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
... ... @@ -31,6 +31,7 @@
31 31 #include "mmc.h"
32 32 #include "wd_timer.h"
33 33 #include "soc.h"
  34 +#include "hdq1w.h"
34 35  
35 36 /*
36 37 * IP blocks
... ... @@ -1235,6 +1236,32 @@
1235 1236 },
1236 1237 };
1237 1238  
  1239 +static struct omap_hwmod_class_sysconfig am43xx_hdq1w_sysc = {
  1240 + .rev_offs = 0x0000,
  1241 + .sysc_offs = 0x0014,
  1242 + .syss_offs = 0x0018,
  1243 + .sysc_flags = (SYSC_HAS_SOFTRESET),
  1244 + .sysc_fields = &omap_hwmod_sysc_type4,
  1245 +};
  1246 +
  1247 +static struct omap_hwmod_class am43xx_hdq1w_hwmod_class = {
  1248 + .name = "hdq1w",
  1249 + .sysc = &am43xx_hdq1w_sysc,
  1250 + .reset = &omap_hdq1w_reset,
  1251 +};
  1252 +
  1253 +static struct omap_hwmod am43xx_hdq1w_hwmod = {
  1254 + .name = "hdq1w",
  1255 + .class = &am43xx_hdq1w_hwmod_class,
  1256 + .clkdm_name = "l4ls_clkdm",
  1257 + .prcm = {
  1258 + .omap4 = {
  1259 + .clkctrl_offs = AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET,
  1260 + .modulemode = MODULEMODE_SWCTRL,
  1261 + },
  1262 + },
  1263 +};
  1264 +
1238 1265 /* 'ocp2scp' class
1239 1266 *
1240 1267 */
... ... @@ -2496,6 +2523,14 @@
2496 2523 .user = OCP_USER_MPU | OCP_USER_SDMA,
2497 2524 };
2498 2525  
  2526 +/* l4_per -> hdq1w */
  2527 +static struct omap_hwmod_ocp_if am43xx_l4_ls__hdq1w = {
  2528 + .master = &am33xx_l4_ls_hwmod,
  2529 + .slave = &am43xx_hdq1w_hwmod,
  2530 + .clk = "l4ls_gclk",
  2531 + .user = OCP_USER_MPU | OCP_USER_SDMA,
  2532 +};
  2533 +
2499 2534 /* l3_main_1 -> usb_otg_ss0 */
2500 2535 static struct omap_hwmod_ocp_if am43xx_l3_s__usbotgss0 = {
2501 2536 .master = &am33xx_l3_s_hwmod,
... ... @@ -3276,6 +3311,7 @@
3276 3311 &am43xx_l4_ls__dss_rfbi,
3277 3312 &am43xx_l3__vpfe0,
3278 3313 &am43xx_l3__vpfe1,
  3314 + &am43xx_l4_ls__hdq1w,
3279 3315 NULL,
3280 3316 };
3281 3317  
arch/arm/mach-omap2/prcm43xx.h
... ... @@ -147,6 +147,7 @@
147 147 #define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20
148 148 #define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET 0x0068
149 149 #define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET 0x0070
  150 +#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0
150 151  
151 152 #endif
drivers/dma/cppi41.c
... ... @@ -620,12 +620,15 @@
620 620 u32 desc_phys;
621 621 int ret;
622 622  
  623 + desc_phys = lower_32_bits(c->desc_phys);
  624 + desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
  625 + if (!cdd->chan_busy[desc_num])
  626 + return 0;
  627 +
623 628 ret = cppi41_tear_down_chan(c);
624 629 if (ret)
625 630 return ret;
626 631  
627   - desc_phys = lower_32_bits(c->desc_phys);
628   - desc_num = (desc_phys - cdd->descs_phys) / sizeof(struct cppi41_desc);
629 632 WARN_ON(!cdd->chan_busy[desc_num]);
630 633 cdd->chan_busy[desc_num] = NULL;
631 634  
drivers/leds/leds-gpio.c
... ... @@ -20,6 +20,7 @@
20 20 #include <linux/slab.h>
21 21 #include <linux/workqueue.h>
22 22 #include <linux/module.h>
  23 +#include <linux/pinctrl/consumer.h>
23 24 #include <linux/err.h>
24 25  
25 26 struct gpio_led_data {
... ... @@ -279,6 +280,26 @@
279 280 return 0;
280 281 }
281 282  
  283 +#ifdef CONFIG_PM_SLEEP
  284 +static int gpio_led_suspend(struct device *dev)
  285 +{
  286 + /* Select sleep pin state */
  287 + pinctrl_pm_select_sleep_state(dev);
  288 +
  289 + return 0;
  290 +}
  291 +
  292 +static int gpio_led_resume(struct device *dev)
  293 +{
  294 + /* Select default pin state */
  295 + pinctrl_pm_select_default_state(dev);
  296 +
  297 + return 0;
  298 +}
  299 +#endif
  300 +
  301 +static SIMPLE_DEV_PM_OPS(gpio_led_pm_ops, gpio_led_suspend, gpio_led_resume);
  302 +
282 303 static struct platform_driver gpio_led_driver = {
283 304 .probe = gpio_led_probe,
284 305 .remove = gpio_led_remove,
... ... @@ -286,6 +307,7 @@
286 307 .name = "leds-gpio",
287 308 .owner = THIS_MODULE,
288 309 .of_match_table = of_match_ptr(of_gpio_leds_match),
  310 + .pm = &gpio_led_pm_ops,
289 311 },
290 312 };
291 313  
drivers/tty/serial/omap-serial.c
... ... @@ -1446,12 +1446,18 @@
1446 1446 uart_suspend_port(&serial_omap_reg, &up->port);
1447 1447 flush_work(&up->qos_work);
1448 1448  
  1449 + /* Select sleep pin state */
  1450 + pinctrl_pm_select_sleep_state(dev);
  1451 +
1449 1452 return 0;
1450 1453 }
1451 1454  
1452 1455 static int serial_omap_resume(struct device *dev)
1453 1456 {
1454 1457 struct uart_omap_port *up = dev_get_drvdata(dev);
  1458 +
  1459 + /* Select default pin state */
  1460 + pinctrl_pm_select_default_state(dev);
1455 1461  
1456 1462 uart_resume_port(&serial_omap_reg, &up->port);
1457 1463  
drivers/usb/musb/musb_cppi41.c
... ... @@ -87,7 +87,8 @@
87 87 struct musb_hw_ep *hw_ep = cppi41_channel->hw_ep;
88 88 struct musb *musb = hw_ep->musb;
89 89  
90   - if (!cppi41_channel->prog_len) {
  90 + if (!cppi41_channel->prog_len ||
  91 + (cppi41_channel->channel.status == MUSB_DMA_STATUS_FREE)) {
91 92  
92 93 /* done, complete */
93 94 cppi41_channel->channel.actual_len =
drivers/usb/musb/musb_dsps.c
... ... @@ -801,7 +801,7 @@
801 801 };
802 802 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
803 803  
804   -#ifdef CONFIG_PM
  804 +#ifdef CONFIG_PM_SLEEP
805 805 static int dsps_suspend(struct device *dev)
806 806 {
807 807 struct dsps_glue *glue = dev_get_drvdata(dev);
808 808  
809 809  
... ... @@ -817,16 +817,18 @@
817 817 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
818 818 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
819 819  
  820 + usb_phy_shutdown(musb->xceiv);
820 821 return 0;
821 822 }
822 823  
823   -static int dsps_resume(struct device *dev)
  824 +static int dsps_resume_noirq(struct device *dev)
824 825 {
825 826 struct dsps_glue *glue = dev_get_drvdata(dev);
826 827 const struct dsps_musb_wrapper *wrp = glue->wrp;
827 828 struct musb *musb = platform_get_drvdata(glue->musb);
828 829 void __iomem *mbase = musb->ctrl_base;
829 830  
  831 + usb_phy_init(musb->xceiv);
830 832 dsps_writel(mbase, wrp->control, glue->context.control);
831 833 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
832 834 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
... ... @@ -839,7 +841,12 @@
839 841 }
840 842 #endif
841 843  
842   -static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
  844 +static const struct dev_pm_ops dsps_pm_ops = {
  845 +#ifdef CONFIG_PM_SLEEP
  846 + .suspend = dsps_suspend,
  847 + .resume_noirq = dsps_resume_noirq,
  848 +#endif
  849 +};
843 850  
844 851 static struct platform_driver dsps_usbss_driver = {
845 852 .probe = dsps_probe,
drivers/usb/musb/musb_host.c
... ... @@ -2490,12 +2490,6 @@
2490 2490  
2491 2491 static int musb_bus_resume(struct usb_hcd *hcd)
2492 2492 {
2493   - struct musb *musb = hcd_to_musb(hcd);
2494   -
2495   - if (musb->config &&
2496   - musb->config->host_port_deassert_reset_at_resume)
2497   - musb_port_reset(musb, false);
2498   -
2499 2493 return 0;
2500 2494 }
2501 2495  
drivers/usb/musb/musb_host.h
... ... @@ -93,7 +93,6 @@
93 93 extern void musb_host_resume_root_hub(struct musb *musb);
94 94 extern void musb_host_poke_root_hub(struct musb *musb);
95 95 extern void musb_port_suspend(struct musb *musb, bool do_suspend);
96   -extern void musb_port_reset(struct musb *musb, bool do_reset);
97 96 #else
98 97 static inline struct musb *hcd_to_musb(struct usb_hcd *hcd)
99 98 {
... ... @@ -124,7 +123,6 @@
124 123 static inline void musb_host_poll_rh_status(struct musb *musb) {}
125 124 static inline void musb_host_poke_root_hub(struct musb *musb) {}
126 125 static inline void musb_port_suspend(struct musb *musb, bool do_suspend) {}
127   -static inline void musb_port_reset(struct musb *musb) {}
128 126 #endif
129 127  
130 128 struct usb_hcd;
drivers/usb/phy/phy-am335x.c
... ... @@ -106,8 +106,6 @@
106 106 if (device_may_wakeup(dev))
107 107 phy_ctrl_wkup(am_phy->phy_ctrl, am_phy->id, true);
108 108  
109   - phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, false);
110   -
111 109 return 0;
112 110 }
113 111  
... ... @@ -115,8 +113,6 @@
115 113 {
116 114 struct platform_device *pdev = to_platform_device(dev);
117 115 struct am335x_phy *am_phy = platform_get_drvdata(pdev);
118   -
119   - phy_ctrl_power(am_phy->phy_ctrl, am_phy->id, true);
120 116  
121 117 if (device_may_wakeup(dev))
122 118 phy_ctrl_wkup(am_phy->phy_ctrl, am_phy->id, false);
drivers/w1/masters/omap_hdq.c
... ... @@ -17,6 +17,7 @@
17 17 #include <linux/io.h>
18 18 #include <linux/sched.h>
19 19 #include <linux/pm_runtime.h>
  20 +#include <linux/of.h>
20 21  
21 22 #include "../w1.h"
22 23 #include "../w1_int.h"
23 24  
24 25  
25 26  
... ... @@ -27,21 +28,22 @@
27 28 #define OMAP_HDQ_TX_DATA 0x04
28 29 #define OMAP_HDQ_RX_DATA 0x08
29 30 #define OMAP_HDQ_CTRL_STATUS 0x0c
30   -#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (1<<6)
31   -#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (1<<5)
32   -#define OMAP_HDQ_CTRL_STATUS_GO (1<<4)
33   -#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION (1<<2)
34   -#define OMAP_HDQ_CTRL_STATUS_DIR (1<<1)
35   -#define OMAP_HDQ_CTRL_STATUS_MODE (1<<0)
  31 +#define OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK (1 << 6)
  32 +#define OMAP_HDQ_CTRL_STATUS_CLOCKENABLE (1 << 5)
  33 +#define OMAP_HDQ_CTRL_STATUS_PRESENCE (1 << 3)
  34 +#define OMAP_HDQ_CTRL_STATUS_GO (1 << 4)
  35 +#define OMAP_HDQ_CTRL_STATUS_INITIALIZATION (1 << 2)
  36 +#define OMAP_HDQ_CTRL_STATUS_DIR (1 << 1)
  37 +#define OMAP_HDQ_CTRL_STATUS_MODE (1 << 0)
36 38 #define OMAP_HDQ_INT_STATUS 0x10
37   -#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (1<<2)
38   -#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (1<<1)
39   -#define OMAP_HDQ_INT_STATUS_TIMEOUT (1<<0)
  39 +#define OMAP_HDQ_INT_STATUS_TXCOMPLETE (1 << 2)
  40 +#define OMAP_HDQ_INT_STATUS_RXCOMPLETE (1 << 1)
  41 +#define OMAP_HDQ_INT_STATUS_TIMEOUT (1 << 0)
40 42 #define OMAP_HDQ_SYSCONFIG 0x14
41   -#define OMAP_HDQ_SYSCONFIG_SOFTRESET (1<<1)
42   -#define OMAP_HDQ_SYSCONFIG_AUTOIDLE (1<<0)
  43 +#define OMAP_HDQ_SYSCONFIG_SOFTRESET (1 << 1)
  44 +#define OMAP_HDQ_SYSCONFIG_AUTOIDLE (1 << 0)
43 45 #define OMAP_HDQ_SYSSTATUS 0x18
44   -#define OMAP_HDQ_SYSSTATUS_RESETDONE (1<<0)
  46 +#define OMAP_HDQ_SYSSTATUS_RESETDONE (1 << 0)
45 47  
46 48 #define OMAP_HDQ_FLAG_CLEAR 0
47 49 #define OMAP_HDQ_FLAG_SET 1
48 50  
... ... @@ -72,11 +74,18 @@
72 74 static int omap_hdq_probe(struct platform_device *pdev);
73 75 static int omap_hdq_remove(struct platform_device *pdev);
74 76  
  77 +static const struct of_device_id omap_hdq_dt_match[] = {
  78 + { .compatible = "ti,am43xx-hdq"},
  79 + {},
  80 +};
  81 +MODULE_DEVICE_TABLE(of, omap_hdq_dt_match);
  82 +
75 83 static struct platform_driver omap_hdq_driver = {
76 84 .probe = omap_hdq_probe,
77 85 .remove = omap_hdq_remove,
78 86 .driver = {
79 87 .name = "omap_hdq",
  88 + .of_match_table = of_match_ptr(omap_hdq_dt_match),
80 89 },
81 90 };
82 91  
... ... @@ -115,6 +124,15 @@
115 124 return new_val;
116 125 }
117 126  
  127 +static void hdq_disable_interrupt(struct hdq_data *hdq_data, u32 offset,
  128 + u8 mask)
  129 +{
  130 + u32 ie;
  131 +
  132 + ie = readl(hdq_data->hdq_base + offset);
  133 + writel(ie & mask, hdq_data->hdq_base + offset);
  134 +}
  135 +
118 136 /*
119 137 * Wait for one or more bits in flag change.
120 138 * HDQ_FLAG_SET: wait until any bit in the flag is set.
... ... @@ -263,8 +281,7 @@
263 281 * interrupt.
264 282 */
265 283 hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS,
266   - OMAP_HDQ_CTRL_STATUS_CLOCKENABLE |
267   - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK);
  284 + OMAP_HDQ_CTRL_STATUS_CLOCKENABLE);
268 285  
269 286 /* wait for reset to complete */
270 287 ret = hdq_wait_for_flag(hdq_data, OMAP_HDQ_SYSSTATUS,
... ... @@ -275,7 +292,8 @@
275 292 else {
276 293 hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS,
277 294 OMAP_HDQ_CTRL_STATUS_CLOCKENABLE |
278   - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK);
  295 + OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK |
  296 + OMAP_HDQ_CTRL_STATUS_MODE);
279 297 hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG,
280 298 OMAP_HDQ_SYSCONFIG_AUTOIDLE);
281 299 }
282 300  
... ... @@ -327,7 +345,19 @@
327 345 ret = -ETIMEDOUT;
328 346 goto out;
329 347 }
  348 +
330 349 /*
  350 + * check for the presence detect bit to get
  351 + * set to show that the slave is responding
  352 + */
  353 + if (hdq_reg_in(hdq_data, OMAP_HDQ_CTRL_STATUS) &
  354 + OMAP_HDQ_CTRL_STATUS_PRESENCE) {
  355 + dev_dbg(hdq_data->dev, "Presence bit not set\n");
  356 + ret = -ETIMEDOUT;
  357 + goto out;
  358 + }
  359 +
  360 + /*
331 361 * wait for both INIT and GO bits rerurn to zero.
332 362 * zero wait time expected for interrupt mode.
333 363 */
... ... @@ -361,6 +391,8 @@
361 391 goto out;
362 392 }
363 393  
  394 + hdq_data->hdq_irqstatus = 0;
  395 +
364 396 if (!(hdq_data->hdq_irqstatus & OMAP_HDQ_INT_STATUS_RXCOMPLETE)) {
365 397 hdq_reg_merge(hdq_data, OMAP_HDQ_CTRL_STATUS,
366 398 OMAP_HDQ_CTRL_STATUS_DIR | OMAP_HDQ_CTRL_STATUS_GO,
... ... @@ -426,7 +458,8 @@
426 458 /* select HDQ mode & enable clocks */
427 459 hdq_reg_out(hdq_data, OMAP_HDQ_CTRL_STATUS,
428 460 OMAP_HDQ_CTRL_STATUS_CLOCKENABLE |
429   - OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK);
  461 + OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK |
  462 + OMAP_HDQ_CTRL_STATUS_MODE);
430 463 hdq_reg_out(hdq_data, OMAP_HDQ_SYSCONFIG,
431 464 OMAP_HDQ_SYSCONFIG_AUTOIDLE);
432 465 hdq_reg_in(hdq_data, OMAP_HDQ_INT_STATUS);
... ... @@ -471,6 +504,10 @@
471 504 u8 val = 0;
472 505 int ret;
473 506  
  507 + /* First write to initialize the transfer */
  508 + if (hdq_data->init_trans == 0)
  509 + omap_hdq_get(hdq_data);
  510 +
474 511 ret = hdq_read_byte(hdq_data, &val);
475 512 if (ret) {
476 513 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);
... ... @@ -484,6 +521,10 @@
484 521 return -1;
485 522 }
486 523  
  524 + hdq_disable_interrupt(hdq_data, OMAP_HDQ_CTRL_STATUS,
  525 + ~OMAP_HDQ_CTRL_STATUS_INTERRUPTMASK);
  526 + hdq_data->hdq_usecount = 0;
  527 +
487 528 /* Write followed by a read, release the module */
488 529 if (hdq_data->init_trans) {
489 530 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);
... ... @@ -510,6 +551,14 @@
510 551 if (hdq_data->init_trans == 0)
511 552 omap_hdq_get(hdq_data);
512 553  
  554 + /*
  555 + * We need to reset the slave before
  556 + * issuing the SKIP ROM command, else
  557 + * the slave will not work.
  558 + */
  559 + if (byte == W1_SKIP_ROM)
  560 + omap_hdq_break(hdq_data);
  561 +
513 562 ret = mutex_lock_interruptible(&hdq_data->hdq_mutex);
514 563 if (ret < 0) {
515 564 dev_dbg(hdq_data->dev, "Could not acquire mutex\n");
... ... @@ -563,7 +612,17 @@
563 612 mutex_init(&hdq_data->hdq_mutex);
564 613  
565 614 pm_runtime_enable(&pdev->dev);
566   - pm_runtime_get_sync(&pdev->dev);
  615 + ret = pm_runtime_get_sync(&pdev->dev);
  616 + if (ret < 0) {
  617 + dev_dbg(&pdev->dev, "pm_runtime_get_sync failed\n");
  618 + goto err_w1;
  619 + }
  620 +
  621 + ret = _omap_hdq_reset(hdq_data);
  622 + if (ret) {
  623 + dev_dbg(&pdev->dev, "reset failed\n");
  624 + return -EINVAL;
  625 + }
567 626  
568 627 rev = hdq_reg_in(hdq_data, OMAP_HDQ_REVISION);
569 628 dev_info(&pdev->dev, "OMAP HDQ Hardware Rev %c.%c. Driver in %s mode\n",