Merge branch 'drm-fixes-3.7' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

Alex writes: "Fixes pull request for radeon. The main things here are fixing a ATPX regression from the acpi rework, fixing some fallout from the async VM work, and fixing some module options that were broken in certain cases. Other than that, mainly just bug fixes." * 'drm-fixes-3.7' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: fix ATPX regression in acpi rework drm/radeon: fix ATPX function documentation drm/radeon: move the retry to gem_object_create drm/radeon: move size limits to gem_object_create. drm/radeon: use vzalloc for gart pages drm/radeon: fix and simplify pot argument checks v3 drm/radeon: fix header size estimation in VM code drm/radeon: remove set_page check from VM code drm/radeon: fix si_set_page v2 drm/radeon: fix cayman_vm_set_page v2 drm/radeon: fix PFP sync in vm_flush drm/radeon: add error output if VM CS fails on cayman drm/radeon: give each backlight a unique id drm/radeon: fix sparse warning drm/radeon: add some new SI PCI ids

Merge branch 'drm-fixes-3.7' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Alex writes: "Fixes pull request for radeon. The main things here are fixing a ATPX regression from the acpi rework, fixing some fallout from the async VM work, and fixing some module options that were broken in certain cases. Other than that, mainly just bug fixes." * 'drm-fixes-3.7' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: fix ATPX regression in acpi rework drm/radeon: fix ATPX function documentation drm/radeon: move the retry to gem_object_create drm/radeon: move size limits to gem_object_create. drm/radeon: use vzalloc for gart pages drm/radeon: fix and simplify pot argument checks v3 drm/radeon: fix header size estimation in VM code drm/radeon: remove set_page check from VM code drm/radeon: fix si_set_page v2 drm/radeon: fix cayman_vm_set_page v2 drm/radeon: fix PFP sync in vm_flush drm/radeon: add error output if VM CS fails on cayman drm/radeon: give each backlight a unique id drm/radeon: fix sparse warning drm/radeon: add some new SI PCI ids
Dave Airlie
2 parents b8e902f24f 0b90365e7a
Showing 12 changed files Side-by-side Diff
drivers/gpu/drm/radeon/atombios_encoders.c
drivers/gpu/drm/radeon/evergreen_cs.c
drivers/gpu/drm/radeon/ni.c
drivers/gpu/drm/radeon/nid.h
drivers/gpu/drm/radeon/radeon_atpx_handler.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_gart.c
drivers/gpu/drm/radeon/radeon_gem.c
drivers/gpu/drm/radeon/radeon_legacy_encoders.c
drivers/gpu/drm/radeon/radeon_object.c
drivers/gpu/drm/radeon/si.c
include/drm/drm_pciids.h
@@ -184,6 +184,7 @@
 	struct radeon_backlight_privdata *pdata;
 	struct radeon_encoder_atom_dig *dig;
 	u8 backlight_level;
+	char bl_name[16];
  
 	if (!radeon_encoder->enc_priv)
 		return;
@@ -203,7 +204,9 @@
 	memset(&props, 0, sizeof(props));
 	props.max_brightness = RADEON_MAX_BL_LEVEL;
 	props.type = BACKLIGHT_RAW;
-	bd = backlight_device_register("radeon_bl", &drm_connector->kdev,
+	snprintf(bl_name, sizeof(bl_name),
+		 "radeon_bl%d", dev->primary->index);
+	bd = backlight_device_register(bl_name, &drm_connector->kdev,
 				       pdata, &radeon_atom_backlight_ops, &props);
 	if (IS_ERR(bd)) {
 		DRM_ERROR("Backlight registration failed\n");
@@ -2829,6 +2829,7 @@
 	case CAYMAN_SQ_EX_ALLOC_TABLE_SLOTS:
 		return true;
 	default:
+		DRM_ERROR("Invalid register 0x%x in CS\n", reg);
 		return false;
 	}
 }
@@ -1538,26 +1538,31 @@
 {
 	struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];
 	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);
-	int i;
  
-	radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, 1 + count * 2));
-	radeon_ring_write(ring, pe);
-	radeon_ring_write(ring, upper_32_bits(pe) & 0xff);
-	for (i = 0; i < count; ++i) {
-		uint64_t value = 0;
-		if (flags & RADEON_VM_PAGE_SYSTEM) {
-			value = radeon_vm_map_gart(rdev, addr);
-			value &= 0xFFFFFFFFFFFFF000ULL;
-			addr += incr;
+	while (count) {
+		unsigned ndw = 1 + count * 2;
+		if (ndw > 0x3FFF)
+			ndw = 0x3FFF;
  
-		} else if (flags & RADEON_VM_PAGE_VALID) {
-			value = addr;
-			addr += incr;
-		}
+		radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, ndw));
+		radeon_ring_write(ring, pe);
+		radeon_ring_write(ring, upper_32_bits(pe) & 0xff);
+		for (; ndw > 1; ndw -= 2, --count, pe += 8) {
+			uint64_t value = 0;
+			if (flags & RADEON_VM_PAGE_SYSTEM) {
+				value = radeon_vm_map_gart(rdev, addr);
+				value &= 0xFFFFFFFFFFFFF000ULL;
+				addr += incr;
  
-		value |= r600_flags;
-		radeon_ring_write(ring, value);
-		radeon_ring_write(ring, upper_32_bits(value));
+			} else if (flags & RADEON_VM_PAGE_VALID) {
+				value = addr;
+				addr += incr;
+			}
+
+			value |= r600_flags;
+			radeon_ring_write(ring, value);
+			radeon_ring_write(ring, upper_32_bits(value));
+		}
 	}
 }
  
@@ -1586,5 +1591,9 @@
 	/* bits 0-7 are the VM contexts0-7 */
 	radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0));
 	radeon_ring_write(ring, 1 << vm->id);
+
+	/* sync PFP to ME, otherwise we might get invalid PFP reads */
+	radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+	radeon_ring_write(ring, 0x0);
 }
@@ -502,6 +502,7 @@
 #define	PACKET3_MPEG_INDEX				0x3A
 #define	PACKET3_WAIT_REG_MEM				0x3C
 #define	PACKET3_MEM_WRITE				0x3D
+#define	PACKET3_PFP_SYNC_ME				0x42
 #define	PACKET3_SURFACE_SYNC				0x43
 #              define PACKET3_CB0_DEST_BASE_ENA    (1 << 6)
 #              define PACKET3_CB1_DEST_BASE_ENA    (1 << 7)
@@ -87,7 +87,7 @@
 		atpx_arg_elements[1].integer.value = 0;
 	}
  
-	status = acpi_evaluate_object(handle, "ATPX", &atpx_arg, &buffer);
+	status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
  
 	/* Fail only if calling the method fails and ATPX is supported */
 	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
  
@@ -373,11 +373,11 @@
 }
  
 /**
- * radeon_atpx_pci_probe_handle - look up the ATRM and ATPX handles
+ * radeon_atpx_pci_probe_handle - look up the ATPX handle
  *
  * @pdev: pci device
  *
- * Look up the ATPX and ATRM handles (all asics).
+ * Look up the ATPX handles (all asics).
  * Returns true if the handles are found, false if not.
  */
 static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
@@ -355,6 +355,8 @@
  */
 void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 base)
 {
+	uint64_t limit = (uint64_t)radeon_vram_limit << 20;
+
 	mc->vram_start = base;
 	if (mc->mc_vram_size > (0xFFFFFFFF - base + 1)) {
 		dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n");
@@ -368,8 +370,8 @@
 		mc->mc_vram_size = mc->aper_size;
 	}
 	mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;
-	if (radeon_vram_limit && radeon_vram_limit < mc->real_vram_size)
-		mc->real_vram_size = radeon_vram_limit;
+	if (limit && limit < mc->real_vram_size)
+		mc->real_vram_size = limit;
 	dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n",
 			mc->mc_vram_size >> 20, mc->vram_start,
 			mc->vram_end, mc->real_vram_size >> 20);
@@ -835,6 +837,19 @@
 }
  
 /**
+ * radeon_check_pot_argument - check that argument is a power of two
+ *
+ * @arg: value to check
+ *
+ * Validates that a certain argument is a power of two (all asics).
+ * Returns true if argument is valid.
+ */
+static bool radeon_check_pot_argument(int arg)
+{
+	return (arg & (arg - 1)) == 0;
+}
+
+/**
  * radeon_check_arguments - validate module params
  *
  * @rdev: radeon_device pointer
  
  
  
  
  
  
@@ -845,52 +860,25 @@
 static void radeon_check_arguments(struct radeon_device *rdev)
 {
 	/* vramlimit must be a power of two */
-	switch (radeon_vram_limit) {
-	case 0:
-	case 4:
-	case 8:
-	case 16:
-	case 32:
-	case 64:
-	case 128:
-	case 256:
-	case 512:
-	case 1024:
-	case 2048:
-	case 4096:
-		break;
-	default:
+	if (!radeon_check_pot_argument(radeon_vram_limit)) {
 		dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
 				radeon_vram_limit);
 		radeon_vram_limit = 0;
-		break;
 	}
-	radeon_vram_limit = radeon_vram_limit << 20;
+
 	/* gtt size must be power of two and greater or equal to 32M */
-	switch (radeon_gart_size) {
-	case 4:
-	case 8:
-	case 16:
+	if (radeon_gart_size < 32) {
 		dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n",
 				radeon_gart_size);
 		radeon_gart_size = 512;
-		break;
-	case 32:
-	case 64:
-	case 128:
-	case 256:
-	case 512:
-	case 1024:
-	case 2048:
-	case 4096:
-		break;
-	default:
+
+	} else if (!radeon_check_pot_argument(radeon_gart_size)) {
 		dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
 				radeon_gart_size);
 		radeon_gart_size = 512;
-		break;
 	}
-	rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
+	rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
+
 	/* AGP mode can only be -1, 1, 2, 4, 8 */
 	switch (radeon_agpmode) {
 	case -1:
@@ -355,14 +355,13 @@
 	DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
 		 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
 	/* Allocate pages table */
-	rdev->gart.pages = kzalloc(sizeof(void *) * rdev->gart.num_cpu_pages,
-				   GFP_KERNEL);
+	rdev->gart.pages = vzalloc(sizeof(void *) * rdev->gart.num_cpu_pages);
 	if (rdev->gart.pages == NULL) {
 		radeon_gart_fini(rdev);
 		return -ENOMEM;
 	}
-	rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) *
-					rdev->gart.num_cpu_pages, GFP_KERNEL);
+	rdev->gart.pages_addr = vzalloc(sizeof(dma_addr_t) *
+					rdev->gart.num_cpu_pages);
 	if (rdev->gart.pages_addr == NULL) {
 		radeon_gart_fini(rdev);
 		return -ENOMEM;
@@ -388,8 +387,8 @@
 		radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
 	}
 	rdev->gart.ready = false;
-	kfree(rdev->gart.pages);
-	kfree(rdev->gart.pages_addr);
+	vfree(rdev->gart.pages);
+	vfree(rdev->gart.pages_addr);
 	rdev->gart.pages = NULL;
 	rdev->gart.pages_addr = NULL;
  
@@ -577,7 +576,7 @@
  *
  * Global and local mutex must be locked!
  */
-int radeon_vm_evict(struct radeon_device *rdev, struct radeon_vm *vm)
+static int radeon_vm_evict(struct radeon_device *rdev, struct radeon_vm *vm)
 {
 	struct radeon_vm *vm_evict;
  
@@ -1036,8 +1035,7 @@
 		pte = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
 		pte += (addr & mask) * 8;
  
-		if (((last_pte + 8 * count) != pte) ||
-		    ((count + nptes) > 1 << 11)) {
+		if ((last_pte + 8 * count) != pte) {
  
 			if (count) {
 				radeon_asic_vm_set_page(rdev, last_pte,
  
  
@@ -1148,17 +1146,17 @@
  
 	if (RADEON_VM_BLOCK_SIZE > 11)
 		/* reserve space for one header for every 2k dwords */
-		ndw += (nptes >> 11) * 3;
+		ndw += (nptes >> 11) * 4;
 	else
 		/* reserve space for one header for
 		    every (1 << BLOCK_SIZE) entries */
-		ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 3;
+		ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;
  
 	/* reserve space for pte addresses */
 	ndw += nptes * 2;
  
 	/* reserve space for one header for every 2k dwords */
-	ndw += (npdes >> 11) * 3;
+	ndw += (npdes >> 11) * 4;
  
 	/* reserve space for pde addresses */
 	ndw += npdes * 2;
@@ -53,6 +53,7 @@
 				struct drm_gem_object **obj)
 {
 	struct radeon_bo *robj;
+	unsigned long max_size;
 	int r;
  
 	*obj = NULL;
  
  
@@ -60,11 +61,26 @@
 	if (alignment < PAGE_SIZE) {
 		alignment = PAGE_SIZE;
 	}
+
+	/* maximun bo size is the minimun btw visible vram and gtt size */
+	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
+	if (size > max_size) {
+		printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
+		       __func__, __LINE__, size >> 20, max_size >> 20);
+		return -ENOMEM;
+	}
+
+retry:
 	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
 	if (r) {
-		if (r != -ERESTARTSYS)
+		if (r != -ERESTARTSYS) {
+			if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
+				initial_domain |= RADEON_GEM_DOMAIN_GTT;
+				goto retry;
+			}
 			DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
 				  size, initial_domain, alignment, r);
+		}
 		return r;
 	}
 	*obj = &robj->gem_base;
@@ -370,6 +370,7 @@
 	struct backlight_properties props;
 	struct radeon_backlight_privdata *pdata;
 	uint8_t backlight_level;
+	char bl_name[16];
  
 	if (!radeon_encoder->enc_priv)
 		return;
@@ -389,7 +390,9 @@
 	memset(&props, 0, sizeof(props));
 	props.max_brightness = RADEON_MAX_BL_LEVEL;
 	props.type = BACKLIGHT_RAW;
-	bd = backlight_device_register("radeon_bl", &drm_connector->kdev,
+	snprintf(bl_name, sizeof(bl_name),
+		 "radeon_bl%d", dev->primary->index);
+	bd = backlight_device_register(bl_name, &drm_connector->kdev,
 				       pdata, &radeon_backlight_ops, &props);
 	if (IS_ERR(bd)) {
 		DRM_ERROR("Backlight registration failed\n");
@@ -105,7 +105,6 @@
 	struct radeon_bo *bo;
 	enum ttm_bo_type type;
 	unsigned long page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
-	unsigned long max_size = 0;
 	size_t acc_size;
 	int r;
  
  
@@ -121,18 +120,9 @@
 	}
 	*bo_ptr = NULL;
  
-	/* maximun bo size is the minimun btw visible vram and gtt size */
-	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
-	if ((page_align << PAGE_SHIFT) >= max_size) {
-		printk(KERN_WARNING "%s:%d alloc size %ldM bigger than %ldMb limit\n",
-			__func__, __LINE__, page_align  >> (20 - PAGE_SHIFT), max_size >> 20);
-		return -ENOMEM;
-	}
-
 	acc_size = ttm_bo_dma_acc_size(&rdev->mman.bdev, size,
 				       sizeof(struct radeon_bo));
  
-retry:
 	bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
 	if (bo == NULL)
 		return -ENOMEM;
@@ -154,15 +144,6 @@
 			acc_size, sg, &radeon_ttm_bo_destroy);
 	up_read(&rdev->pm.mclk_lock);
 	if (unlikely(r != 0)) {
-		if (r != -ERESTARTSYS) {
-			if (domain == RADEON_GEM_DOMAIN_VRAM) {
-				domain |= RADEON_GEM_DOMAIN_GTT;
-				goto retry;
-			}
-			dev_err(rdev->dev,
-				"object_init failed for (%lu, 0x%08X)\n",
-				size, domain);
-		}
 		return r;
 	}
 	*bo_ptr = bo;
@@ -2808,26 +2808,31 @@
 {
 	struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];
 	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);
-	int i;
-	uint64_t value;
  
-	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 2 + count * 2));
-	radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
-				 WRITE_DATA_DST_SEL(1)));
-	radeon_ring_write(ring, pe);
-	radeon_ring_write(ring, upper_32_bits(pe));
-	for (i = 0; i < count; ++i) {
-		if (flags & RADEON_VM_PAGE_SYSTEM) {
-			value = radeon_vm_map_gart(rdev, addr);
-			value &= 0xFFFFFFFFFFFFF000ULL;
-		} else if (flags & RADEON_VM_PAGE_VALID)
-			value = addr;
-		else
-			value = 0;
-		addr += incr;
-		value |= r600_flags;
-		radeon_ring_write(ring, value);
-		radeon_ring_write(ring, upper_32_bits(value));
+	while (count) {
+		unsigned ndw = 2 + count * 2;
+		if (ndw > 0x3FFE)
+			ndw = 0x3FFE;
+
+		radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, ndw));
+		radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
+					 WRITE_DATA_DST_SEL(1)));
+		radeon_ring_write(ring, pe);
+		radeon_ring_write(ring, upper_32_bits(pe));
+		for (; ndw > 2; ndw -= 2, --count, pe += 8) {
+			uint64_t value;
+			if (flags & RADEON_VM_PAGE_SYSTEM) {
+				value = radeon_vm_map_gart(rdev, addr);
+				value &= 0xFFFFFFFFFFFFF000ULL;
+			} else if (flags & RADEON_VM_PAGE_VALID)
+				value = addr;
+			else
+				value = 0;
+			addr += incr;
+			value |= r600_flags;
+			radeon_ring_write(ring, value);
+			radeon_ring_write(ring, upper_32_bits(value));
+		}
 	}
 }
  
@@ -2868,6 +2873,10 @@
 	radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2);
 	radeon_ring_write(ring, 0);
 	radeon_ring_write(ring, 1 << vm->id);
+
+	/* sync PFP to ME, otherwise we might get invalid PFP reads */
+	radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
+	radeon_ring_write(ring, 0x0);
 }
  
 /*
@@ -205,6 +205,8 @@
 	{0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
+	{0x1002, 0x6791, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
+	{0x1002, 0x6792, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \
@@ -217,6 +219,7 @@
 	{0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
+	{0x1002, 0x6811, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6816, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6817, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
 	{0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \
...	...	@@ -184,6 +184,7 @@
184	184	struct radeon_backlight_privdata *pdata;
185	185	struct radeon_encoder_atom_dig *dig;
186	186	u8 backlight_level;
	187	+ char bl_name[16];
187	188
188	189	if (!radeon_encoder->enc_priv)
189	190	return;
...	...	@@ -203,7 +204,9 @@
203	204	memset(&props, 0, sizeof(props));
204	205	props.max_brightness = RADEON_MAX_BL_LEVEL;
205	206	props.type = BACKLIGHT_RAW;
206		- bd = backlight_device_register("radeon_bl", &drm_connector->kdev,
	207	+ snprintf(bl_name, sizeof(bl_name),
	208	+ "radeon_bl%d", dev->primary->index);
	209	+ bd = backlight_device_register(bl_name, &drm_connector->kdev,
207	210	pdata, &radeon_atom_backlight_ops, &props);
208	211	if (IS_ERR(bd)) {
209	212	DRM_ERROR("Backlight registration failed\n");
...	...	@@ -2829,6 +2829,7 @@
2829	2829	case CAYMAN_SQ_EX_ALLOC_TABLE_SLOTS:
2830	2830	return true;
2831	2831	default:
	2832	+ DRM_ERROR("Invalid register 0x%x in CS\n", reg);
2832	2833	return false;
2833	2834	}
2834	2835	}
...	...	@@ -1538,26 +1538,31 @@
1538	1538	{
1539	1539	struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];
1540	1540	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);
1541		- int i;
1542	1541
1543		- radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, 1 + count * 2));
1544		- radeon_ring_write(ring, pe);
1545		- radeon_ring_write(ring, upper_32_bits(pe) & 0xff);
1546		- for (i = 0; i < count; ++i) {
1547		- uint64_t value = 0;
1548		- if (flags & RADEON_VM_PAGE_SYSTEM) {
1549		- value = radeon_vm_map_gart(rdev, addr);
1550		- value &= 0xFFFFFFFFFFFFF000ULL;
1551		- addr += incr;
	1542	+ while (count) {
	1543	+ unsigned ndw = 1 + count * 2;
	1544	+ if (ndw > 0x3FFF)
	1545	+ ndw = 0x3FFF;
1552	1546
1553		- } else if (flags & RADEON_VM_PAGE_VALID) {
1554		- value = addr;
1555		- addr += incr;
1556		- }
	1547	+ radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, ndw));
	1548	+ radeon_ring_write(ring, pe);
	1549	+ radeon_ring_write(ring, upper_32_bits(pe) & 0xff);
	1550	+ for (; ndw > 1; ndw -= 2, --count, pe += 8) {
	1551	+ uint64_t value = 0;
	1552	+ if (flags & RADEON_VM_PAGE_SYSTEM) {
	1553	+ value = radeon_vm_map_gart(rdev, addr);
	1554	+ value &= 0xFFFFFFFFFFFFF000ULL;
	1555	+ addr += incr;
1557	1556
1558		- value \|= r600_flags;
1559		- radeon_ring_write(ring, value);
1560		- radeon_ring_write(ring, upper_32_bits(value));
	1557	+ } else if (flags & RADEON_VM_PAGE_VALID) {
	1558	+ value = addr;
	1559	+ addr += incr;
	1560	+ }
	1561	+
	1562	+ value \|= r600_flags;
	1563	+ radeon_ring_write(ring, value);
	1564	+ radeon_ring_write(ring, upper_32_bits(value));
	1565	+ }
1561	1566	}
1562	1567	}
1563	1568
...	...	@@ -1586,5 +1591,9 @@
1586	1591	/* bits 0-7 are the VM contexts0-7 */
1587	1592	radeon_ring_write(ring, PACKET0(VM_INVALIDATE_REQUEST, 0));
1588	1593	radeon_ring_write(ring, 1 << vm->id);
	1594	+
	1595	+ /* sync PFP to ME, otherwise we might get invalid PFP reads */
	1596	+ radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
	1597	+ radeon_ring_write(ring, 0x0);
1589	1598	}
...	...	@@ -502,6 +502,7 @@
502	502	#define PACKET3_MPEG_INDEX 0x3A
503	503	#define PACKET3_WAIT_REG_MEM 0x3C
504	504	#define PACKET3_MEM_WRITE 0x3D
	505	+#define PACKET3_PFP_SYNC_ME 0x42
505	506	#define PACKET3_SURFACE_SYNC 0x43
506	507	# define PACKET3_CB0_DEST_BASE_ENA (1 << 6)
507	508	# define PACKET3_CB1_DEST_BASE_ENA (1 << 7)
...	...	@@ -87,7 +87,7 @@
87	87	atpx_arg_elements[1].integer.value = 0;
88	88	}
89	89
90		- status = acpi_evaluate_object(handle, "ATPX", &atpx_arg, &buffer);
	90	+ status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
91	91
92	92	/* Fail only if calling the method fails and ATPX is supported */
93	93	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
94	94
...	...	@@ -373,11 +373,11 @@
373	373	}
374	374
375	375	/**
376		- * radeon_atpx_pci_probe_handle - look up the ATRM and ATPX handles
	376	+ * radeon_atpx_pci_probe_handle - look up the ATPX handle
377	377	*
378	378	* @pdev: pci device
379	379	*
380		- * Look up the ATPX and ATRM handles (all asics).
	380	+ * Look up the ATPX handles (all asics).
381	381	* Returns true if the handles are found, false if not.
382	382	*/
383	383	static bool radeon_atpx_pci_probe_handle(struct pci_dev *pdev)
...	...	@@ -355,6 +355,8 @@
355	355	*/
356	356	void radeon_vram_location(struct radeon_device rdev, struct radeon_mc mc, u64 base)
357	357	{
	358	+ uint64_t limit = (uint64_t)radeon_vram_limit << 20;
	359	+
358	360	mc->vram_start = base;
359	361	if (mc->mc_vram_size > (0xFFFFFFFF - base + 1)) {
360	362	dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n");
...	...	@@ -368,8 +370,8 @@
368	370	mc->mc_vram_size = mc->aper_size;
369	371	}
370	372	mc->vram_end = mc->vram_start + mc->mc_vram_size - 1;
371		- if (radeon_vram_limit && radeon_vram_limit < mc->real_vram_size)
372		- mc->real_vram_size = radeon_vram_limit;
	373	+ if (limit && limit < mc->real_vram_size)
	374	+ mc->real_vram_size = limit;
373	375	dev_info(rdev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n",
374	376	mc->mc_vram_size >> 20, mc->vram_start,
375	377	mc->vram_end, mc->real_vram_size >> 20);
...	...	@@ -835,6 +837,19 @@
835	837	}
836	838
837	839	/**
	840	+ * radeon_check_pot_argument - check that argument is a power of two
	841	+ *
	842	+ * @arg: value to check
	843	+ *
	844	+ * Validates that a certain argument is a power of two (all asics).
	845	+ * Returns true if argument is valid.
	846	+ */
	847	+static bool radeon_check_pot_argument(int arg)
	848	+{
	849	+ return (arg & (arg - 1)) == 0;
	850	+}
	851	+
	852	+/**
838	853	* radeon_check_arguments - validate module params
839	854	*
840	855	* @rdev: radeon_device pointer
841	856
842	857
843	858
844	859
845	860
846	861
...	...	@@ -845,52 +860,25 @@
845	860	static void radeon_check_arguments(struct radeon_device *rdev)
846	861	{
847	862	/* vramlimit must be a power of two */
848		- switch (radeon_vram_limit) {
849		- case 0:
850		- case 4:
851		- case 8:
852		- case 16:
853		- case 32:
854		- case 64:
855		- case 128:
856		- case 256:
857		- case 512:
858		- case 1024:
859		- case 2048:
860		- case 4096:
861		- break;
862		- default:
	863	+ if (!radeon_check_pot_argument(radeon_vram_limit)) {
863	864	dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n",
864	865	radeon_vram_limit);
865	866	radeon_vram_limit = 0;
866		- break;
867	867	}
868		- radeon_vram_limit = radeon_vram_limit << 20;
	868	+
869	869	/* gtt size must be power of two and greater or equal to 32M */
870		- switch (radeon_gart_size) {
871		- case 4:
872		- case 8:
873		- case 16:
	870	+ if (radeon_gart_size < 32) {
874	871	dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n",
875	872	radeon_gart_size);
876	873	radeon_gart_size = 512;
877		- break;
878		- case 32:
879		- case 64:
880		- case 128:
881		- case 256:
882		- case 512:
883		- case 1024:
884		- case 2048:
885		- case 4096:
886		- break;
887		- default:
	874	+
	875	+ } else if (!radeon_check_pot_argument(radeon_gart_size)) {
888	876	dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n",
889	877	radeon_gart_size);
890	878	radeon_gart_size = 512;
891		- break;
892	879	}
893		- rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
	880	+ rdev->mc.gtt_size = (uint64_t)radeon_gart_size << 20;
	881	+
894	882	/* AGP mode can only be -1, 1, 2, 4, 8 */
895	883	switch (radeon_agpmode) {
896	884	case -1:
...	...	@@ -355,14 +355,13 @@
355	355	DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
356	356	rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
357	357	/* Allocate pages table */
358		- rdev->gart.pages = kzalloc(sizeof(void ) rdev->gart.num_cpu_pages,
359		- GFP_KERNEL);
	358	+ rdev->gart.pages = vzalloc(sizeof(void ) rdev->gart.num_cpu_pages);
360	359	if (rdev->gart.pages == NULL) {
361	360	radeon_gart_fini(rdev);
362	361	return -ENOMEM;
363	362	}
364		- rdev->gart.pages_addr = kzalloc(sizeof(dma_addr_t) *
365		- rdev->gart.num_cpu_pages, GFP_KERNEL);
	363	+ rdev->gart.pages_addr = vzalloc(sizeof(dma_addr_t) *
	364	+ rdev->gart.num_cpu_pages);
366	365	if (rdev->gart.pages_addr == NULL) {
367	366	radeon_gart_fini(rdev);
368	367	return -ENOMEM;
...	...	@@ -388,8 +387,8 @@
388	387	radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
389	388	}
390	389	rdev->gart.ready = false;
391		- kfree(rdev->gart.pages);
392		- kfree(rdev->gart.pages_addr);
	390	+ vfree(rdev->gart.pages);
	391	+ vfree(rdev->gart.pages_addr);
393	392	rdev->gart.pages = NULL;
394	393	rdev->gart.pages_addr = NULL;
395	394
...	...	@@ -577,7 +576,7 @@
577	576	*
578	577	* Global and local mutex must be locked!
579	578	*/
580		-int radeon_vm_evict(struct radeon_device rdev, struct radeon_vm vm)
	579	+static int radeon_vm_evict(struct radeon_device rdev, struct radeon_vm vm)
581	580	{
582	581	struct radeon_vm *vm_evict;
583	582
...	...	@@ -1036,8 +1035,7 @@
1036	1035	pte = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
1037	1036	pte += (addr & mask) * 8;
1038	1037
1039		- if (((last_pte + 8 * count) != pte) \|\|
1040		- ((count + nptes) > 1 << 11)) {
	1038	+ if ((last_pte + 8 * count) != pte) {
1041	1039
1042	1040	if (count) {
1043	1041	radeon_asic_vm_set_page(rdev, last_pte,
1044	1042
1045	1043
...	...	@@ -1148,17 +1146,17 @@
1148	1146
1149	1147	if (RADEON_VM_BLOCK_SIZE > 11)
1150	1148	/* reserve space for one header for every 2k dwords */
1151		- ndw += (nptes >> 11) * 3;
	1149	+ ndw += (nptes >> 11) * 4;
1152	1150	else
1153	1151	/* reserve space for one header for
1154	1152	every (1 << BLOCK_SIZE) entries */
1155		- ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 3;
	1153	+ ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;
1156	1154
1157	1155	/* reserve space for pte addresses */
1158	1156	ndw += nptes * 2;
1159	1157
1160	1158	/* reserve space for one header for every 2k dwords */
1161		- ndw += (npdes >> 11) * 3;
	1159	+ ndw += (npdes >> 11) * 4;
1162	1160
1163	1161	/* reserve space for pde addresses */
1164	1162	ndw += npdes * 2;
...	...	@@ -53,6 +53,7 @@
53	53	struct drm_gem_object **obj)
54	54	{
55	55	struct radeon_bo *robj;
	56	+ unsigned long max_size;
56	57	int r;
57	58
58	59	*obj = NULL;
59	60
60	61
...	...	@@ -60,11 +61,26 @@
60	61	if (alignment < PAGE_SIZE) {
61	62	alignment = PAGE_SIZE;
62	63	}
	64	+
	65	+ /* maximun bo size is the minimun btw visible vram and gtt size */
	66	+ max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
	67	+ if (size > max_size) {
	68	+ printk(KERN_WARNING "%s:%d alloc size %dMb bigger than %ldMb limit\n",
	69	+ __func__, __LINE__, size >> 20, max_size >> 20);
	70	+ return -ENOMEM;
	71	+ }
	72	+
	73	+retry:
63	74	r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
64	75	if (r) {
65		- if (r != -ERESTARTSYS)
	76	+ if (r != -ERESTARTSYS) {
	77	+ if (initial_domain == RADEON_GEM_DOMAIN_VRAM) {
	78	+ initial_domain \|= RADEON_GEM_DOMAIN_GTT;
	79	+ goto retry;
	80	+ }
66	81	DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
67	82	size, initial_domain, alignment, r);
	83	+ }
68	84	return r;
69	85	}
70	86	*obj = &robj->gem_base;
...	...	@@ -370,6 +370,7 @@
370	370	struct backlight_properties props;
371	371	struct radeon_backlight_privdata *pdata;
372	372	uint8_t backlight_level;
	373	+ char bl_name[16];
373	374
374	375	if (!radeon_encoder->enc_priv)
375	376	return;
...	...	@@ -389,7 +390,9 @@
389	390	memset(&props, 0, sizeof(props));
390	391	props.max_brightness = RADEON_MAX_BL_LEVEL;
391	392	props.type = BACKLIGHT_RAW;
392		- bd = backlight_device_register("radeon_bl", &drm_connector->kdev,
	393	+ snprintf(bl_name, sizeof(bl_name),
	394	+ "radeon_bl%d", dev->primary->index);
	395	+ bd = backlight_device_register(bl_name, &drm_connector->kdev,
393	396	pdata, &radeon_backlight_ops, &props);
394	397	if (IS_ERR(bd)) {
395	398	DRM_ERROR("Backlight registration failed\n");
...	...	@@ -105,7 +105,6 @@
105	105	struct radeon_bo *bo;
106	106	enum ttm_bo_type type;
107	107	unsigned long page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
108		- unsigned long max_size = 0;
109	108	size_t acc_size;
110	109	int r;
111	110
112	111
...	...	@@ -121,18 +120,9 @@
121	120	}
122	121	*bo_ptr = NULL;
123	122
124		- /* maximun bo size is the minimun btw visible vram and gtt size */
125		- max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
126		- if ((page_align << PAGE_SHIFT) >= max_size) {
127		- printk(KERN_WARNING "%s:%d alloc size %ldM bigger than %ldMb limit\n",
128		- __func__, __LINE__, page_align >> (20 - PAGE_SHIFT), max_size >> 20);
129		- return -ENOMEM;
130		- }
131		-
132	123	acc_size = ttm_bo_dma_acc_size(&rdev->mman.bdev, size,
133	124	sizeof(struct radeon_bo));
134	125
135		-retry:
136	126	bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
137	127	if (bo == NULL)
138	128	return -ENOMEM;
...	...	@@ -154,15 +144,6 @@
154	144	acc_size, sg, &radeon_ttm_bo_destroy);
155	145	up_read(&rdev->pm.mclk_lock);
156	146	if (unlikely(r != 0)) {
157		- if (r != -ERESTARTSYS) {
158		- if (domain == RADEON_GEM_DOMAIN_VRAM) {
159		- domain \|= RADEON_GEM_DOMAIN_GTT;
160		- goto retry;
161		- }
162		- dev_err(rdev->dev,
163		- "object_init failed for (%lu, 0x%08X)\n",
164		- size, domain);
165		- }
166	147	return r;
167	148	}
168	149	*bo_ptr = bo;