Commit 98e8d2e094de67315f786cd81b1dccb4ac040cc2
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull mips fixes from Ralf Baechle: "The hopefully final round of fixes for 3.18: - Fix a number of build errors affecting particular configurations. - Handle EVA correctly when flushing a signal trampoline and dcache lines. - Fix printks printing jibberish. - Handle 64 bit memory addresses correctly when adding memory chunk on 32 bit kernels. - Fix a race condition in the hardware tablewalker code" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers MIPS: Fix address type used for early memory detection. MIPS: Kconfig: Don't allow both microMIPS and SmartMIPS to be selected. MIPS: kernel: cps-vec: Set ISA level to mips32r2 for the MIPS MT ASE MIPS: Netlogic: handle modular AHCI builds MIPS: Netlogic: handle modular USB case MIPS: Loongson: Make platform serial setup always built-in. MIPS: fix EVA & non-SMP non-FPU FP context signal handling MIPS: cpu-probe: Set the FTLB probability bit on supported cores MIPS: BMIPS: Fix ".previous without corresponding .section" warnings MIPS: uaccess.h: Fix strnlen_user comment. MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line MIPS: Fix info about plat_setup in arch_mem_init comment MIPS: rtlx: Remove KERN_DEBUG from pr_debug() arguments in rtlx.c MIPS: SEAD3: Fix LED device registration. MIPS: Fix a copy & paste error in unistd.h
Showing 15 changed files Side-by-side Diff
- arch/mips/Kconfig
- arch/mips/include/asm/mipsregs.h
- arch/mips/include/asm/r4kcache.h
- arch/mips/include/asm/uaccess.h
- arch/mips/include/uapi/asm/unistd.h
- arch/mips/kernel/bmips_vec.S
- arch/mips/kernel/cps-vec.S
- arch/mips/kernel/cpu-probe.c
- arch/mips/kernel/rtlx.c
- arch/mips/kernel/setup.c
- arch/mips/kernel/signal.c
- arch/mips/loongson/common/Makefile
- arch/mips/mm/tlbex.c
- arch/mips/mti-sead3/sead3-leds.c
- arch/mips/netlogic/xlp/Makefile
arch/mips/Kconfig
... | ... | @@ -2101,9 +2101,17 @@ |
2101 | 2101 | config ARCH_PHYS_ADDR_T_64BIT |
2102 | 2102 | def_bool 64BIT_PHYS_ADDR |
2103 | 2103 | |
2104 | +choice | |
2105 | + prompt "SmartMIPS or microMIPS ASE support" | |
2106 | + | |
2107 | +config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS | |
2108 | + bool "None" | |
2109 | + help | |
2110 | + Select this if you want neither microMIPS nor SmartMIPS support | |
2111 | + | |
2104 | 2112 | config CPU_HAS_SMARTMIPS |
2105 | 2113 | depends on SYS_SUPPORTS_SMARTMIPS |
2106 | - bool "Support for the SmartMIPS ASE" | |
2114 | + bool "SmartMIPS" | |
2107 | 2115 | help |
2108 | 2116 | SmartMIPS is a extension of the MIPS32 architecture aimed at |
2109 | 2117 | increased security at both hardware and software level for |
2110 | 2118 | |
... | ... | @@ -2115,10 +2123,12 @@ |
2115 | 2123 | |
2116 | 2124 | config CPU_MICROMIPS |
2117 | 2125 | depends on SYS_SUPPORTS_MICROMIPS |
2118 | - bool "Build kernel using microMIPS ISA" | |
2126 | + bool "microMIPS" | |
2119 | 2127 | help |
2120 | 2128 | When this option is enabled the kernel will be built using the |
2121 | 2129 | microMIPS ISA |
2130 | + | |
2131 | +endchoice | |
2122 | 2132 | |
2123 | 2133 | config CPU_HAS_MSA |
2124 | 2134 | bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)" |
arch/mips/include/asm/mipsregs.h
... | ... | @@ -661,6 +661,8 @@ |
661 | 661 | #define MIPS_CONF6_SYND (_ULCAST_(1) << 13) |
662 | 662 | /* proAptiv FTLB on/off bit */ |
663 | 663 | #define MIPS_CONF6_FTLBEN (_ULCAST_(1) << 15) |
664 | +/* FTLB probability bits */ | |
665 | +#define MIPS_CONF6_FTLBP_SHIFT (16) | |
664 | 666 | |
665 | 667 | #define MIPS_CONF7_WII (_ULCAST_(1) << 31) |
666 | 668 |
arch/mips/include/asm/r4kcache.h
... | ... | @@ -257,7 +257,11 @@ |
257 | 257 | */ |
258 | 258 | static inline void protected_writeback_dcache_line(unsigned long addr) |
259 | 259 | { |
260 | +#ifdef CONFIG_EVA | |
261 | + protected_cachee_op(Hit_Writeback_Inv_D, addr); | |
262 | +#else | |
260 | 263 | protected_cache_op(Hit_Writeback_Inv_D, addr); |
264 | +#endif | |
261 | 265 | } |
262 | 266 | |
263 | 267 | static inline void protected_writeback_scache_line(unsigned long addr) |
arch/mips/include/asm/uaccess.h
... | ... | @@ -1422,7 +1422,7 @@ |
1422 | 1422 | } |
1423 | 1423 | |
1424 | 1424 | /* |
1425 | - * strlen_user: - Get the size of a string in user space. | |
1425 | + * strnlen_user: - Get the size of a string in user space. | |
1426 | 1426 | * @str: The string to measure. |
1427 | 1427 | * |
1428 | 1428 | * Context: User context only. This function may sleep. |
... | ... | @@ -1431,9 +1431,7 @@ |
1431 | 1431 | * |
1432 | 1432 | * Returns the size of the string INCLUDING the terminating NUL. |
1433 | 1433 | * On exception, returns 0. |
1434 | - * | |
1435 | - * If there is a limit on the length of a valid string, you may wish to | |
1436 | - * consider using strnlen_user() instead. | |
1434 | + * If the string is too long, returns a value greater than @n. | |
1437 | 1435 | */ |
1438 | 1436 | static inline long strnlen_user(const char __user *s, long n) |
1439 | 1437 | { |
arch/mips/include/uapi/asm/unistd.h
... | ... | @@ -1045,7 +1045,7 @@ |
1045 | 1045 | #define __NR_seccomp (__NR_Linux + 316) |
1046 | 1046 | #define __NR_getrandom (__NR_Linux + 317) |
1047 | 1047 | #define __NR_memfd_create (__NR_Linux + 318) |
1048 | -#define __NR_memfd_create (__NR_Linux + 319) | |
1048 | +#define __NR_bpf (__NR_Linux + 319) | |
1049 | 1049 | |
1050 | 1050 | /* |
1051 | 1051 | * Offset of the last N32 flavoured syscall |
arch/mips/kernel/bmips_vec.S
... | ... | @@ -208,7 +208,6 @@ |
208 | 208 | END(bmips_reset_nmi_vec) |
209 | 209 | |
210 | 210 | .set pop |
211 | - .previous | |
212 | 211 | |
213 | 212 | /*********************************************************************** |
214 | 213 | * CPU1 warm restart vector (used for second and subsequent boots). |
... | ... | @@ -281,6 +280,4 @@ |
281 | 280 | jr ra |
282 | 281 | |
283 | 282 | END(bmips_enable_xks01) |
284 | - | |
285 | - .previous |
arch/mips/kernel/cps-vec.S
... | ... | @@ -229,6 +229,7 @@ |
229 | 229 | nop |
230 | 230 | |
231 | 231 | .set push |
232 | + .set mips32r2 | |
232 | 233 | .set mt |
233 | 234 | |
234 | 235 | /* Only allow 1 TC per VPE to execute... */ |
... | ... | @@ -345,6 +346,7 @@ |
345 | 346 | nop |
346 | 347 | |
347 | 348 | .set push |
349 | + .set mips32r2 | |
348 | 350 | .set mt |
349 | 351 | |
350 | 352 | 1: /* Enter VPE configuration state */ |
arch/mips/kernel/cpu-probe.c
... | ... | @@ -193,6 +193,32 @@ |
193 | 193 | static char unknown_isa[] = KERN_ERR \ |
194 | 194 | "Unsupported ISA type, c0.config0: %d."; |
195 | 195 | |
196 | +static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c) | |
197 | +{ | |
198 | + | |
199 | + unsigned int probability = c->tlbsize / c->tlbsizevtlb; | |
200 | + | |
201 | + /* | |
202 | + * 0 = All TLBWR instructions go to FTLB | |
203 | + * 1 = 15:1: For every 16 TBLWR instructions, 15 go to the | |
204 | + * FTLB and 1 goes to the VTLB. | |
205 | + * 2 = 7:1: As above with 7:1 ratio. | |
206 | + * 3 = 3:1: As above with 3:1 ratio. | |
207 | + * | |
208 | + * Use the linear midpoint as the probability threshold. | |
209 | + */ | |
210 | + if (probability >= 12) | |
211 | + return 1; | |
212 | + else if (probability >= 6) | |
213 | + return 2; | |
214 | + else | |
215 | + /* | |
216 | + * So FTLB is less than 4 times bigger than VTLB. | |
217 | + * A 3:1 ratio can still be useful though. | |
218 | + */ | |
219 | + return 3; | |
220 | +} | |
221 | + | |
196 | 222 | static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) |
197 | 223 | { |
198 | 224 | unsigned int config6; |
199 | 225 | |
... | ... | @@ -203,9 +229,14 @@ |
203 | 229 | case CPU_P5600: |
204 | 230 | /* proAptiv & related cores use Config6 to enable the FTLB */ |
205 | 231 | config6 = read_c0_config6(); |
232 | + /* Clear the old probability value */ | |
233 | + config6 &= ~(3 << MIPS_CONF6_FTLBP_SHIFT); | |
206 | 234 | if (enable) |
207 | 235 | /* Enable FTLB */ |
208 | - write_c0_config6(config6 | MIPS_CONF6_FTLBEN); | |
236 | + write_c0_config6(config6 | | |
237 | + (calculate_ftlb_probability(c) | |
238 | + << MIPS_CONF6_FTLBP_SHIFT) | |
239 | + | MIPS_CONF6_FTLBEN); | |
209 | 240 | else |
210 | 241 | /* Disable FTLB */ |
211 | 242 | write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN); |
arch/mips/kernel/rtlx.c
... | ... | @@ -94,12 +94,12 @@ |
94 | 94 | int ret = 0; |
95 | 95 | |
96 | 96 | if (index >= RTLX_CHANNELS) { |
97 | - pr_debug(KERN_DEBUG "rtlx_open index out of range\n"); | |
97 | + pr_debug("rtlx_open index out of range\n"); | |
98 | 98 | return -ENOSYS; |
99 | 99 | } |
100 | 100 | |
101 | 101 | if (atomic_inc_return(&channel_wqs[index].in_open) > 1) { |
102 | - pr_debug(KERN_DEBUG "rtlx_open channel %d already opened\n", index); | |
102 | + pr_debug("rtlx_open channel %d already opened\n", index); | |
103 | 103 | ret = -EBUSY; |
104 | 104 | goto out_fail; |
105 | 105 | } |
arch/mips/kernel/setup.c
... | ... | @@ -485,7 +485,7 @@ |
485 | 485 | * NOTE: historically plat_mem_setup did the entire platform initialization. |
486 | 486 | * This was rather impractical because it meant plat_mem_setup had to |
487 | 487 | * get away without any kind of memory allocator. To keep old code from |
488 | - * breaking plat_setup was just renamed to plat_setup and a second platform | |
488 | + * breaking plat_setup was just renamed to plat_mem_setup and a second platform | |
489 | 489 | * initialization hook for anything else was introduced. |
490 | 490 | */ |
491 | 491 | |
... | ... | @@ -493,7 +493,7 @@ |
493 | 493 | |
494 | 494 | static int __init early_parse_mem(char *p) |
495 | 495 | { |
496 | - unsigned long start, size; | |
496 | + phys_t start, size; | |
497 | 497 | |
498 | 498 | /* |
499 | 499 | * If a user specifies memory size, we |
arch/mips/kernel/signal.c
... | ... | @@ -658,13 +658,13 @@ |
658 | 658 | save_fp_context = _save_fp_context; |
659 | 659 | restore_fp_context = _restore_fp_context; |
660 | 660 | } else { |
661 | - save_fp_context = copy_fp_from_sigcontext; | |
662 | - restore_fp_context = copy_fp_to_sigcontext; | |
661 | + save_fp_context = copy_fp_to_sigcontext; | |
662 | + restore_fp_context = copy_fp_from_sigcontext; | |
663 | 663 | } |
664 | 664 | #endif /* CONFIG_SMP */ |
665 | 665 | #else |
666 | - save_fp_context = copy_fp_from_sigcontext;; | |
667 | - restore_fp_context = copy_fp_to_sigcontext; | |
666 | + save_fp_context = copy_fp_to_sigcontext; | |
667 | + restore_fp_context = copy_fp_from_sigcontext; | |
668 | 668 | #endif |
669 | 669 | |
670 | 670 | return 0; |
arch/mips/loongson/common/Makefile
... | ... | @@ -11,7 +11,8 @@ |
11 | 11 | # Serial port support |
12 | 12 | # |
13 | 13 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
14 | -obj-$(CONFIG_SERIAL_8250) += serial.o | |
14 | +loongson-serial-$(CONFIG_SERIAL_8250) := serial.o | |
15 | +obj-y += $(loongson-serial-m) $(loongson-serial-y) | |
15 | 16 | obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o |
16 | 17 | obj-$(CONFIG_LOONGSON_MC146818) += rtc.o |
17 | 18 |
arch/mips/mm/tlbex.c
... | ... | @@ -1872,8 +1872,16 @@ |
1872 | 1872 | uasm_l_smp_pgtable_change(l, *p); |
1873 | 1873 | #endif |
1874 | 1874 | iPTE_LW(p, wr.r1, wr.r2); /* get even pte */ |
1875 | - if (!m4kc_tlbp_war()) | |
1875 | + if (!m4kc_tlbp_war()) { | |
1876 | 1876 | build_tlb_probe_entry(p); |
1877 | + if (cpu_has_htw) { | |
1878 | + /* race condition happens, leaving */ | |
1879 | + uasm_i_ehb(p); | |
1880 | + uasm_i_mfc0(p, wr.r3, C0_INDEX); | |
1881 | + uasm_il_bltz(p, r, wr.r3, label_leave); | |
1882 | + uasm_i_nop(p); | |
1883 | + } | |
1884 | + } | |
1877 | 1885 | return wr; |
1878 | 1886 | } |
1879 | 1887 |
arch/mips/mti-sead3/sead3-leds.c
... | ... | @@ -5,7 +5,7 @@ |
5 | 5 | * |
6 | 6 | * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved. |
7 | 7 | */ |
8 | -#include <linux/module.h> | |
8 | +#include <linux/init.h> | |
9 | 9 | #include <linux/leds.h> |
10 | 10 | #include <linux/platform_device.h> |
11 | 11 | |
... | ... | @@ -76,9 +76,5 @@ |
76 | 76 | return platform_device_register(&fled_device); |
77 | 77 | } |
78 | 78 | |
79 | -module_init(led_init); | |
80 | - | |
81 | -MODULE_AUTHOR("Chris Dearman <chris@mips.com>"); | |
82 | -MODULE_LICENSE("GPL"); | |
83 | -MODULE_DESCRIPTION("LED probe driver for SEAD-3"); | |
79 | +device_initcall(led_init); |
arch/mips/netlogic/xlp/Makefile
1 | 1 | obj-y += setup.o nlm_hal.o cop2-ex.o dt.o |
2 | 2 | obj-$(CONFIG_SMP) += wakeup.o |
3 | -obj-$(CONFIG_USB) += usb-init.o | |
4 | -obj-$(CONFIG_USB) += usb-init-xlp2.o | |
5 | -obj-$(CONFIG_SATA_AHCI) += ahci-init.o | |
6 | -obj-$(CONFIG_SATA_AHCI) += ahci-init-xlp2.o | |
3 | +ifdef CONFIG_USB | |
4 | +obj-y += usb-init.o | |
5 | +obj-y += usb-init-xlp2.o | |
6 | +endif | |
7 | +ifdef CONFIG_SATA_AHCI | |
8 | +obj-y += ahci-init.o | |
9 | +obj-y += ahci-init-xlp2.o | |
10 | +endif |