sh: clkfwk: Kill off unused clk_set_rate_ex().

With the refactoring of the SH7722 clock framework some time ago this abstraction has become unecessary. Kill it off before anyone else gets the bright idea to start using it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>

sh: clkfwk: Kill off unused clk_set_rate_ex().
With the refactoring of the SH7722 clock framework some time ago this abstraction has become unecessary. Kill it off before anyone else gets the bright idea to start using it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Paul Mundt
1 parent ed10b490ea
Showing 4 changed files with 3 additions and 75 deletions Side-by-side Diff
Documentation/DocBook/sh.tmpl
Documentation/sh/clk.txt
drivers/sh/clk/core.c
include/linux/sh_clk.h
@@ -79,10 +79,6 @@
       </sect2>
     </sect1>
   </chapter>
-  <chapter id="clk">
-    <title>Clock Framework Extensions</title>
-!Iinclude/linux/sh_clk.h
-  </chapter>
   <chapter id="mach">
     <title>Machine Specific Interfaces</title>
     <sect1 id="dreamcast">
-Clock framework on SuperH architecture
-
-The framework on SH extends existing API by the function clk_set_rate_ex,
-which prototype is as follows:
-
-    clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id)
-
-The algo_id parameter is used to specify algorithm used to recalculate clocks,
-adjanced to clock, specified as first argument. It is assumed that algo_id==0
-means no changes to adjanced clock
-
-Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method,
-if it is present in ops structure. The method should set the clock rate and adjust
-all needed clocks according to the passed algo_id.
-Exact values for algo_id are machine-dependent. For the sh7722, the following
-values are defined:
-
-	NO_CHANGE	= 0,
-	IUS_N1_N1,	/* I:U = N:1, U:Sh = N:1 */
-	IUS_322,	/* I:U:Sh = 3:2:2	 */
-	IUS_522,	/* I:U:Sh = 5:2:2 	 */
-	IUS_N11,	/* I:U:Sh = N:1:1	 */
-	SB_N1,		/* Sh:B = N:1		 */
-	SB3_N1,		/* Sh:B3 = N:1		 */
-	SB3_32,		/* Sh:B3 = 3:2		 */
-	SB3_43,		/* Sh:B3 = 4:3		 */
-	SB3_54,		/* Sh:B3 = 5:4		 */
-	BP_N1,		/* B:P	 = N:1		 */
-	IP_N1		/* I:P	 = N:1		 */
-
-Each of these constants means relation between clocks that can be set via the FRQCR
-register
@@ -455,19 +455,13 @@
  
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
-	return clk_set_rate_ex(clk, rate, 0);
-}
-EXPORT_SYMBOL_GPL(clk_set_rate);
-
-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
-{
 	int ret = -EOPNOTSUPP;
 	unsigned long flags;
  
 	spin_lock_irqsave(&clock_lock, flags);
  
 	if (likely(clk->ops && clk->ops->set_rate)) {
-		ret = clk->ops->set_rate(clk, rate, algo_id);
+		ret = clk->ops->set_rate(clk, rate, 0);
 		if (ret != 0)
 			goto out_unlock;
 	} else {
@@ -485,7 +479,7 @@
  
 	return ret;
 }
-EXPORT_SYMBOL_GPL(clk_set_rate_ex);
+EXPORT_SYMBOL_GPL(clk_set_rate);
  
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
@@ -654,7 +648,7 @@
 						clkp->parent);
 				if (likely(clkp->ops->set_rate))
 					clkp->ops->set_rate(clkp,
-						rate, NO_CHANGE);
+						rate, 0);
 				else if (likely(clkp->ops->recalc))
 					clkp->rate = clkp->ops->recalc(clkp);
 			}
@@ -67,36 +67,6 @@
 void clk_unregister(struct clk *);
 void clk_enable_init_clocks(void);
  
-/**
- * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
- * @clk: clock source
- * @rate: desired clock rate in Hz
- * @algo_id: algorithm id to be passed down to ops->set_rate
- *
- * Returns success (0) or negative errno.
- */
-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
-
-enum clk_sh_algo_id {
-	NO_CHANGE = 0,
-
-	IUS_N1_N1,
-	IUS_322,
-	IUS_522,
-	IUS_N11,
-
-	SB_N1,
-
-	SB3_N1,
-	SB3_32,
-	SB3_43,
-	SB3_54,
-
-	BP_N1,
-
-	IP_N1,
-};
-
 struct clk_div_mult_table {
 	unsigned int *divisors;
 	unsigned int nr_divisors;
...	...	@@ -79,10 +79,6 @@
79	79	</sect2>
80	80	</sect1>
81	81	</chapter>
82		- <chapter id="clk">
83		- <title>Clock Framework Extensions</title>
84		-!Iinclude/linux/sh_clk.h
85		- </chapter>
86	82	<chapter id="mach">
87	83	<title>Machine Specific Interfaces</title>
88	84	<sect1 id="dreamcast">
1		-Clock framework on SuperH architecture
2		-
3		-The framework on SH extends existing API by the function clk_set_rate_ex,
4		-which prototype is as follows:
5		-
6		- clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id)
7		-
8		-The algo_id parameter is used to specify algorithm used to recalculate clocks,
9		-adjanced to clock, specified as first argument. It is assumed that algo_id==0
10		-means no changes to adjanced clock
11		-
12		-Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method,
13		-if it is present in ops structure. The method should set the clock rate and adjust
14		-all needed clocks according to the passed algo_id.
15		-Exact values for algo_id are machine-dependent. For the sh7722, the following
16		-values are defined:
17		-
18		- NO_CHANGE = 0,
19		- IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */
20		- IUS_322, /* I:U:Sh = 3:2:2 */
21		- IUS_522, /* I:U:Sh = 5:2:2 */
22		- IUS_N11, /* I:U:Sh = N:1:1 */
23		- SB_N1, /* Sh:B = N:1 */
24		- SB3_N1, /* Sh:B3 = N:1 */
25		- SB3_32, /* Sh:B3 = 3:2 */
26		- SB3_43, /* Sh:B3 = 4:3 */
27		- SB3_54, /* Sh:B3 = 5:4 */
28		- BP_N1, /* B:P = N:1 */
29		- IP_N1 /* I:P = N:1 */
30		-
31		-Each of these constants means relation between clocks that can be set via the FRQCR
32		-register
...	...	@@ -455,19 +455,13 @@
455	455
456	456	int clk_set_rate(struct clk *clk, unsigned long rate)
457	457	{
458		- return clk_set_rate_ex(clk, rate, 0);
459		-}
460		-EXPORT_SYMBOL_GPL(clk_set_rate);
461		-
462		-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
463		-{
464	458	int ret = -EOPNOTSUPP;
465	459	unsigned long flags;
466	460
467	461	spin_lock_irqsave(&clock_lock, flags);
468	462
469	463	if (likely(clk->ops && clk->ops->set_rate)) {
470		- ret = clk->ops->set_rate(clk, rate, algo_id);
	464	+ ret = clk->ops->set_rate(clk, rate, 0);
471	465	if (ret != 0)
472	466	goto out_unlock;
473	467	} else {
...	...	@@ -485,7 +479,7 @@
485	479
486	480	return ret;
487	481	}
488		-EXPORT_SYMBOL_GPL(clk_set_rate_ex);
	482	+EXPORT_SYMBOL_GPL(clk_set_rate);
489	483
490	484	int clk_set_parent(struct clk clk, struct clk parent)
491	485	{
...	...	@@ -654,7 +648,7 @@
654	648	clkp->parent);
655	649	if (likely(clkp->ops->set_rate))
656	650	clkp->ops->set_rate(clkp,
657		- rate, NO_CHANGE);
	651	+ rate, 0);
658	652	else if (likely(clkp->ops->recalc))
659	653	clkp->rate = clkp->ops->recalc(clkp);
660	654	}
...	...	@@ -67,36 +67,6 @@
67	67	void clk_unregister(struct clk *);
68	68	void clk_enable_init_clocks(void);
69	69
70		-/**
71		- * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
72		- * @clk: clock source
73		- * @rate: desired clock rate in Hz
74		- * @algo_id: algorithm id to be passed down to ops->set_rate
75		- *
76		- * Returns success (0) or negative errno.
77		- */
78		-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
79		-
80		-enum clk_sh_algo_id {
81		- NO_CHANGE = 0,
82		-
83		- IUS_N1_N1,
84		- IUS_322,
85		- IUS_522,
86		- IUS_N11,
87		-
88		- SB_N1,
89		-
90		- SB3_N1,
91		- SB3_32,
92		- SB3_43,
93		- SB3_54,
94		-
95		- BP_N1,
96		-
97		- IP_N1,
98		-};
99		-
100	70	struct clk_div_mult_table {
101	71	unsigned int *divisors;
102	72	unsigned int nr_divisors;