Commit aa4c5b962a7a03eb6b43b3d2677c3677022c1223

Authored by Russell King
1 parent 6ddeb6d844

dmaengine: omap-dma: more consolidation of CCR register setup

We can move the handling of the DMA synchronisation control out of the
prepare functions; this can be pre-calculated when the DMA channel has
been allocated, so we don't need to duplicate this in both prepare
functions.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 1 changed file with 18 additions and 28 deletions Side-by-side Diff

drivers/dma/omap-dma.c
... ... @@ -41,6 +41,7 @@
41 41 struct list_head node;
42 42 void __iomem *channel_base;
43 43 const struct omap_dma_reg *reg_map;
  44 + uint32_t ccr;
44 45  
45 46 struct dma_slave_config cfg;
46 47 unsigned dma_sig;
... ... @@ -552,6 +553,21 @@
552 553 }
553 554 }
554 555  
  556 + if (dma_omap1()) {
  557 + if (__dma_omap16xx(od->plat->dma_attr)) {
  558 + c->ccr = CCR_OMAP31_DISABLE;
  559 + /* Duplicate what plat-omap/dma.c does */
  560 + c->ccr |= c->dma_ch + 1;
  561 + } else {
  562 + c->ccr = c->dma_sig & 0x1f;
  563 + }
  564 + } else {
  565 + c->ccr = c->dma_sig & 0x1f;
  566 + c->ccr |= (c->dma_sig & ~0x1f) << 14;
  567 + }
  568 + if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
  569 + c->ccr |= CCR_BUFFERING_DISABLE;
  570 +
555 571 return ret;
556 572 }
557 573  
... ... @@ -787,7 +803,7 @@
787 803 d->dev_addr = dev_addr;
788 804 d->es = es;
789 805  
790   - d->ccr = CCR_SYNC_FRAME;
  806 + d->ccr = c->ccr | CCR_SYNC_FRAME;
791 807 if (dir == DMA_DEV_TO_MEM)
792 808 d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
793 809 else
... ... @@ -797,14 +813,6 @@
797 813 d->csdp = es;
798 814  
799 815 if (dma_omap1()) {
800   - if (__dma_omap16xx(od->plat->dma_attr)) {
801   - d->ccr |= CCR_OMAP31_DISABLE;
802   - /* Duplicate what plat-omap/dma.c does */
803   - d->ccr |= c->dma_ch + 1;
804   - } else {
805   - d->ccr |= c->dma_sig & 0x1f;
806   - }
807   -
808 816 d->cicr |= CICR_TOUT_IE;
809 817  
810 818 if (dir == DMA_DEV_TO_MEM)
811 819  
... ... @@ -812,16 +820,11 @@
812 820 else
813 821 d->csdp |= CSDP_DST_PORT_TIPB | CSDP_SRC_PORT_EMIFF;
814 822 } else {
815   - d->ccr |= (c->dma_sig & ~0x1f) << 14;
816   - d->ccr |= c->dma_sig & 0x1f;
817   -
818 823 if (dir == DMA_DEV_TO_MEM)
819 824 d->ccr |= CCR_TRIGGER_SRC;
820 825  
821 826 d->cicr |= CICR_MISALIGNED_ERR_IE | CICR_TRANS_ERR_IE;
822 827 }
823   - if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
824   - d->ccr |= CCR_BUFFERING_DISABLE;
825 828 if (od->plat->errata & DMA_ERRATA_PARALLEL_CHANNELS)
826 829 d->clnk_ctrl = c->dma_ch;
827 830  
... ... @@ -903,7 +906,7 @@
903 906 d->sg[0].fn = buf_len / period_len;
904 907 d->sglen = 1;
905 908  
906   - d->ccr = 0;
  909 + d->ccr = c->ccr;
907 910 if (dir == DMA_DEV_TO_MEM)
908 911 d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_CONSTANT;
909 912 else
... ... @@ -916,14 +919,6 @@
916 919 d->csdp = es;
917 920  
918 921 if (dma_omap1()) {
919   - if (__dma_omap16xx(od->plat->dma_attr)) {
920   - d->ccr |= CCR_OMAP31_DISABLE;
921   - /* Duplicate what plat-omap/dma.c does */
922   - d->ccr |= c->dma_ch + 1;
923   - } else {
924   - d->ccr |= c->dma_sig & 0x1f;
925   - }
926   -
927 922 d->cicr |= CICR_TOUT_IE;
928 923  
929 924 if (dir == DMA_DEV_TO_MEM)
... ... @@ -931,9 +926,6 @@
931 926 else
932 927 d->csdp |= CSDP_DST_PORT_MPUI | CSDP_SRC_PORT_EMIFF;
933 928 } else {
934   - d->ccr |= (c->dma_sig & ~0x1f) << 14;
935   - d->ccr |= c->dma_sig & 0x1f;
936   -
937 929 if (burst)
938 930 d->ccr |= CCR_SYNC_PACKET;
939 931 else
... ... @@ -946,8 +938,6 @@
946 938  
947 939 d->csdp |= CSDP_DST_BURST_64 | CSDP_SRC_BURST_64;
948 940 }
949   - if (od->plat->errata & DMA_ERRATA_IFRAME_BUFFERING)
950   - d->ccr |= CCR_BUFFERING_DISABLE;
951 941  
952 942 if (__dma_omap15xx(od->plat->dma_attr))
953 943 d->ccr |= CCR_AUTO_INIT | CCR_REPEAT;