Eric Lee / smarc-ti-linux-kernel

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Commit b24174b0cbbe383c5bb6097aeb24480b8fd2d338

Authored by Linus Torvalds
2 parents 7ed214ac20 be8fd292f9
Exists in master and in 20 other branches dlt-processor-sdk-linux-03.00.00.04, newt-ti-linux-3.12.y, processor-sdk-linux-01.00.00, processor-sdk-linux-02.00.01, smarc-ti-linux-3.12.10, smarc-ti-linux-3.12.y, smarc-ti-linux-3.14.y, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.12.y, ti-linux-3.14.y, ti-linux-3.15.y, ti-lsk-linux-4.1.y

Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull non-critical ARM SoC bug fixes from Arnd Bergmann:
 "Bug fixes that did not make it into v3.8, mostly because they were not
  considered important enough, and in some cases because bugs only show
  up in combination with other patches destined for 3.9.  This includes
  a few larger patches for GPIO on the Marvell PXA platform and a lot of
  Samsung specific bug fixes, as well as a series from Arnd to fix older
  build warnings."

* tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ
  ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere
  ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
  ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
  ARM: SAMSUNG: Silence empty switch warning in sdhci.h
  ARM: msm: proc_comm_boot_wait should not be __init
  arm: vt8500: Update MAINTAINERS entry for arch-vt8500
  ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
  ARM: S5PV210: Fix early uart output in fifo mode
  ...

Showing 71 changed files Side-by-side Diff

Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt
Diff comments   View file @ b24174b
... ... @@ -7,9 +7,9 @@
7 7  
8 8 Required Properties:
9 9 - compatible: should be one of the following.
10   - - "samsung,pinctrl-exynos4210": for Exynos4210 compatible pin-controller.
11   - - "samsung,pinctrl-exynos4x12": for Exynos4x12 compatible pin-controller.
12   - - "samsung,pinctrl-exynos5250": for Exynos5250 compatible pin-controller.
  10 + - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
  11 + - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
  12 + - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
13 13  
14 14 - reg: Base address of the pin controller hardware module and length of
15 15 the address space it occupies.
... ... @@ -142,7 +142,7 @@
142 142 Example: A pin-controller node with pin banks:
143 143  
144 144 pinctrl_0: pinctrl@11400000 {
145   - compatible = "samsung,pinctrl-exynos4210";
  145 + compatible = "samsung,exynos4210-pinctrl";
146 146 reg = <0x11400000 0x1000>;
147 147 interrupts = <0 47 0>;
148 148  
... ... @@ -185,7 +185,7 @@
185 185 Example 1: A pin-controller node with pin groups.
186 186  
187 187 pinctrl_0: pinctrl@11400000 {
188   - compatible = "samsung,pinctrl-exynos4210";
  188 + compatible = "samsung,exynos4210-pinctrl";
189 189 reg = <0x11400000 0x1000>;
190 190 interrupts = <0 47 0>;
191 191  
... ... @@ -230,7 +230,7 @@
230 230 Example 2: A pin-controller node with external wakeup interrupt controller node.
231 231  
232 232 pinctrl_1: pinctrl@11000000 {
233   - compatible = "samsung,pinctrl-exynos4210";
  233 + compatible = "samsung,exynos4210-pinctrl";
234 234 reg = <0x11000000 0x1000>;
235 235 interrupts = <0 46 0>
236 236  
... ... @@ -1256,12 +1256,17 @@
1256 1256 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1257 1257 S: Maintained
1258 1258 F: arch/arm/mach-vt8500/
  1259 +F: drivers/clocksource/vt8500_timer.c
  1260 +F: drivers/gpio/gpio-vt8500.c
  1261 +F: drivers/mmc/host/wmt-sdmmc.c
  1262 +F: drivers/pwm/pwm-vt8500.c
  1263 +F: drivers/rtc/rtc-vt8500.c
  1264 +F: drivers/tty/serial/vt8500_serial.c
  1265 +F: drivers/usb/host/ehci-vt8500.c
  1266 +F: drivers/usb/host/uhci-platform.c
1259 1267 F: drivers/video/vt8500lcdfb.*
1260 1268 F: drivers/video/wm8505fb*
1261 1269 F: drivers/video/wmt_ge_rops.*
1262   -F: drivers/tty/serial/vt8500_serial.c
1263   -F: drivers/rtc/rtc-vt8500.c
1264   -F: drivers/mmc/host/wmt-sdmmc.c
1265 1270  
1266 1271 ARM/ZIPIT Z2 SUPPORT
1267 1272 M: Marek Vasut <marek.vasut@gmail.com>
... ... @@ -1269,6 +1274,14 @@
1269 1274 S: Maintained
1270 1275 F: arch/arm/mach-pxa/z2.c
1271 1276 F: arch/arm/mach-pxa/include/mach/z2.h
  1277 +
  1278 +ARM/ZYNQ ARCHITECTURE
  1279 +M: Michal Simek <michal.simek@xilinx.com>
  1280 +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
  1281 +W: http://wiki.xilinx.com
  1282 +T: git git://git.xilinx.com/linux-xlnx.git
  1283 +S: Supported
  1284 +F: arch/arm/mach-zynq/
1272 1285  
1273 1286 ARM64 PORT (AARCH64 ARCHITECTURE)
1274 1287 M: Catalin Marinas <catalin.marinas@arm.com>
... ... @@ -260,7 +260,8 @@
260 260 #
261 261 choice
262 262 prompt "ARM system type"
263   - default ARCH_MULTIPLATFORM
  263 + default ARCH_VERSATILE if !MMU
  264 + default ARCH_MULTIPLATFORM if MMU
264 265  
265 266 config ARCH_MULTIPLATFORM
266 267 bool "Allow multiple platforms to be selected"
... ... @@ -1448,6 +1449,10 @@
1448 1449 config ISA_DMA
1449 1450 bool
1450 1451 select ISA_DMA_API
  1452 +
  1453 +config ARCH_NO_VIRT_TO_BUS
  1454 + def_bool y
  1455 + depends on !ARCH_RPC && !ARCH_NETWINDER && !ARCH_SHARK
1451 1456  
1452 1457 # Select ISA DMA interface
1453 1458 config ISA_DMA_API
arch/arm/boot/dts/at91sam9n12.dtsi
Diff comments   View file @ b24174b
... ... @@ -324,8 +324,6 @@
324 324 compatible = "atmel,at91sam9260-usart";
325 325 reg = <0xf801c000 0x4000>;
326 326 interrupts = <5 4 5>;
327   - atmel,use-dma-rx;
328   - atmel,use-dma-tx;
329 327 pinctrl-names = "default";
330 328 pinctrl-0 = <&pinctrl_usart0>;
331 329 status = "disabled";
... ... @@ -335,8 +333,6 @@
335 333 compatible = "atmel,at91sam9260-usart";
336 334 reg = <0xf8020000 0x4000>;
337 335 interrupts = <6 4 5>;
338   - atmel,use-dma-rx;
339   - atmel,use-dma-tx;
340 336 pinctrl-names = "default";
341 337 pinctrl-0 = <&pinctrl_usart1>;
342 338 status = "disabled";
... ... @@ -346,8 +342,6 @@
346 342 compatible = "atmel,at91sam9260-usart";
347 343 reg = <0xf8024000 0x4000>;
348 344 interrupts = <7 4 5>;
349   - atmel,use-dma-rx;
350   - atmel,use-dma-tx;
351 345 pinctrl-names = "default";
352 346 pinctrl-0 = <&pinctrl_usart2>;
353 347 status = "disabled";
... ... @@ -357,8 +351,6 @@
357 351 compatible = "atmel,at91sam9260-usart";
358 352 reg = <0xf8028000 0x4000>;
359 353 interrupts = <8 4 5>;
360   - atmel,use-dma-rx;
361   - atmel,use-dma-tx;
362 354 pinctrl-names = "default";
363 355 pinctrl-0 = <&pinctrl_usart3>;
364 356 status = "disabled";
arch/arm/boot/dts/at91sam9x5.dtsi
Diff comments   View file @ b24174b
... ... @@ -197,9 +197,9 @@
197 197 };
198 198  
199 199 usart3 {
200   - pinctrl_uart3: usart3-0 {
  200 + pinctrl_usart3: usart3-0 {
201 201 atmel,pins =
202   - <2 23 0x2 0x1 /* PC22 periph B with pullup */
  202 + <2 22 0x2 0x1 /* PC22 periph B with pullup */
203 203 2 23 0x2 0x0>; /* PC23 periph B */
204 204 };
205 205  
... ... @@ -402,8 +402,6 @@
402 402 compatible = "atmel,at91sam9260-usart";
403 403 reg = <0xf801c000 0x200>;
404 404 interrupts = <5 4 5>;
405   - atmel,use-dma-rx;
406   - atmel,use-dma-tx;
407 405 pinctrl-names = "default";
408 406 pinctrl-0 = <&pinctrl_usart0>;
409 407 status = "disabled";
... ... @@ -413,8 +411,6 @@
413 411 compatible = "atmel,at91sam9260-usart";
414 412 reg = <0xf8020000 0x200>;
415 413 interrupts = <6 4 5>;
416   - atmel,use-dma-rx;
417   - atmel,use-dma-tx;
418 414 pinctrl-names = "default";
419 415 pinctrl-0 = <&pinctrl_usart1>;
420 416 status = "disabled";
... ... @@ -424,8 +420,6 @@
424 420 compatible = "atmel,at91sam9260-usart";
425 421 reg = <0xf8024000 0x200>;
426 422 interrupts = <7 4 5>;
427   - atmel,use-dma-rx;
428   - atmel,use-dma-tx;
429 423 pinctrl-names = "default";
430 424 pinctrl-0 = <&pinctrl_usart2>;
431 425 status = "disabled";
arch/arm/boot/dts/dove.dtsi
Diff comments   View file @ b24174b
... ... @@ -93,6 +93,7 @@
93 93 reg = <0xd0400 0x20>;
94 94 ngpios = <32>;
95 95 interrupt-controller;
  96 + #interrupt-cells = <2>;
96 97 interrupts = <12>, <13>, <14>, <60>;
97 98 };
98 99  
... ... @@ -103,6 +104,7 @@
103 104 reg = <0xd0420 0x20>;
104 105 ngpios = <32>;
105 106 interrupt-controller;
  107 + #interrupt-cells = <2>;
106 108 interrupts = <61>;
107 109 };
108 110  
arch/arm/boot/dts/exynos4210.dtsi
Diff comments   View file @ b24174b
... ... @@ -48,13 +48,13 @@
48 48 };
49 49  
50 50 pinctrl_0: pinctrl@11400000 {
51   - compatible = "samsung,pinctrl-exynos4210";
  51 + compatible = "samsung,exynos4210-pinctrl";
52 52 reg = <0x11400000 0x1000>;
53 53 interrupts = <0 47 0>;
54 54 };
55 55  
56 56 pinctrl_1: pinctrl@11000000 {
57   - compatible = "samsung,pinctrl-exynos4210";
  57 + compatible = "samsung,exynos4210-pinctrl";
58 58 reg = <0x11000000 0x1000>;
59 59 interrupts = <0 46 0>;
60 60  
... ... @@ -66,7 +66,7 @@
66 66 };
67 67  
68 68 pinctrl_2: pinctrl@03860000 {
69   - compatible = "samsung,pinctrl-exynos4210";
  69 + compatible = "samsung,exynos4210-pinctrl";
70 70 reg = <0x03860000 0x1000>;
71 71 };
72 72  
arch/arm/boot/dts/exynos4x12-pinctrl.dtsi
Diff comments   View file @ b24174b
... ... @@ -661,7 +661,7 @@
661 661  
662 662 sd4_bus8: sd4-bus-width8 {
663 663 samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6";
664   - samsung,pin-function = <3>;
  664 + samsung,pin-function = <4>;
665 665 samsung,pin-pud = <4>;
666 666 samsung,pin-drv = <3>;
667 667 };
arch/arm/boot/dts/exynos4x12.dtsi
Diff comments   View file @ b24174b
... ... @@ -37,13 +37,13 @@
37 37 };
38 38  
39 39 pinctrl_0: pinctrl@11400000 {
40   - compatible = "samsung,pinctrl-exynos4x12";
  40 + compatible = "samsung,exynos4x12-pinctrl";
41 41 reg = <0x11400000 0x1000>;
42 42 interrupts = <0 47 0>;
43 43 };
44 44  
45 45 pinctrl_1: pinctrl@11000000 {
46   - compatible = "samsung,pinctrl-exynos4x12";
  46 + compatible = "samsung,exynos4x12-pinctrl";
47 47 reg = <0x11000000 0x1000>;
48 48 interrupts = <0 46 0>;
49 49  
50 50  
... ... @@ -55,14 +55,14 @@
55 55 };
56 56  
57 57 pinctrl_2: pinctrl@03860000 {
58   - compatible = "samsung,pinctrl-exynos4x12";
  58 + compatible = "samsung,exynos4x12-pinctrl";
59 59 reg = <0x03860000 0x1000>;
60 60 interrupt-parent = <&combiner>;
61 61 interrupts = <10 0>;
62 62 };
63 63  
64 64 pinctrl_3: pinctrl@106E0000 {
65   - compatible = "samsung,pinctrl-exynos4x12";
  65 + compatible = "samsung,exynos4x12-pinctrl";
66 66 reg = <0x106E0000 0x1000>;
67 67 interrupts = <0 72 0>;
68 68 };
arch/arm/boot/dts/exynos5440.dtsi
Diff comments   View file @ b24174b
... ... @@ -86,7 +86,7 @@
86 86 };
87 87  
88 88 pinctrl {
89   - compatible = "samsung,pinctrl-exynos5440";
  89 + compatible = "samsung,exynos5440-pinctrl";
90 90 reg = <0xE0000 0x1000>;
91 91 interrupt-controller;
92 92 #interrupt-cells = <2>;
... ... @@ -154,7 +154,7 @@
154 154 rtc {
155 155 compatible = "samsung,s3c6410-rtc";
156 156 reg = <0x130000 0x1000>;
157   - interrupts = <0 16 0>, <0 17 0>;
  157 + interrupts = <0 17 0>, <0 16 0>;
158 158 };
159 159 };
arch/arm/boot/dts/imx6q.dtsi
Diff comments   View file @ b24174b
... ... @@ -866,7 +866,7 @@
866 866 compatible = "fsl,imx6q-fec";
867 867 reg = <0x02188000 0x4000>;
868 868 interrupts = <0 118 0x04 0 119 0x04>;
869   - clocks = <&clks 117>, <&clks 117>, <&clks 177>;
  869 + clocks = <&clks 117>, <&clks 117>, <&clks 190>;
870 870 clock-names = "ipg", "ahb", "ptp";
871 871 status = "disabled";
872 872 };
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
Diff comments   View file @ b24174b
... ... @@ -70,7 +70,7 @@
70 70 compatible = "arm,sp805", "arm,primecell";
71 71 status = "disabled";
72 72 reg = <0 0x2b060000 0 0x1000>;
73   - interrupts = <98>;
  73 + interrupts = <0 98 4>;
74 74 clocks = <&oscclk7>;
75 75 clock-names = "apb_pclk";
76 76 };
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
Diff comments   View file @ b24174b
... ... @@ -72,7 +72,7 @@
72 72 wdt@2a490000 {
73 73 compatible = "arm,sp805", "arm,primecell";
74 74 reg = <0 0x2a490000 0 0x1000>;
75   - interrupts = <98>;
  75 + interrupts = <0 98 4>;
76 76 clocks = <&oscclk6a>, <&oscclk6a>;
77 77 clock-names = "wdogclk", "apb_pclk";
78 78 };
arch/arm/configs/marzen_defconfig
Diff comments   View file @ b24174b
... ... @@ -83,7 +83,6 @@
83 83 CONFIG_USB_RCAR_PHY=y
84 84 CONFIG_MMC=y
85 85 CONFIG_MMC_SDHI=y
86   -CONFIG_USB=y
87 86 CONFIG_USB_EHCI_HCD=y
88 87 CONFIG_USB_OHCI_HCD=y
89 88 CONFIG_USB_OHCI_HCD_PLATFORM=y
arch/arm/configs/mvebu_defconfig
Diff comments   View file @ b24174b
... ... @@ -33,6 +33,8 @@
33 33 CONFIG_MARVELL_PHY=y
34 34 CONFIG_SERIAL_8250=y
35 35 CONFIG_SERIAL_8250_CONSOLE=y
  36 +CONFIG_I2C=y
  37 +CONFIG_I2C_MV64XXX=y
36 38 CONFIG_SERIAL_8250_DW=y
37 39 CONFIG_GPIOLIB=y
38 40 CONFIG_GPIO_SYSFS=y
arch/arm/configs/shark_defconfig
Diff comments   View file @ b24174b
... ... @@ -73,7 +73,6 @@
73 73 CONFIG_NLS_CODEPAGE_437=m
74 74 CONFIG_NLS_CODEPAGE_850=m
75 75 CONFIG_NLS_ISO8859_1=m
76   -# CONFIG_ENABLE_WARN_DEPRECATED is not set
77 76 # CONFIG_ENABLE_MUST_CHECK is not set
78 77 CONFIG_DEBUG_KERNEL=y
79 78 # CONFIG_SCHED_DEBUG is not set
arch/arm/configs/u8500_defconfig
Diff comments   View file @ b24174b
... ... @@ -66,9 +66,9 @@
66 66 CONFIG_SPI_PL022=y
67 67 CONFIG_GPIO_STMPE=y
68 68 CONFIG_GPIO_TC3589X=y
69   -CONFIG_POWER_SUPPLY=y
70   -CONFIG_AB8500_BM=y
71   -CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL=y
  69 +# CONFIG_POWER_SUPPLY is not set
  70 +# CONFIG_AB8500_BM is not set
  71 +# CONFIG_AB8500_BATTERY_THERM_ON_BATCTRL is not set
72 72 CONFIG_THERMAL=y
73 73 CONFIG_CPU_THERMAL=y
74 74 CONFIG_MFD_STMPE=y
arch/arm/include/asm/dma.h
Diff comments   View file @ b24174b
... ... @@ -105,7 +105,7 @@
105 105 */
106 106 extern void __set_dma_addr(unsigned int chan, void *addr);
107 107 #define set_dma_addr(chan, addr) \
108   - __set_dma_addr(chan, bus_to_virt(addr))
  108 + __set_dma_addr(chan, (void *)__bus_to_virt(addr))
109 109  
110 110 /* Set the DMA byte count for this channel
111 111 *
arch/arm/include/asm/memory.h
Diff comments   View file @ b24174b
... ... @@ -245,6 +245,7 @@
245 245 #define __bus_to_pfn(x) __phys_to_pfn(x)
246 246 #endif
247 247  
  248 +#ifdef CONFIG_VIRT_TO_BUS
248 249 static inline __deprecated unsigned long virt_to_bus(void *x)
249 250 {
250 251 return __virt_to_bus((unsigned long)x);
... ... @@ -254,6 +255,7 @@
254 255 {
255 256 return (void *)__bus_to_virt(x);
256 257 }
  258 +#endif
257 259  
258 260 /*
259 261 * Conversion between a struct page and a physical address.
arch/arm/mach-exynos/common.c
Diff comments   View file @ b24174b
... ... @@ -299,6 +299,7 @@
299 299  
300 300 void exynos5_restart(char mode, const char *cmd)
301 301 {
  302 + struct device_node *np;
302 303 u32 val;
303 304 void __iomem *addr;
304 305  
... ... @@ -306,8 +307,9 @@
306 307 val = 0x1;
307 308 addr = EXYNOS_SWRESET;
308 309 } else if (of_machine_is_compatible("samsung,exynos5440")) {
309   - val = (0x10 << 20) | (0x1 << 16);
310   - addr = EXYNOS5440_SWRESET;
  310 + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
  311 + addr = of_iomap(np, 0) + 0xcc;
  312 + val = (0xfff << 20) | (0x1 << 16);
311 313 } else {
312 314 pr_err("%s: cannot support non-DT\n", __func__);
313 315 return;
... ... @@ -1031,8 +1033,8 @@
1031 1033 * interrupt support code here can be completely removed.
1032 1034 */
1033 1035 static const struct of_device_id exynos_pinctrl_ids[] = {
1034   - { .compatible = "samsung,pinctrl-exynos4210", },
1035   - { .compatible = "samsung,pinctrl-exynos4x12", },
  1036 + { .compatible = "samsung,exynos4210-pinctrl", },
  1037 + { .compatible = "samsung,exynos4x12-pinctrl", },
1036 1038 };
1037 1039 struct device_node *pctrl_np, *wkup_np;
1038 1040 const char *wkup_compat = "samsung,exynos4210-wakeup-eint";
arch/arm/mach-exynos/pm.c
Diff comments   View file @ b24174b
... ... @@ -91,8 +91,8 @@
91 91 /* issue the standby signal into the pm unit. */
92 92 cpu_do_idle();
93 93  
94   - /* we should never get past here */
95   - panic("sleep resumed to originator?");
  94 + pr_info("Failed to suspend the system\n");
  95 + return 1; /* Aborting suspend */
96 96 }
97 97  
98 98 static void exynos_pm_prepare(void)
... ... @@ -282,6 +282,8 @@
282 282 if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
283 283 tmp |= S5P_CENTRAL_LOWPWR_CFG;
284 284 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
  285 + /* clear the wakeup state register */
  286 + __raw_writel(0x0, S5P_WAKEUP_STAT);
285 287 /* No need to perform below restore code */
286 288 goto early_wakeup;
287 289 }
arch/arm/mach-imx/Kconfig
Diff comments   View file @ b24174b
... ... @@ -488,7 +488,7 @@
488 488 bool "Support Wolfson Microelectronics 1133-EV1 module"
489 489 depends on MACH_MX31ADS
490 490 depends on MFD_WM8350_I2C
491   - depends on REGULATOR_WM8350
  491 + depends on REGULATOR_WM8350 = y
492 492 select MFD_WM8350_CONFIG_MODE_0
493 493 select MFD_WM8352_CONFIG_MODE_0
494 494 help
arch/arm/mach-imx/clk-imx25.c
Diff comments   View file @ b24174b
... ... @@ -224,6 +224,9 @@
224 224  
225 225 clk_prepare_enable(clk[emi_ahb]);
226 226  
  227 + /* Clock source for gpt must be derived from AHB */
  228 + clk_set_parent(clk[per5_sel], clk[ahb]);
  229 +
227 230 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
228 231 clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
229 232  
arch/arm/mach-imx/clk-imx27.c
Diff comments   View file @ b24174b
... ... @@ -228,9 +228,12 @@
228 228 clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
229 229 clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
230 230 clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
231   - clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
232   - clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
233   - clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
  231 + clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.0");
  232 + clk_register_clkdev(clk[cspi1_ipg_gate], "ipg", "imx27-cspi.0");
  233 + clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.1");
  234 + clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx27-cspi.1");
  235 + clk_register_clkdev(clk[per2_gate], "per", "imx27-cspi.2");
  236 + clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx27-cspi.2");
234 237 clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
235 238 clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
236 239 clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
arch/arm/mach-integrator/common.h
Diff comments   View file @ b24174b
1 1 #include <linux/amba/serial.h>
2   -#ifdef CONFIG_ARCH_INTEGRATOR_AP
3 2 extern struct amba_pl010_data ap_uart_data;
4   -#else
5   -/* Not used without Integrator/AP support anyway */
6   -struct amba_pl010_data ap_uart_data {};
7   -#endif
8 3 void integrator_init_early(void);
9 4 int integrator_init(bool is_cp);
10 5 void integrator_reserve(void);
arch/arm/mach-integrator/core.c
Diff comments   View file @ b24174b
... ... @@ -71,7 +71,7 @@
71 71 * hard-code them. The Integator/CP and forward have proper cell IDs.
72 72 * Else we leave them undefined to the bus driver can autoprobe them.
73 73 */
74   - if (!is_cp) {
  74 + if (!is_cp && IS_ENABLED(CONFIG_ARCH_INTEGRATOR_AP)) {
75 75 rtc_device.periphid = 0x00041030;
76 76 uart0_device.periphid = 0x00041010;
77 77 uart1_device.periphid = 0x00041010;
arch/arm/mach-integrator/integrator_ap.c
Diff comments   View file @ b24174b
... ... @@ -94,7 +94,7 @@
94 94 * f1b00000 1b000000 GPIO
95 95 */
96 96  
97   -static struct map_desc ap_io_desc[] __initdata = {
  97 +static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
98 98 {
99 99 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
100 100 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
... ... @@ -613,7 +613,6 @@
613 613 static void __init ap_map_io_atag(void)
614 614 {
615 615 iotable_init(ap_io_desc_atag, ARRAY_SIZE(ap_io_desc_atag));
616   - ap_syscon_base = __io_address(INTEGRATOR_SC_BASE);
617 616 ap_map_io();
618 617 }
619 618  
... ... @@ -685,6 +684,7 @@
685 684  
686 685 platform_device_register(&cfi_flash_device);
687 686  
  687 + ap_syscon_base = __io_address(INTEGRATOR_SC_BASE);
688 688 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
689 689 for (i = 0; i < 4; i++) {
690 690 struct lm_device *lmdev;
arch/arm/mach-integrator/integrator_cp.c
Diff comments   View file @ b24174b
... ... @@ -78,7 +78,7 @@
78 78 * fcb00000 cb000000 CP system control
79 79 */
80 80  
81   -static struct map_desc intcp_io_desc[] __initdata = {
  81 +static struct map_desc intcp_io_desc[] __initdata __maybe_unused = {
82 82 {
83 83 .virtual = IO_ADDRESS(INTEGRATOR_HDR_BASE),
84 84 .pfn = __phys_to_pfn(INTEGRATOR_HDR_BASE),
arch/arm/mach-msm/proc_comm.h
Diff comments   View file @ b24174b
... ... @@ -253,7 +253,7 @@
253 253 (((drvstr) & 0xF) << 17))
254 254  
255 255 int msm_proc_comm(unsigned cmd, unsigned *data1, unsigned *data2);
256   -void __init proc_comm_boot_wait(void);
  256 +void proc_comm_boot_wait(void);
257 257  
258 258 #endif
arch/arm/mach-mvebu/Makefile
Diff comments   View file @ b24174b
... ... @@ -3,8 +3,9 @@
3 3  
4 4 AFLAGS_coherency_ll.o := -Wa,-march=armv7-a
5 5  
6   -obj-y += system-controller.o
7   -obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o addr-map.o coherency.o coherency_ll.o pmsu.o
  6 +obj-y += system-controller.o
  7 +obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o
  8 +obj-$(CONFIG_ARCH_MVEBU) += addr-map.o coherency.o coherency_ll.o pmsu.o irq-armada-370-xp.o
8 9 obj-$(CONFIG_SMP) += platsmp.o headsmp.o
9 10 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
arch/arm/mach-omap2/omap-wakeupgen.c
Diff comments   View file @ b24174b
... ... @@ -46,7 +46,7 @@
46 46  
47 47 static void __iomem *wakeupgen_base;
48 48 static void __iomem *sar_base;
49   -static DEFINE_SPINLOCK(wakeupgen_lock);
  49 +static DEFINE_RAW_SPINLOCK(wakeupgen_lock);
50 50 static unsigned int irq_target_cpu[MAX_IRQS];
51 51 static unsigned int irq_banks = MAX_NR_REG_BANKS;
52 52 static unsigned int max_irqs = MAX_IRQS;
53 53  
... ... @@ -134,9 +134,9 @@
134 134 {
135 135 unsigned long flags;
136 136  
137   - spin_lock_irqsave(&wakeupgen_lock, flags);
  137 + raw_spin_lock_irqsave(&wakeupgen_lock, flags);
138 138 _wakeupgen_clear(d->irq, irq_target_cpu[d->irq]);
139   - spin_unlock_irqrestore(&wakeupgen_lock, flags);
  139 + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
140 140 }
141 141  
142 142 /*
143 143  
... ... @@ -146,9 +146,9 @@
146 146 {
147 147 unsigned long flags;
148 148  
149   - spin_lock_irqsave(&wakeupgen_lock, flags);
  149 + raw_spin_lock_irqsave(&wakeupgen_lock, flags);
150 150 _wakeupgen_set(d->irq, irq_target_cpu[d->irq]);
151   - spin_unlock_irqrestore(&wakeupgen_lock, flags);
  151 + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
152 152 }
153 153  
154 154 #ifdef CONFIG_HOTPLUG_CPU
... ... @@ -189,7 +189,7 @@
189 189 {
190 190 unsigned long flags;
191 191  
192   - spin_lock_irqsave(&wakeupgen_lock, flags);
  192 + raw_spin_lock_irqsave(&wakeupgen_lock, flags);
193 193 if (set) {
194 194 _wakeupgen_save_masks(cpu);
195 195 _wakeupgen_set_all(cpu, WKG_MASK_ALL);
... ... @@ -197,7 +197,7 @@
197 197 _wakeupgen_set_all(cpu, WKG_UNMASK_ALL);
198 198 _wakeupgen_restore_masks(cpu);
199 199 }
200   - spin_unlock_irqrestore(&wakeupgen_lock, flags);
  200 + raw_spin_unlock_irqrestore(&wakeupgen_lock, flags);
201 201 }
202 202 #endif
203 203  
arch/arm/mach-omap2/timer.c
Diff comments   View file @ b24174b
... ... @@ -228,7 +228,7 @@
228 228 int r = 0;
229 229  
230 230 if (of_have_populated_dt()) {
231   - np = omap_get_timer_dt(omap_timer_match, NULL);
  231 + np = omap_get_timer_dt(omap_timer_match, property);
232 232 if (!np)
233 233 return -ENODEV;
234 234  
arch/arm/mach-omap2/twl-common.c
Diff comments   View file @ b24174b
... ... @@ -23,6 +23,7 @@
23 23 #include <linux/i2c.h>
24 24 #include <linux/i2c/twl.h>
25 25 #include <linux/gpio.h>
  26 +#include <linux/string.h>
26 27 #include <linux/regulator/machine.h>
27 28 #include <linux/regulator/fixed.h>
28 29  
... ... @@ -56,7 +57,7 @@
56 57 struct twl4030_platform_data *pmic_data)
57 58 {
58 59 omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
59   - strncpy(pmic_i2c_board_info.type, pmic_type,
  60 + strlcpy(pmic_i2c_board_info.type, pmic_type,
60 61 sizeof(pmic_i2c_board_info.type));
61 62 pmic_i2c_board_info.irq = pmic_irq;
62 63 pmic_i2c_board_info.platform_data = pmic_data;
arch/arm/mach-pxa/include/mach/palmtreo.h
Diff comments   View file @ b24174b
... ... @@ -38,13 +38,14 @@
38 38 #define GPIO_NR_TREO_LCD_POWER 25
39 39  
40 40 /* Treo680 specific GPIOs */
41   -#ifdef CONFIG_MACH_TREO680
42 41 #define GPIO_NR_TREO680_SD_READONLY 33
43 42 #define GPIO_NR_TREO680_SD_POWER 42
44 43 #define GPIO_NR_TREO680_VIBRATE_EN 44
45 44 #define GPIO_NR_TREO680_KEYB_BL 24
46 45 #define GPIO_NR_TREO680_BT_EN 43
47   -#endif /* CONFIG_MACH_TREO680 */
  46 +#define GPIO_NR_TREO680_LCD_POWER 77
  47 +#define GPIO_NR_TREO680_LCD_EN 86
  48 +#define GPIO_NR_TREO680_LCD_EN_N 25
48 49  
49 50 /* Centro685 specific GPIOs */
50 51 #define GPIO_NR_CENTRO_SD_POWER 21
arch/arm/mach-pxa/include/mach/smemc.h
Diff comments   View file @ b24174b
... ... @@ -37,6 +37,7 @@
37 37 #define CSADRCFG1 (SMEMC_VIRT + 0x84) /* Address Configuration Register for CS1 */
38 38 #define CSADRCFG2 (SMEMC_VIRT + 0x88) /* Address Configuration Register for CS2 */
39 39 #define CSADRCFG3 (SMEMC_VIRT + 0x8C) /* Address Configuration Register for CS3 */
  40 +#define CSMSADRCFG (SMEMC_VIRT + 0xA0) /* Chip Select Configuration Register */
40 41  
41 42 /*
42 43 * More handy macros for PCMCIA
arch/arm/mach-pxa/palmtreo.c
Diff comments   View file @ b24174b
... ... @@ -98,9 +98,6 @@
98 98 GPIO96_KP_MKOUT_6,
99 99 GPIO93_KP_DKIN_0 | WAKEUP_ON_LEVEL_HIGH, /* Hotsync button */
100 100  
101   - /* LCD */
102   - GPIOxx_LCD_TFT_16BPP,
103   -
104 101 /* Quick Capture Interface */
105 102 GPIO84_CIF_FV,
106 103 GPIO85_CIF_LV,
... ... @@ -140,6 +137,12 @@
140 137 /* MATRIX KEYPAD - different wake up source */
141 138 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
142 139 GPIO99_KP_MKIN_5,
  140 +
  141 + /* LCD... L_BIAS alt fn not configured on Treo680; is GPIO instead */
  142 + GPIOxx_LCD_16BPP,
  143 + GPIO74_LCD_FCLK,
  144 + GPIO75_LCD_LCLK,
  145 + GPIO76_LCD_PCLK,
143 146 };
144 147 #endif /* CONFIG_MACH_TREO680 */
145 148  
... ... @@ -155,6 +158,9 @@
155 158 /* MATRIX KEYPAD - different wake up source */
156 159 GPIO100_KP_MKIN_0,
157 160 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  161 +
  162 + /* LCD */
  163 + GPIOxx_LCD_TFT_16BPP,
158 164 };
159 165 #endif /* CONFIG_MACH_CENTRO */
160 166  
... ... @@ -328,7 +334,6 @@
328 334 /******************************************************************************
329 335 * Vibra and LEDs
330 336 ******************************************************************************/
331   -#ifdef CONFIG_MACH_TREO680
332 337 static struct gpio_led treo680_gpio_leds[] = {
333 338 {
334 339 .name = "treo680:vibra:vibra",
335 340  
336 341  
... ... @@ -379,21 +384,17 @@
379 384 static struct platform_device palmtreo_leds = {
380 385 .name = "leds-gpio",
381 386 .id = -1,
382   - .dev = {
383   - .platform_data = &treo680_gpio_led_info,
384   - }
385 387 };
386 388  
387 389 static void __init palmtreo_leds_init(void)
388 390 {
389 391 if (machine_is_centro())
390 392 palmtreo_leds.dev.platform_data = &centro_gpio_led_info;
  393 + else if (machine_is_treo680())
  394 + palmtreo_leds.dev.platform_data = &treo680_gpio_led_info;
391 395  
392 396 platform_device_register(&palmtreo_leds);
393 397 }
394   -#else
395   -static inline void palmtreo_leds_init(void) {}
396   -#endif
397 398  
398 399 /******************************************************************************
399 400 * Machine init
400 401  
... ... @@ -424,10 +425,59 @@
424 425 }
425 426  
426 427 #ifdef CONFIG_MACH_TREO680
  428 +void __init treo680_gpio_init(void)
  429 +{
  430 + unsigned int gpio;
  431 +
  432 + /* drive all three lcd gpios high initially */
  433 + const unsigned long lcd_flags = GPIOF_INIT_HIGH | GPIOF_DIR_OUT;
  434 +
  435 + /*
  436 + * LCD GPIO initialization...
  437 + */
  438 +
  439 + /*
  440 + * This is likely the power to the lcd. Toggling it low/high appears to
  441 + * turn the lcd off/on. Can be toggled after lcd is initialized without
  442 + * any apparent adverse effects to the lcd operation. Note that this
  443 + * gpio line is used by the lcd controller as the L_BIAS signal, but
  444 + * treo680 configures it as gpio.
  445 + */
  446 + gpio = GPIO_NR_TREO680_LCD_POWER;
  447 + if (gpio_request_one(gpio, lcd_flags, "LCD power") < 0)
  448 + goto fail;
  449 +
  450 + /*
  451 + * These two are called "enables", for lack of a better understanding.
  452 + * If either of these are toggled after the lcd is initialized, the
  453 + * image becomes degraded. N.B. The IPL shipped with the treo
  454 + * configures GPIO_NR_TREO680_LCD_EN_N as output and drives it high. If
  455 + * the IPL is ever reprogrammed, this initialization may be need to be
  456 + * revisited.
  457 + */
  458 + gpio = GPIO_NR_TREO680_LCD_EN;
  459 + if (gpio_request_one(gpio, lcd_flags, "LCD enable") < 0)
  460 + goto fail;
  461 + gpio = GPIO_NR_TREO680_LCD_EN_N;
  462 + if (gpio_request_one(gpio, lcd_flags, "LCD enable_n") < 0)
  463 + goto fail;
  464 +
  465 + /* driving this low turns LCD on */
  466 + gpio_set_value(GPIO_NR_TREO680_LCD_EN_N, 0);
  467 +
  468 + return;
  469 + fail:
  470 + pr_err("gpio %d initialization failed\n", gpio);
  471 + gpio_free(GPIO_NR_TREO680_LCD_POWER);
  472 + gpio_free(GPIO_NR_TREO680_LCD_EN);
  473 + gpio_free(GPIO_NR_TREO680_LCD_EN_N);
  474 +}
  475 +
427 476 static void __init treo680_init(void)
428 477 {
429 478 pxa2xx_mfp_config(ARRAY_AND_SIZE(treo680_pin_config));
430 479 palmphone_common_init();
  480 + treo680_gpio_init();
431 481 palm27x_mmc_init(GPIO_NR_TREO_SD_DETECT_N, GPIO_NR_TREO680_SD_READONLY,
432 482 GPIO_NR_TREO680_SD_POWER, 0);
433 483 }
arch/arm/mach-pxa/smemc.c
Diff comments   View file @ b24174b
... ... @@ -40,6 +40,8 @@
40 40 __raw_writel(csadrcfg[1], CSADRCFG1);
41 41 __raw_writel(csadrcfg[2], CSADRCFG2);
42 42 __raw_writel(csadrcfg[3], CSADRCFG3);
  43 + /* CSMSADRCFG wakes up in its default state (0), so we need to set it */
  44 + __raw_writel(0x2, CSMSADRCFG);
43 45 }
44 46  
45 47 static struct syscore_ops smemc_syscore_ops = {
46 48  
... ... @@ -49,8 +51,19 @@
49 51  
50 52 static int __init smemc_init(void)
51 53 {
52   - if (cpu_is_pxa3xx())
  54 + if (cpu_is_pxa3xx()) {
  55 + /*
  56 + * The only documentation we have on the
  57 + * Chip Select Configuration Register (CSMSADRCFG) is that
  58 + * it must be programmed to 0x2.
  59 + * Moreover, in the bit definitions, the second bit
  60 + * (CSMSADRCFG[1]) is called "SETALWAYS".
  61 + * Other bits are reserved in this register.
  62 + */
  63 + __raw_writel(0x2, CSMSADRCFG);
  64 +
53 65 register_syscore_ops(&smemc_syscore_ops);
  66 + }
54 67  
55 68 return 0;
56 69 }
arch/arm/mach-pxa/spitz.c
Diff comments   View file @ b24174b
... ... @@ -732,7 +732,7 @@
732 732 #endif
733 733  
734 734 /******************************************************************************
735   - * Framebuffer
  735 + * NAND Flash
736 736 ******************************************************************************/
737 737 #if defined(CONFIG_MTD_NAND_SHARPSL) || defined(CONFIG_MTD_NAND_SHARPSL_MODULE)
738 738 static struct mtd_partition spitz_nand_partitions[] = {
... ... @@ -858,7 +858,7 @@
858 858 #endif
859 859  
860 860 /******************************************************************************
861   - * GPIO expander
  861 + * I2C devices
862 862 ******************************************************************************/
863 863 #if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE)
864 864 static struct pca953x_platform_data akita_pca953x_pdata = {
arch/arm/mach-s3c24xx/Kconfig
Diff comments   View file @ b24174b
... ... @@ -226,6 +226,7 @@
226 226 config ARCH_SMDK2410
227 227 bool "SMDK2410/A9M2410"
228 228 select S3C24XX_SMDK
  229 + select S3C_DEV_USB_HOST
229 230 help
230 231 Say Y here if you are using the SMDK2410 or the derived module A9M2410
231 232 <http://www.fsforth.de>
... ... @@ -273,6 +274,7 @@
273 274  
274 275 config S3C2412_PM
275 276 bool
  277 + select S3C2412_PM_SLEEP
276 278 help
277 279 Internal config node to apply S3C2412 power management
278 280  
arch/arm/mach-s3c24xx/common-s3c2443.c
Diff comments   View file @ b24174b
... ... @@ -132,7 +132,7 @@
132 132 [3] = &clk_mpllref,
133 133 };
134 134  
135   -struct clksrc_clk clk_msysclk = {
  135 +static struct clksrc_clk clk_msysclk = {
136 136 .clk = {
137 137 .name = "msysclk",
138 138 .parent = &clk_xtal,
arch/arm/mach-s3c24xx/common.c
Diff comments   View file @ b24174b
... ... @@ -197,7 +197,7 @@
197 197  
198 198 static void s3c24xx_default_idle(void)
199 199 {
200   - unsigned long tmp;
  200 + unsigned long tmp = 0;
201 201 int i;
202 202  
203 203 /* idle the system by using the idle mode which will wait for an
arch/arm/mach-s3c24xx/include/mach/debug-macro.S
Diff comments   View file @ b24174b
... ... @@ -40,17 +40,17 @@
40 40 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
41 41 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
42 42 bic \rd, \rd, #0xff000
43   - ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
  43 + ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
44 44 and \rd, \rd, #0x00ff0000
45 45 teq \rd, #0x00440000 @ is it 2440?
46 46 1004:
47   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  47 + ldr \rd, [\rx, # S3C2410_UFSTAT]
48 48 moveq \rd, \rd, lsr #SHIFT_2440TXF
49 49 tst \rd, #S3C2410_UFSTAT_TXFULL
50 50 .endm
51 51  
52 52 .macro fifo_full_s3c2410 rd, rx
53   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  53 + ldr \rd, [\rx, # S3C2410_UFSTAT]
54 54 tst \rd, #S3C2410_UFSTAT_TXFULL
55 55 .endm
56 56  
57 57  
58 58  
... ... @@ -68,18 +68,18 @@
68 68 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART)
69 69 addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART)
70 70 bic \rd, \rd, #0xff000
71   - ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ]
  71 + ldr \rd, [\rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0)]
72 72 and \rd, \rd, #0x00ff0000
73 73 teq \rd, #0x00440000 @ is it 2440?
74 74  
75 75 10000:
76   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  76 + ldr \rd, [\rx, # S3C2410_UFSTAT]
77 77 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK
78 78 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK
79 79 .endm
80 80  
81 81 .macro fifo_level_s3c2410 rd, rx
82   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  82 + ldr \rd, [\rx, # S3C2410_UFSTAT]
83 83 and \rd, \rd, #S3C2410_UFSTAT_TXMASK
84 84 .endm
85 85  
arch/arm/mach-s3c24xx/include/mach/entry-macro.S
Diff comments   View file @ b24174b
... ... @@ -31,10 +31,10 @@
31 31  
32 32 @@ try the interrupt offset register, since it is there
33 33  
34   - ldr \irqstat, [ \base, #INTPND ]
  34 + ldr \irqstat, [\base, #INTPND ]
35 35 teq \irqstat, #0
36 36 beq 1002f
37   - ldr \irqnr, [ \base, #INTOFFSET ]
  37 + ldr \irqnr, [\base, #INTOFFSET ]
38 38 mov \tmp, #1
39 39 tst \irqstat, \tmp, lsl \irqnr
40 40 bne 1001f
arch/arm/mach-s3c24xx/mach-osiris.c
Diff comments   View file @ b24174b
... ... @@ -22,6 +22,7 @@
22 22 #include <linux/clk.h>
23 23 #include <linux/i2c.h>
24 24 #include <linux/io.h>
  25 +#include <linux/platform_device.h>
25 26  
26 27 #include <linux/i2c/tps65010.h>
27 28  
arch/arm/mach-s3c24xx/pm-h1940.S
Diff comments   View file @ b24174b
... ... @@ -30,5 +30,5 @@
30 30  
31 31 h1940_pm_return:
32 32 mov r0, #S3C2410_PA_GPIO
33   - ldr pc, [ r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO ]
  33 + ldr pc, [r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO]
arch/arm/mach-s3c24xx/pm-s3c2412.c
Diff comments   View file @ b24174b
... ... @@ -48,7 +48,8 @@
48 48  
49 49 s3c2412_sleep_enter();
50 50  
51   - panic("sleep resumed to originator?");
  51 + pr_info("Failed to suspend the system\n");
  52 + return 1; /* Aborting suspend */
52 53 }
53 54  
54 55 static void s3c2412_pm_prepare(void)
arch/arm/mach-s3c24xx/pm-s3c2416.c
Diff comments   View file @ b24174b
... ... @@ -34,7 +34,8 @@
34 34  
35 35 s3c2412_sleep_enter();
36 36  
37   - panic("sleep resumed to originator?");
  37 + pr_info("Failed to suspend the system\n");
  38 + return 1; /* Aborting suspend */
38 39 }
39 40  
40 41 static void s3c2416_pm_prepare(void)
arch/arm/mach-s3c24xx/sleep-s3c2410.S
Diff comments   View file @ b24174b
... ... @@ -45,9 +45,9 @@
45 45 ldr r4, =S3C2410_REFRESH
46 46 ldr r5, =S3C24XX_MISCCR
47 47 ldr r6, =S3C2410_CLKCON
48   - ldr r7, [ r4 ] @ get REFRESH (and ensure in TLB)
49   - ldr r8, [ r5 ] @ get MISCCR (and ensure in TLB)
50   - ldr r9, [ r6 ] @ get CLKCON (and ensure in TLB)
  48 + ldr r7, [r4] @ get REFRESH (and ensure in TLB)
  49 + ldr r8, [r5] @ get MISCCR (and ensure in TLB)
  50 + ldr r9, [r6] @ get CLKCON (and ensure in TLB)
51 51  
52 52 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
53 53 orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
... ... @@ -61,9 +61,9 @@
61 61 @@ align next bit of code to cache line
62 62 .align 5
63 63 s3c2410_do_sleep:
64   - streq r7, [ r4 ] @ SDRAM sleep command
65   - streq r8, [ r5 ] @ SDRAM power-down config
66   - streq r9, [ r6 ] @ CPU sleep
  64 + streq r7, [r4] @ SDRAM sleep command
  65 + streq r8, [r5] @ SDRAM power-down config
  66 + streq r9, [r6] @ CPU sleep
67 67 1: beq 1b
68 68 mov pc, r14
arch/arm/mach-s3c24xx/sleep-s3c2412.S
Diff comments   View file @ b24174b
... ... @@ -57,12 +57,12 @@
57 57 * retry, as simply returning causes the system to lock.
58 58 */
59 59  
60   - ldrne r9, [ r1 ]
61   - strne r9, [ r1 ]
62   - ldrne r9, [ r2 ]
63   - strne r9, [ r2 ]
64   - ldrne r9, [ r3 ]
65   - strne r9, [ r3 ]
  60 + ldrne r9, [r1]
  61 + strne r9, [r1]
  62 + ldrne r9, [r2]
  63 + strne r9, [r2]
  64 + ldrne r9, [r3]
  65 + strne r9, [r3]
66 66 bne s3c2412_sleep_enter1
67 67  
68 68 mov pc, r14
arch/arm/mach-s3c64xx/pm.c
Diff comments   View file @ b24174b
... ... @@ -296,7 +296,8 @@
296 296  
297 297 /* we should never get past here */
298 298  
299   - panic("sleep resumed to originator?");
  299 + pr_info("Failed to suspend the system\n");
  300 + return 1; /* Aborting suspend */
300 301 }
301 302  
302 303 /* mapping of interrupts to parts of the wakeup mask */
arch/arm/mach-s5p64x0/pm.c
Diff comments   View file @ b24174b
... ... @@ -103,8 +103,8 @@
103 103 "mcr p15, 0, %0, c7, c10, 4\n\t"
104 104 "mcr p15, 0, %0, c7, c0, 4" : : "r" (tmp));
105 105  
106   - /* we should never get past here */
107   - panic("sleep resumed to originator?");
  106 + pr_info("Failed to suspend the system\n");
  107 + return 1; /* Aborting suspend */
108 108 }
109 109  
110 110 /* mapping of interrupts to parts of the wakeup mask */
arch/arm/mach-s5pv210/include/mach/uncompress.h
Diff comments   View file @ b24174b
... ... @@ -19,6 +19,8 @@
19 19 static void arch_detect_cpu(void)
20 20 {
21 21 /* we do not need to do any cpu detection here at the moment. */
  22 + fifo_mask = S5PV210_UFSTAT_TXMASK;
  23 + fifo_max = 63 << S5PV210_UFSTAT_TXSHIFT;
22 24 }
23 25  
24 26 #endif /* __ASM_ARCH_UNCOMPRESS_H */
arch/arm/mach-s5pv210/pm.c
Diff comments   View file @ b24174b
... ... @@ -104,8 +104,8 @@
104 104 "mcr p15, 0, %0, c7, c10, 4\n\t"
105 105 "wfi" : : "r" (tmp));
106 106  
107   - /* we should never get past here */
108   - panic("sleep resumed to originator?");
  107 + pr_info("Failed to suspend the system\n");
  108 + return 1; /* Aborting suspend */
109 109 }
110 110  
111 111 static void s5pv210_pm_prepare(void)
arch/arm/mach-sa1100/lart.c
Diff comments   View file @ b24174b
... ... @@ -24,9 +24,6 @@
24 24  
25 25 #include "generic.h"
26 26  
27   -
28   -#warning "include/asm/arch-sa1100/ide.h needs fixing for lart"
29   -
30 27 static struct mcp_plat_data lart_mcp_data = {
31 28 .mccr0 = MCCR0_ADM,
32 29 .sclk_rate = 11981000,
arch/arm/mach-ux500/cpu.c
Diff comments   View file @ b24174b
... ... @@ -71,13 +71,11 @@
71 71 * Init clocks here so that they are available for system timer
72 72 * initialization.
73 73 */
74   - if (cpu_is_u8500_family())
  74 + if (cpu_is_u8500_family() || cpu_is_u9540())
75 75 db8500_prcmu_early_init();
76 76  
77   - if (cpu_is_u8500_family())
  77 + if (cpu_is_u8500_family() || cpu_is_u9540())
78 78 u8500_clk_init();
79   - else if (cpu_is_u9540())
80   - u9540_clk_init();
81 79 else if (cpu_is_u8540())
82 80 u8540_clk_init();
83 81 }
arch/arm/mach-ux500/cpuidle.c
Diff comments   View file @ b24174b
... ... @@ -40,8 +40,10 @@
40 40 goto wfi;
41 41  
42 42 /* decouple the gic from the A9 cores */
43   - if (prcmu_gic_decouple())
  43 + if (prcmu_gic_decouple()) {
  44 + spin_unlock(&master_lock);
44 45 goto out;
  46 + }
45 47  
46 48 /* If an error occur, we will have to recouple the gic
47 49 * manually */
arch/arm/mach-versatile/Kconfig
Diff comments   View file @ b24174b
... ... @@ -25,5 +25,10 @@
25 25 Include support for the ARM(R) Versatile/PB platform,
26 26 using the device tree for discovery
27 27  
  28 +config MACH_VERSATILE_AUTO
  29 + def_bool y
  30 + depends on !ARCH_VERSATILE_PB && !MACH_VERSATILE_AB
  31 + select MACH_VERSATILE_DT
  32 +
28 33 endmenu
arch/arm/mach-versatile/core.c
Diff comments   View file @ b24174b
... ... @@ -127,7 +127,7 @@
127 127 writel(PIC_MASK, VA_SIC_BASE + SIC_INT_PIC_ENABLE);
128 128 }
129 129  
130   -static struct map_desc versatile_io_desc[] __initdata = {
  130 +static struct map_desc versatile_io_desc[] __initdata __maybe_unused = {
131 131 {
132 132 .virtual = IO_ADDRESS(VERSATILE_SYS_BASE),
133 133 .pfn = __phys_to_pfn(VERSATILE_SYS_BASE),
arch/arm/mach-w90x900/include/mach/entry-macro.S
Diff comments   View file @ b24174b
... ... @@ -19,8 +19,8 @@
19 19  
20 20 mov \base, #AIC_BA
21 21  
22   - ldr \irqnr, [ \base, #AIC_IPER]
23   - ldr \irqnr, [ \base, #AIC_ISNR]
  22 + ldr \irqnr, [\base, #AIC_IPER]
  23 + ldr \irqnr, [\base, #AIC_ISNR]
24 24 cmp \irqnr, #0
25 25  
26 26 .endm
arch/arm/plat-omap/dma.c
Diff comments   View file @ b24174b
... ... @@ -2019,7 +2019,7 @@
2019 2019 errata = p->errata;
2020 2020  
2021 2021 if ((d->dev_caps & RESERVE_CHANNEL) && omap_dma_reserve_channels
2022   - && (omap_dma_reserve_channels <= dma_lch_count))
  2022 + && (omap_dma_reserve_channels < d->lch_count))
2023 2023 d->lch_count = omap_dma_reserve_channels;
2024 2024  
2025 2025 dma_lch_count = d->lch_count;
arch/arm/plat-orion/mpp.c
Diff comments   View file @ b24174b
... ... @@ -49,7 +49,7 @@
49 49 "number (%u)\n", num);
50 50 continue;
51 51 }
52   - if (variant_mask & !(*mpp_list & variant_mask)) {
  52 + if (variant_mask && !(*mpp_list & variant_mask)) {
53 53 printk(KERN_WARNING
54 54 "orion_mpp_conf: requested MPP%u config "
55 55 "unavailable on this hardware\n", num);
arch/arm/plat-samsung/include/plat/debug-macro.S
Diff comments   View file @ b24174b
... ... @@ -14,12 +14,12 @@
14 14 /* The S5PV210/S5PC110 implementations are as belows. */
15 15  
16 16 .macro fifo_level_s5pv210 rd, rx
17   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  17 + ldr \rd, [\rx, # S3C2410_UFSTAT]
18 18 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
19 19 .endm
20 20  
21 21 .macro fifo_full_s5pv210 rd, rx
22   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  22 + ldr \rd, [\rx, # S3C2410_UFSTAT]
23 23 tst \rd, #S5PV210_UFSTAT_TXFULL
24 24 .endm
25 25  
... ... @@ -27,7 +27,7 @@
27 27 * most widely re-used */
28 28  
29 29 .macro fifo_level_s3c2440 rd, rx
30   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  30 + ldr \rd, [\rx, # S3C2410_UFSTAT]
31 31 and \rd, \rd, #S3C2440_UFSTAT_TXMASK
32 32 .endm
33 33  
... ... @@ -36,7 +36,7 @@
36 36 #endif
37 37  
38 38 .macro fifo_full_s3c2440 rd, rx
39   - ldr \rd, [ \rx, # S3C2410_UFSTAT ]
  39 + ldr \rd, [\rx, # S3C2410_UFSTAT]
40 40 tst \rd, #S3C2440_UFSTAT_TXFULL
41 41 .endm
42 42  
43 43  
... ... @@ -45,11 +45,11 @@
45 45 #endif
46 46  
47 47 .macro senduart,rd,rx
48   - strb \rd, [\rx, # S3C2410_UTXH ]
  48 + strb \rd, [\rx, # S3C2410_UTXH]
49 49 .endm
50 50  
51 51 .macro busyuart, rd, rx
52   - ldr \rd, [ \rx, # S3C2410_UFCON ]
  52 + ldr \rd, [\rx, # S3C2410_UFCON]
53 53 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
54 54 beq 1001f @
55 55 @ FIFO enabled...
... ... @@ -60,7 +60,7 @@
60 60  
61 61 1001:
62 62 @ busy waiting for non fifo
63   - ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
  63 + ldr \rd, [\rx, # S3C2410_UTRSTAT]
64 64 tst \rd, #S3C2410_UTRSTAT_TXFE
65 65 beq 1001b
66 66  
... ... @@ -68,7 +68,7 @@
68 68 .endm
69 69  
70 70 .macro waituart,rd,rx
71   - ldr \rd, [ \rx, # S3C2410_UFCON ]
  71 + ldr \rd, [\rx, # S3C2410_UFCON]
72 72 tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled?
73 73 beq 1001f @
74 74 @ FIFO enabled...
... ... @@ -79,7 +79,7 @@
79 79 b 1002f
80 80 1001:
81 81 @ idle waiting for non fifo
82   - ldr \rd, [ \rx, # S3C2410_UTRSTAT ]
  82 + ldr \rd, [\rx, # S3C2410_UTRSTAT]
83 83 tst \rd, #S3C2410_UTRSTAT_TXFE
84 84 beq 1001b
85 85  
arch/arm/plat-samsung/include/plat/fimc-core.h
Diff comments   View file @ b24174b
... ... @@ -43,6 +43,8 @@
43 43 s5p_device_fimc3.name = name;
44 44 break;
45 45 #endif
  46 + default:
  47 + break;
46 48 }
47 49 }
48 50  
arch/arm/plat-samsung/include/plat/sdhci.h
Diff comments   View file @ b24174b
... ... @@ -374,6 +374,8 @@
374 374 s3c_device_hsmmc3.name = name;
375 375 break;
376 376 #endif
  377 + default:
  378 + break;
377 379 }
378 380 }
379 381  
arch/arm/plat-samsung/pm.c
Diff comments   View file @ b24174b
... ... @@ -51,7 +51,7 @@
51 51 char buff[256];
52 52  
53 53 va_start(va, fmt);
54   - vsprintf(buff, fmt, va);
  54 + vsnprintf(buff, sizeof(buff), fmt, va);
55 55 va_end(va);
56 56  
57 57 printascii(buff);
... ... @@ -243,6 +243,7 @@
243 243  
244 244 static int s3c_pm_enter(suspend_state_t state)
245 245 {
  246 + int ret;
246 247 /* ensure the debug is initialised (if enabled) */
247 248  
248 249 s3c_pm_debug_init();
... ... @@ -300,7 +301,9 @@
300 301 * we resume as it saves its own register state and restores it
301 302 * during the resume. */
302 303  
303   - cpu_suspend(0, pm_cpu_sleep);
  304 + ret = cpu_suspend(0, pm_cpu_sleep);
  305 + if (ret)
  306 + return ret;
304 307  
305 308 /* restore the system state */
306 309  
arch/arm/plat-spear/Kconfig
Diff comments   View file @ b24174b
... ... @@ -10,6 +10,7 @@
10 10  
11 11 config ARCH_SPEAR13XX
12 12 bool "ST SPEAr13xx with Device Tree"
  13 + select ARCH_HAVE_CPUFREQ
13 14 select ARM_GIC
14 15 select CPU_V7
15 16 select GPIO_SPEAR_SPICS
drivers/gpio/gpio-samsung.c
Diff comments   View file @ b24174b
... ... @@ -3023,9 +3023,9 @@
3023 3023 */
3024 3024 struct device_node *pctrl_np;
3025 3025 static const struct of_device_id exynos_pinctrl_ids[] = {
3026   - { .compatible = "samsung,pinctrl-exynos4210", },
3027   - { .compatible = "samsung,pinctrl-exynos4x12", },
3028   - { .compatible = "samsung,pinctrl-exynos5440", },
  3026 + { .compatible = "samsung,exynos4210-pinctrl", },
  3027 + { .compatible = "samsung,exynos4x12-pinctrl", },
  3028 + { .compatible = "samsung,exynos5440-pinctrl", },
3029 3029 };
3030 3030 for_each_matching_node(pctrl_np, exynos_pinctrl_ids)
3031 3031 if (pctrl_np && of_device_is_available(pctrl_np))
drivers/mfd/vexpress-sysreg.c
Diff comments   View file @ b24174b
... ... @@ -313,7 +313,7 @@
313 313 }
314 314  
315 315  
316   -void __init vexpress_sysreg_setup(struct device_node *node)
  316 +void vexpress_sysreg_setup(struct device_node *node)
317 317 {
318 318 if (WARN_ON(!vexpress_sysreg_base))
319 319 return;
drivers/pinctrl/pinctrl-samsung.c
Diff comments   View file @ b24174b
... ... @@ -944,9 +944,9 @@
944 944 }
945 945  
946 946 static const struct of_device_id samsung_pinctrl_dt_match[] = {
947   - { .compatible = "samsung,pinctrl-exynos4210",
  947 + { .compatible = "samsung,exynos4210-pinctrl",
948 948 .data = (void *)exynos4210_pin_ctrl },
949   - { .compatible = "samsung,pinctrl-exynos4x12",
  949 + { .compatible = "samsung,exynos4x12-pinctrl",
950 950 .data = (void *)exynos4x12_pin_ctrl },
951 951 {},
952 952 };
include/linux/platform_data/i2c-s3c2410.h
Diff comments   View file @ b24174b
... ... @@ -15,6 +15,8 @@
15 15  
16 16 #define S3C_IICFLG_FILTER (1<<0) /* enable s3c2440 filter */
17 17  
  18 +struct platform_device;
  19 +
18 20 /**
19 21 * struct s3c2410_platform_i2c - Platform data for s3c I2C.
20 22 * @bus_num: The bus number to use (if possible).
scripts/sortextable.h
Diff comments   View file @ b24174b
... ... @@ -182,7 +182,7 @@
182 182 _r(&sort_needed_sym->st_value) -
183 183 _r(&sort_needed_sec->sh_addr);
184 184  
185   -#if 1
  185 +#if 0
186 186 printf("sort done marker at %lx\n",
187 187 (unsigned long)((char *)sort_done_location - (char *)ehdr));
188 188 #endif