Commit b242b7f745650832f445dca3e19efc3dd2d65a66
Committed by
Daniel Vetter
1 parent
9ed35ab1dd
Exists in
master
and in
20 other branches
drm/i915: rename sdvox_reg to hdmi_reg on HDMI context
Some (but not all) of the HDMI registers can be used to control sDVO, so those registers have two names. IMHO, when we're talking about HDMI, we really should call the HDMI control register "hdmi_reg" instead of "sdvox_reg", otherwise we'll just confuse people reading our code (we now have platforms with HDMI but without SDVO). So now "struct intel_hdmi" has a member called "hdmi_reg" instead of "sdvox_reg". Also, don't worry: "struct intel_sdvo" still has a member called "sdvo_reg". v2: Rebase (v1 was sent in May 2012). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Showing 3 changed files with 39 additions and 41 deletions Side-by-side Diff
drivers/gpu/drm/i915/intel_ddi.c
... | ... | @@ -1538,9 +1538,7 @@ |
1538 | 1538 | intel_dig_port->port_reversal = I915_READ(DDI_BUF_CTL(port)) & |
1539 | 1539 | DDI_BUF_PORT_REVERSAL; |
1540 | 1540 | if (hdmi_connector) |
1541 | - intel_dig_port->hdmi.sdvox_reg = DDI_BUF_CTL(port); | |
1542 | - else | |
1543 | - intel_dig_port->hdmi.sdvox_reg = 0; | |
1541 | + intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); | |
1544 | 1542 | intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); |
1545 | 1543 | |
1546 | 1544 | intel_encoder->type = INTEL_OUTPUT_UNKNOWN; |
drivers/gpu/drm/i915/intel_drv.h
... | ... | @@ -347,7 +347,7 @@ |
347 | 347 | } __attribute__((packed)); |
348 | 348 | |
349 | 349 | struct intel_hdmi { |
350 | - u32 sdvox_reg; | |
350 | + u32 hdmi_reg; | |
351 | 351 | int ddc_bus; |
352 | 352 | uint32_t color_range; |
353 | 353 | bool color_range_auto; |
... | ... | @@ -444,7 +444,7 @@ |
444 | 444 | |
445 | 445 | extern void intel_crt_init(struct drm_device *dev); |
446 | 446 | extern void intel_hdmi_init(struct drm_device *dev, |
447 | - int sdvox_reg, enum port port); | |
447 | + int hdmi_reg, enum port port); | |
448 | 448 | extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, |
449 | 449 | struct intel_connector *intel_connector); |
450 | 450 | extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); |
drivers/gpu/drm/i915/intel_hdmi.c
... | ... | @@ -50,7 +50,7 @@ |
50 | 50 | |
51 | 51 | enabled_bits = HAS_DDI(dev) ? DDI_BUF_CTL_ENABLE : SDVO_ENABLE; |
52 | 52 | |
53 | - WARN(I915_READ(intel_hdmi->sdvox_reg) & enabled_bits, | |
53 | + WARN(I915_READ(intel_hdmi->hdmi_reg) & enabled_bits, | |
54 | 54 | "HDMI port enabled, expecting disabled\n"); |
55 | 55 | } |
56 | 56 | |
57 | 57 | |
58 | 58 | |
59 | 59 | |
60 | 60 | |
61 | 61 | |
62 | 62 | |
63 | 63 | |
64 | 64 | |
65 | 65 | |
66 | 66 | |
67 | 67 | |
... | ... | @@ -597,40 +597,40 @@ |
597 | 597 | struct drm_i915_private *dev_priv = dev->dev_private; |
598 | 598 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
599 | 599 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
600 | - u32 sdvox; | |
600 | + u32 hdmi_val; | |
601 | 601 | |
602 | - sdvox = SDVO_ENCODING_HDMI; | |
602 | + hdmi_val = SDVO_ENCODING_HDMI; | |
603 | 603 | if (!HAS_PCH_SPLIT(dev)) |
604 | - sdvox |= intel_hdmi->color_range; | |
604 | + hdmi_val |= intel_hdmi->color_range; | |
605 | 605 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
606 | - sdvox |= SDVO_VSYNC_ACTIVE_HIGH; | |
606 | + hdmi_val |= SDVO_VSYNC_ACTIVE_HIGH; | |
607 | 607 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
608 | - sdvox |= SDVO_HSYNC_ACTIVE_HIGH; | |
608 | + hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH; | |
609 | 609 | |
610 | 610 | if (intel_crtc->bpp > 24) |
611 | - sdvox |= COLOR_FORMAT_12bpc; | |
611 | + hdmi_val |= COLOR_FORMAT_12bpc; | |
612 | 612 | else |
613 | - sdvox |= COLOR_FORMAT_8bpc; | |
613 | + hdmi_val |= COLOR_FORMAT_8bpc; | |
614 | 614 | |
615 | 615 | /* Required on CPT */ |
616 | 616 | if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev)) |
617 | - sdvox |= HDMI_MODE_SELECT; | |
617 | + hdmi_val |= HDMI_MODE_SELECT; | |
618 | 618 | |
619 | 619 | if (intel_hdmi->has_audio) { |
620 | 620 | DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", |
621 | 621 | pipe_name(intel_crtc->pipe)); |
622 | - sdvox |= SDVO_AUDIO_ENABLE; | |
623 | - sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC; | |
622 | + hdmi_val |= SDVO_AUDIO_ENABLE; | |
623 | + hdmi_val |= SDVO_NULL_PACKETS_DURING_VSYNC; | |
624 | 624 | intel_write_eld(encoder, adjusted_mode); |
625 | 625 | } |
626 | 626 | |
627 | 627 | if (HAS_PCH_CPT(dev)) |
628 | - sdvox |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); | |
628 | + hdmi_val |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); | |
629 | 629 | else if (intel_crtc->pipe == PIPE_B) |
630 | - sdvox |= SDVO_PIPE_B_SELECT; | |
630 | + hdmi_val |= SDVO_PIPE_B_SELECT; | |
631 | 631 | |
632 | - I915_WRITE(intel_hdmi->sdvox_reg, sdvox); | |
633 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
632 | + I915_WRITE(intel_hdmi->hdmi_reg, hdmi_val); | |
633 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
634 | 634 | |
635 | 635 | intel_hdmi->set_infoframes(encoder, adjusted_mode); |
636 | 636 | } |
... | ... | @@ -643,7 +643,7 @@ |
643 | 643 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base); |
644 | 644 | u32 tmp; |
645 | 645 | |
646 | - tmp = I915_READ(intel_hdmi->sdvox_reg); | |
646 | + tmp = I915_READ(intel_hdmi->hdmi_reg); | |
647 | 647 | |
648 | 648 | if (!(tmp & SDVO_ENABLE)) |
649 | 649 | return false; |
... | ... | @@ -667,7 +667,7 @@ |
667 | 667 | if (intel_hdmi->has_audio) |
668 | 668 | enable_bits |= SDVO_AUDIO_ENABLE; |
669 | 669 | |
670 | - temp = I915_READ(intel_hdmi->sdvox_reg); | |
670 | + temp = I915_READ(intel_hdmi->hdmi_reg); | |
671 | 671 | |
672 | 672 | /* HW workaround for IBX, we need to move the port to transcoder A |
673 | 673 | * before disabling it. */ |
674 | 674 | |
675 | 675 | |
... | ... | @@ -684,21 +684,21 @@ |
684 | 684 | * we do this anyway which shows more stable in testing. |
685 | 685 | */ |
686 | 686 | if (HAS_PCH_SPLIT(dev)) { |
687 | - I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE); | |
688 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
687 | + I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE); | |
688 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
689 | 689 | } |
690 | 690 | |
691 | 691 | temp |= enable_bits; |
692 | 692 | |
693 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
694 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
693 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
694 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
695 | 695 | |
696 | 696 | /* HW workaround, need to write this twice for issue that may result |
697 | 697 | * in first write getting masked. |
698 | 698 | */ |
699 | 699 | if (HAS_PCH_SPLIT(dev)) { |
700 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
701 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
700 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
701 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
702 | 702 | } |
703 | 703 | } |
704 | 704 | |
... | ... | @@ -710,7 +710,7 @@ |
710 | 710 | u32 temp; |
711 | 711 | u32 enable_bits = SDVO_ENABLE | SDVO_AUDIO_ENABLE; |
712 | 712 | |
713 | - temp = I915_READ(intel_hdmi->sdvox_reg); | |
713 | + temp = I915_READ(intel_hdmi->hdmi_reg); | |
714 | 714 | |
715 | 715 | /* HW workaround for IBX, we need to move the port to transcoder A |
716 | 716 | * before disabling it. */ |
717 | 717 | |
... | ... | @@ -720,12 +720,12 @@ |
720 | 720 | |
721 | 721 | if (temp & SDVO_PIPE_B_SELECT) { |
722 | 722 | temp &= ~SDVO_PIPE_B_SELECT; |
723 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
724 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
723 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
724 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
725 | 725 | |
726 | 726 | /* Again we need to write this twice. */ |
727 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
728 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
727 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
728 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
729 | 729 | |
730 | 730 | /* Transcoder selection bits only update |
731 | 731 | * effectively on vblank. */ |
732 | 732 | |
733 | 733 | |
... | ... | @@ -740,21 +740,21 @@ |
740 | 740 | * we do this anyway which shows more stable in testing. |
741 | 741 | */ |
742 | 742 | if (HAS_PCH_SPLIT(dev)) { |
743 | - I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE); | |
744 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
743 | + I915_WRITE(intel_hdmi->hdmi_reg, temp & ~SDVO_ENABLE); | |
744 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
745 | 745 | } |
746 | 746 | |
747 | 747 | temp &= ~enable_bits; |
748 | 748 | |
749 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
750 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
749 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
750 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
751 | 751 | |
752 | 752 | /* HW workaround, need to write this twice for issue that may result |
753 | 753 | * in first write getting masked. |
754 | 754 | */ |
755 | 755 | if (HAS_PCH_SPLIT(dev)) { |
756 | - I915_WRITE(intel_hdmi->sdvox_reg, temp); | |
757 | - POSTING_READ(intel_hdmi->sdvox_reg); | |
756 | + I915_WRITE(intel_hdmi->hdmi_reg, temp); | |
757 | + POSTING_READ(intel_hdmi->hdmi_reg); | |
758 | 758 | } |
759 | 759 | } |
760 | 760 | |
... | ... | @@ -1075,7 +1075,7 @@ |
1075 | 1075 | } |
1076 | 1076 | } |
1077 | 1077 | |
1078 | -void intel_hdmi_init(struct drm_device *dev, int sdvox_reg, enum port port) | |
1078 | +void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port) | |
1079 | 1079 | { |
1080 | 1080 | struct intel_digital_port *intel_dig_port; |
1081 | 1081 | struct intel_encoder *intel_encoder; |
... | ... | @@ -1108,7 +1108,7 @@ |
1108 | 1108 | intel_encoder->cloneable = false; |
1109 | 1109 | |
1110 | 1110 | intel_dig_port->port = port; |
1111 | - intel_dig_port->hdmi.sdvox_reg = sdvox_reg; | |
1111 | + intel_dig_port->hdmi.hdmi_reg = hdmi_reg; | |
1112 | 1112 | intel_dig_port->dp.output_reg = 0; |
1113 | 1113 | |
1114 | 1114 | intel_hdmi_init_connector(intel_dig_port, intel_connector); |