Commit b2faf1a1aff945ec2abf2efdd9002c96b25378e8
Committed by
Shawn Guo
1 parent
4fe6be0fe0
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
ARM: dts: imx6qdl: Fix CODA960 interrupt order
Commit a04a0b6fed4f ("ARM: dts: imx6qdl: Enable CODA960 VPU") lost the fix for the CODA960 interrupt order during a rebase before being applied. This patch adds the missing bit and brings the interrupts and interrupt-names properties back in sync. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Showing 1 changed file with 2 additions and 2 deletions Side-by-side Diff
arch/arm/boot/dts/imx6qdl.dtsi
... | ... | @@ -335,8 +335,8 @@ |
335 | 335 | vpu: vpu@02040000 { |
336 | 336 | compatible = "cnm,coda960"; |
337 | 337 | reg = <0x02040000 0x3c000>; |
338 | - interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, | |
339 | - <0 12 IRQ_TYPE_LEVEL_HIGH>; | |
338 | + interrupts = <0 12 IRQ_TYPE_LEVEL_HIGH>, | |
339 | + <0 3 IRQ_TYPE_LEVEL_HIGH>; | |
340 | 340 | interrupt-names = "bit", "jpeg"; |
341 | 341 | clocks = <&clks IMX6QDL_CLK_VPU_AXI>, |
342 | 342 | <&clks IMX6QDL_CLK_MMDC_CH0_AXI>, |