Commit be4dac0fcacd7d62e0b4f7ff51a7032e197b62af

Authored by Jon Mason
1 parent 113bf1c9f1

NTB: Update Device IDs

Add support for new Intel NTB devices on upcoming Xeon hardware.  Since
the Xeon hardware design is already in place in the driver, all that is
needed are the new device ids.

Remove the device IDs for NTB devs running in Transparent Bridge mode,
as this driver is not being used for those devices.

Rename the device IDs for NTB devs running in NTB-RP mode to better
identify their usage model.  "PS" to denote the Primary Side of NTB, and
"SS" to denote the secondary side.  The primary side is the interface
exposed to the local system, and the secondary side is the interface
exposed to the remote system.

Signed-off-by: Jon Mason <jon.mason@intel.com>

Showing 2 changed files with 30 additions and 14 deletions Side-by-side Diff

drivers/ntb/ntb_hw.c
... ... @@ -94,11 +94,17 @@
94 94 static DEFINE_PCI_DEVICE_TABLE(ntb_pci_tbl) = {
95 95 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_BWD)},
96 96 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_JSF)},
97   - {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF)},
98   - {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_JSF)},
99   - {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_RP_SNB)},
100 97 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_SNB)},
101   - {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB)},
  98 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_IVT)},
  99 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_HSX)},
  100 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_PS_JSF)},
  101 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_PS_SNB)},
  102 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_PS_IVT)},
  103 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_PS_HSX)},
  104 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_SS_JSF)},
  105 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_SS_SNB)},
  106 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_SS_IVT)},
  107 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_SS_HSX)},
102 108 {0}
103 109 };
104 110 MODULE_DEVICE_TABLE(pci, ntb_pci_tbl);
105 111  
... ... @@ -815,13 +821,18 @@
815 821 int rc;
816 822  
817 823 switch (ndev->pdev->device) {
818   - case PCI_DEVICE_ID_INTEL_NTB_2ND_SNB:
819   - case PCI_DEVICE_ID_INTEL_NTB_RP_JSF:
820   - case PCI_DEVICE_ID_INTEL_NTB_RP_SNB:
821   - case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF:
822   - case PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB:
  824 + case PCI_DEVICE_ID_INTEL_NTB_SS_JSF:
  825 + case PCI_DEVICE_ID_INTEL_NTB_SS_SNB:
  826 + case PCI_DEVICE_ID_INTEL_NTB_SS_IVT:
  827 + case PCI_DEVICE_ID_INTEL_NTB_SS_HSX:
  828 + case PCI_DEVICE_ID_INTEL_NTB_PS_JSF:
  829 + case PCI_DEVICE_ID_INTEL_NTB_PS_SNB:
  830 + case PCI_DEVICE_ID_INTEL_NTB_PS_IVT:
  831 + case PCI_DEVICE_ID_INTEL_NTB_PS_HSX:
823 832 case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
824 833 case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
  834 + case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT:
  835 + case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX:
825 836 rc = ntb_xeon_setup(ndev);
826 837 break;
827 838 case PCI_DEVICE_ID_INTEL_NTB_B2B_BWD:
drivers/ntb/ntb_hw.h
... ... @@ -47,12 +47,17 @@
47 47 */
48 48  
49 49 #define PCI_DEVICE_ID_INTEL_NTB_B2B_JSF 0x3725
50   -#define PCI_DEVICE_ID_INTEL_NTB_CLASSIC_JSF 0x3726
51   -#define PCI_DEVICE_ID_INTEL_NTB_RP_JSF 0x3727
52   -#define PCI_DEVICE_ID_INTEL_NTB_RP_SNB 0x3C08
  50 +#define PCI_DEVICE_ID_INTEL_NTB_PS_JSF 0x3726
  51 +#define PCI_DEVICE_ID_INTEL_NTB_SS_JSF 0x3727
53 52 #define PCI_DEVICE_ID_INTEL_NTB_B2B_SNB 0x3C0D
54   -#define PCI_DEVICE_ID_INTEL_NTB_CLASSIC_SNB 0x3C0E
55   -#define PCI_DEVICE_ID_INTEL_NTB_2ND_SNB 0x3C0F
  53 +#define PCI_DEVICE_ID_INTEL_NTB_PS_SNB 0x3C0E
  54 +#define PCI_DEVICE_ID_INTEL_NTB_SS_SNB 0x3C0F
  55 +#define PCI_DEVICE_ID_INTEL_NTB_B2B_IVT 0x0E0D
  56 +#define PCI_DEVICE_ID_INTEL_NTB_PS_IVT 0x0E0E
  57 +#define PCI_DEVICE_ID_INTEL_NTB_SS_IVT 0x0E0F
  58 +#define PCI_DEVICE_ID_INTEL_NTB_B2B_HSX 0x2F0D
  59 +#define PCI_DEVICE_ID_INTEL_NTB_PS_HSX 0x2F0E
  60 +#define PCI_DEVICE_ID_INTEL_NTB_SS_HSX 0x2F0F
56 61 #define PCI_DEVICE_ID_INTEL_NTB_B2B_BWD 0x0C4E
57 62  
58 63 #define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1)