Eric Lee / smarc-ti-linux-kernel

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Commit c8d523a4b053d1678adb92976b5ef84d9bc481e8

Authored by Stanimir Varbanov
Committed by Linus Torvalds
1 parent 6d50e60cd2
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

drivers/rtc/rtc-pm8xxx.c: rework to support pm8941 rtc 

Adds support for RTC device inside PM8941 PMIC.  The RTC in this PMIC
have two register spaces.  Thus the rtc-pm8xxx is slightly reworked to
reflect these differences.

The register set for different PMIC chips are selected on DT compatible
string base.

[akpm@linux-foundation.org: coding-style fixes]
[akpm@linux-foundation.org: simplify and fix locking in pm8xxx_rtc_set_time()]
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Josh Cartwright <joshc@codeaurora.org>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 2 changed files with 135 additions and 89 deletions Side-by-side Diff

... ... @@ -1320,7 +1320,7 @@
1320 1320  
1321 1321 config RTC_DRV_PM8XXX
1322 1322 tristate "Qualcomm PMIC8XXX RTC"
1323   - depends on MFD_PM8XXX
  1323 + depends on MFD_PM8XXX || MFD_SPMI_PMIC
1324 1324 help
1325 1325 If you say yes here you get support for the
1326 1326 Qualcomm PMIC8XXX RTC.
drivers/rtc/rtc-pm8xxx.c
Diff comments   View file @ c8d523a
... ... @@ -27,21 +27,36 @@
27 27  
28 28 /* RTC_CTRL register bit fields */
29 29 #define PM8xxx_RTC_ENABLE BIT(7)
30   -#define PM8xxx_RTC_ALARM_ENABLE BIT(1)
31 30 #define PM8xxx_RTC_ALARM_CLEAR BIT(0)
32 31  
33 32 #define NUM_8_BIT_RTC_REGS 0x4
34 33  
35 34 /**
  35 + * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
  36 + * @ctrl: base address of control register
  37 + * @write: base address of write register
  38 + * @read: base address of read register
  39 + * @alarm_ctrl: base address of alarm control register
  40 + * @alarm_ctrl2: base address of alarm control2 register
  41 + * @alarm_rw: base address of alarm read-write register
  42 + * @alarm_en: alarm enable mask
  43 + */
  44 +struct pm8xxx_rtc_regs {
  45 + unsigned int ctrl;
  46 + unsigned int write;
  47 + unsigned int read;
  48 + unsigned int alarm_ctrl;
  49 + unsigned int alarm_ctrl2;
  50 + unsigned int alarm_rw;
  51 + unsigned int alarm_en;
  52 +};
  53 +
  54 +/**
36 55 * struct pm8xxx_rtc - rtc driver internal structure
37 56 * @rtc: rtc device for this driver.
38 57 * @regmap: regmap used to access RTC registers
39 58 * @allow_set_time: indicates whether writing to the RTC is allowed
40 59 * @rtc_alarm_irq: rtc alarm irq number.
41   - * @rtc_base: address of rtc control register.
42   - * @rtc_read_base: base address of read registers.
43   - * @rtc_write_base: base address of write registers.
44   - * @alarm_rw_base: base address of alarm registers.
45 60 * @ctrl_reg: rtc control register.
46 61 * @rtc_dev: device structure.
47 62 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
... ... @@ -51,11 +66,7 @@
51 66 struct regmap *regmap;
52 67 bool allow_set_time;
53 68 int rtc_alarm_irq;
54   - int rtc_base;
55   - int rtc_read_base;
56   - int rtc_write_base;
57   - int alarm_rw_base;
58   - u8 ctrl_reg;
  69 + const struct pm8xxx_rtc_regs *regs;
59 70 struct device *rtc_dev;
60 71 spinlock_t ctrl_reg_lock;
61 72 };
62 73  
... ... @@ -71,8 +82,10 @@
71 82 {
72 83 int rc, i;
73 84 unsigned long secs, irq_flags;
74   - u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, ctrl_reg;
  85 + u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0;
  86 + unsigned int ctrl_reg;
75 87 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  88 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
76 89  
77 90 if (!rtc_dd->allow_set_time)
78 91 return -EACCES;
79 92  
80 93  
81 94  
82 95  
83 96  
... ... @@ -87,30 +100,30 @@
87 100 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
88 101  
89 102 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
90   - ctrl_reg = rtc_dd->ctrl_reg;
91 103  
92   - if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
  104 + rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
  105 + if (rc)
  106 + goto rtc_rw_fail;
  107 +
  108 + if (ctrl_reg & regs->alarm_en) {
93 109 alarm_enabled = 1;
94   - ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
95   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  110 + ctrl_reg &= ~regs->alarm_en;
  111 + rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
96 112 if (rc) {
97 113 dev_err(dev, "Write to RTC control register failed\n");
98 114 goto rtc_rw_fail;
99 115 }
100   - rtc_dd->ctrl_reg = ctrl_reg;
101   - } else {
102   - spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
103 116 }
104 117  
105 118 /* Write 0 to Byte[0] */
106   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, 0);
  119 + rc = regmap_write(rtc_dd->regmap, regs->write, 0);
107 120 if (rc) {
108 121 dev_err(dev, "Write to RTC write data register failed\n");
109 122 goto rtc_rw_fail;
110 123 }
111 124  
112 125 /* Write Byte[1], Byte[2], Byte[3] */
113   - rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->rtc_write_base + 1,
  126 + rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
114 127 &value[1], sizeof(value) - 1);
115 128 if (rc) {
116 129 dev_err(dev, "Write to RTC write data register failed\n");
117 130  
118 131  
119 132  
... ... @@ -118,25 +131,23 @@
118 131 }
119 132  
120 133 /* Write Byte[0] */
121   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, value[0]);
  134 + rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
122 135 if (rc) {
123 136 dev_err(dev, "Write to RTC write data register failed\n");
124 137 goto rtc_rw_fail;
125 138 }
126 139  
127 140 if (alarm_enabled) {
128   - ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
129   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  141 + ctrl_reg |= regs->alarm_en;
  142 + rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
130 143 if (rc) {
131 144 dev_err(dev, "Write to RTC control register failed\n");
132 145 goto rtc_rw_fail;
133 146 }
134   - rtc_dd->ctrl_reg = ctrl_reg;
135 147 }
136 148  
137 149 rtc_rw_fail:
138   - if (alarm_enabled)
139   - spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
  150 + spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
140 151  
141 152 return rc;
142 153 }
143 154  
... ... @@ -148,9 +159,9 @@
148 159 unsigned long secs;
149 160 unsigned int reg;
150 161 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  162 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
151 163  
152   - rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
153   - value, sizeof(value));
  164 + rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
154 165 if (rc) {
155 166 dev_err(dev, "RTC read data register failed\n");
156 167 return rc;
157 168  
... ... @@ -160,14 +171,14 @@
160 171 * Read the LSB again and check if there has been a carry over.
161 172 * If there is, redo the read operation.
162 173 */
163   - rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_read_base, &reg);
  174 + rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
164 175 if (rc < 0) {
165 176 dev_err(dev, "RTC read data register failed\n");
166 177 return rc;
167 178 }
168 179  
169 180 if (unlikely(reg < value[0])) {
170   - rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
  181 + rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
171 182 value, sizeof(value));
172 183 if (rc) {
173 184 dev_err(dev, "RTC read data register failed\n");
174 185  
... ... @@ -195,9 +206,11 @@
195 206 static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
196 207 {
197 208 int rc, i;
198   - u8 value[NUM_8_BIT_RTC_REGS], ctrl_reg;
  209 + u8 value[NUM_8_BIT_RTC_REGS];
  210 + unsigned int ctrl_reg;
199 211 unsigned long secs, irq_flags;
200 212 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  213 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
201 214  
202 215 rtc_tm_to_time(&alarm->time, &secs);
203 216  
204 217  
205 218  
206 219  
207 220  
208 221  
209 222  
... ... @@ -208,28 +221,28 @@
208 221  
209 222 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
210 223  
211   - rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
  224 + rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
212 225 sizeof(value));
213 226 if (rc) {
214 227 dev_err(dev, "Write to RTC ALARM register failed\n");
215 228 goto rtc_rw_fail;
216 229 }
217 230  
218   - ctrl_reg = rtc_dd->ctrl_reg;
  231 + rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
  232 + if (rc)
  233 + goto rtc_rw_fail;
219 234  
220 235 if (alarm->enabled)
221   - ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
  236 + ctrl_reg |= regs->alarm_en;
222 237 else
223   - ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
  238 + ctrl_reg &= ~regs->alarm_en;
224 239  
225   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  240 + rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
226 241 if (rc) {
227   - dev_err(dev, "Write to RTC control register failed\n");
  242 + dev_err(dev, "Write to RTC alarm control register failed\n");
228 243 goto rtc_rw_fail;
229 244 }
230 245  
231   - rtc_dd->ctrl_reg = ctrl_reg;
232   -
233 246 dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
234 247 alarm->time.tm_hour, alarm->time.tm_min,
235 248 alarm->time.tm_sec, alarm->time.tm_mday,
236 249  
... ... @@ -245,8 +258,9 @@
245 258 u8 value[NUM_8_BIT_RTC_REGS];
246 259 unsigned long secs;
247 260 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
  261 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
248 262  
249   - rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
  263 + rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
250 264 sizeof(value));
251 265 if (rc) {
252 266 dev_err(dev, "RTC alarm time read failed\n");
253 267  
254 268  
255 269  
256 270  
257 271  
... ... @@ -276,25 +290,26 @@
276 290 int rc;
277 291 unsigned long irq_flags;
278 292 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
279   - u8 ctrl_reg;
  293 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  294 + unsigned int ctrl_reg;
280 295  
281 296 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
282 297  
283   - ctrl_reg = rtc_dd->ctrl_reg;
  298 + rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
  299 + if (rc)
  300 + goto rtc_rw_fail;
284 301  
285 302 if (enable)
286   - ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
  303 + ctrl_reg |= regs->alarm_en;
287 304 else
288   - ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
  305 + ctrl_reg &= ~regs->alarm_en;
289 306  
290   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  307 + rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
291 308 if (rc) {
292 309 dev_err(dev, "Write to RTC control register failed\n");
293 310 goto rtc_rw_fail;
294 311 }
295 312  
296   - rtc_dd->ctrl_reg = ctrl_reg;
297   -
298 313 rtc_rw_fail:
299 314 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
300 315 return rc;
... ... @@ -311,6 +326,7 @@
311 326 static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
312 327 {
313 328 struct pm8xxx_rtc *rtc_dd = dev_id;
  329 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
314 330 unsigned int ctrl_reg;
315 331 int rc;
316 332 unsigned long irq_flags;
317 333  
318 334  
319 335  
320 336  
321 337  
322 338  
323 339  
324 340  
325 341  
... ... @@ -320,48 +336,100 @@
320 336 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
321 337  
322 338 /* Clear the alarm enable bit */
323   - ctrl_reg = rtc_dd->ctrl_reg;
324   - ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
  339 + rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
  340 + if (rc) {
  341 + spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
  342 + goto rtc_alarm_handled;
  343 + }
325 344  
326   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
  345 + ctrl_reg &= ~regs->alarm_en;
  346 +
  347 + rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
327 348 if (rc) {
328 349 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
329 350 dev_err(rtc_dd->rtc_dev,
330   - "Write to RTC control register failed\n");
  351 + "Write to alarm control register failed\n");
331 352 goto rtc_alarm_handled;
332 353 }
333 354  
334   - rtc_dd->ctrl_reg = ctrl_reg;
335 355 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
336 356  
337 357 /* Clear RTC alarm register */
338   - rc = regmap_read(rtc_dd->regmap,
339   - rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
340   - &ctrl_reg);
  358 + rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
341 359 if (rc) {
342 360 dev_err(rtc_dd->rtc_dev,
343   - "RTC Alarm control register read failed\n");
  361 + "RTC Alarm control2 register read failed\n");
344 362 goto rtc_alarm_handled;
345 363 }
346 364  
347   - ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
348   - rc = regmap_write(rtc_dd->regmap,
349   - rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
350   - ctrl_reg);
  365 + ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
  366 + rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
351 367 if (rc)
352 368 dev_err(rtc_dd->rtc_dev,
353   - "Write to RTC Alarm control register failed\n");
  369 + "Write to RTC Alarm control2 register failed\n");
354 370  
355 371 rtc_alarm_handled:
356 372 return IRQ_HANDLED;
357 373 }
358 374  
  375 +static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
  376 +{
  377 + const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
  378 + unsigned int ctrl_reg;
  379 + int rc;
  380 +
  381 + /* Check if the RTC is on, else turn it on */
  382 + rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
  383 + if (rc)
  384 + return rc;
  385 +
  386 + if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
  387 + ctrl_reg |= PM8xxx_RTC_ENABLE;
  388 + rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
  389 + if (rc)
  390 + return rc;
  391 + }
  392 +
  393 + return 0;
  394 +}
  395 +
  396 +static const struct pm8xxx_rtc_regs pm8921_regs = {
  397 + .ctrl = 0x11d,
  398 + .write = 0x11f,
  399 + .read = 0x123,
  400 + .alarm_rw = 0x127,
  401 + .alarm_ctrl = 0x11d,
  402 + .alarm_ctrl2 = 0x11e,
  403 + .alarm_en = BIT(1),
  404 +};
  405 +
  406 +static const struct pm8xxx_rtc_regs pm8058_regs = {
  407 + .ctrl = 0x1e8,
  408 + .write = 0x1ea,
  409 + .read = 0x1ee,
  410 + .alarm_rw = 0x1f2,
  411 + .alarm_ctrl = 0x1e8,
  412 + .alarm_ctrl2 = 0x1e9,
  413 + .alarm_en = BIT(1),
  414 +};
  415 +
  416 +static const struct pm8xxx_rtc_regs pm8941_regs = {
  417 + .ctrl = 0x6046,
  418 + .write = 0x6040,
  419 + .read = 0x6048,
  420 + .alarm_rw = 0x6140,
  421 + .alarm_ctrl = 0x6146,
  422 + .alarm_ctrl2 = 0x6148,
  423 + .alarm_en = BIT(7),
  424 +};
  425 +
359 426 /*
360 427 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
361 428 */
362 429 static const struct of_device_id pm8xxx_id_table[] = {
363   - { .compatible = "qcom,pm8921-rtc", .data = (void *) 0x11D },
364   - { .compatible = "qcom,pm8058-rtc", .data = (void *) 0x1E8 },
  430 + { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
  431 + { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
  432 + { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
365 433 { },
366 434 };
367 435 MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
... ... @@ -369,7 +437,6 @@
369 437 static int pm8xxx_rtc_probe(struct platform_device *pdev)
370 438 {
371 439 int rc;
372   - unsigned int ctrl_reg;
373 440 struct pm8xxx_rtc *rtc_dd;
374 441 const struct of_device_id *match;
375 442  
376 443  
377 444  
... ... @@ -399,33 +466,12 @@
399 466 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
400 467 "allow-set-time");
401 468  
402   - rtc_dd->rtc_base = (long) match->data;
403   -
404   - /* Setup RTC register addresses */
405   - rtc_dd->rtc_write_base = rtc_dd->rtc_base + PM8XXX_RTC_WRITE_OFFSET;
406   - rtc_dd->rtc_read_base = rtc_dd->rtc_base + PM8XXX_RTC_READ_OFFSET;
407   - rtc_dd->alarm_rw_base = rtc_dd->rtc_base + PM8XXX_ALARM_RW_OFFSET;
408   -
  469 + rtc_dd->regs = match->data;
409 470 rtc_dd->rtc_dev = &pdev->dev;
410 471  
411   - /* Check if the RTC is on, else turn it on */
412   - rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_base, &ctrl_reg);
413   - if (rc) {
414   - dev_err(&pdev->dev, "RTC control register read failed!\n");
  472 + rc = pm8xxx_rtc_enable(rtc_dd);
  473 + if (rc)
415 474 return rc;
416   - }
417   -
418   - if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
419   - ctrl_reg |= PM8xxx_RTC_ENABLE;
420   - rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
421   - if (rc) {
422   - dev_err(&pdev->dev,
423   - "Write to RTC control register failed\n");
424   - return rc;
425   - }
426   - }
427   -
428   - rtc_dd->ctrl_reg = ctrl_reg;
429 475  
430 476 platform_set_drvdata(pdev, rtc_dd);
431 477