Commit d6ddd6b4e3a858a5051f8998bf022112c9504467

Authored by Tomi Valkeinen
Committed by Lokesh Vutla
1 parent 02a7eb0645

clk: ti: set CLK_SET_RATE_NO_REPARENT for ti,mux-clock

[ Upstream commit 7d5fc85d961b807c799786afd175f5d964a2109f ]

When setting the rate of a clock, by default the clock framework will
change the parent of the clock to the most suitable one in
__clk_mux_determine_rate() (most suitable by looking at the clock rate).

This is a rather dangerous default, and causes problems on AM43x when
using display and ethernet. There are multiple ways to select the clock
muxes on AM43x, and some of those clock paths have the same source
clocks for display and ethernet. When changing the clock rate for the
display subsystem, the clock framework decides to change the display mux
from the dedicated display PLL to a shared PLL which is used by the
ethernet, and then changes the rate of the shared PLL, breaking the
ethernet.

As I don't think there ever is a case where we want the clock framework
to automatically change the parent clock of a clock mux, this patch sets
the CLK_SET_RATE_NO_REPARENT for all ti,mux-clocks.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>

Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff

drivers/clk/ti/mux.c
... ... @@ -160,7 +160,7 @@
160 160 u8 clk_mux_flags = 0;
161 161 u32 mask = 0;
162 162 u32 shift = 0;
163   - u32 flags = 0;
  163 + u32 flags = CLK_SET_RATE_NO_REPARENT;
164 164  
165 165 num_parents = of_clk_get_parent_count(node);
166 166 if (num_parents < 2) {