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Commit dcad68876c21bac709b01eda24e39d4410dc36a8

Authored by Thomas Petazzoni
Committed by Andrew Lunn
1 parent 38bdf45f4a
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

ARM: mvebu: don't set the PL310 in I/O coherency mode when I/O coherency is disabled 

Since commit f2c3c67f00 (merge commit that adds commit "ARM: mvebu:
completely disable hardware I/O coherency"), we disable I/O coherency
on Armada EBU platforms.

However, we continue to initialize the coherency fabric, because this
coherency fabric is needed on Armada XP for inter-CPU
coherency. Unfortunately, due to this, we also continued to execute
the coherency fabric initialization code for Armada 375/38x, which
switched the PL310 into I/O coherent mode. This has the effect of
disabling the outer cache sync operation: this is needed when I/O
coherency is enabled to work around a PCIe/L2 deadlock. But obviously,
when I/O coherency is disabled, having the outer cache sync operation
is crucial.

Therefore, this commit fixes the armada_375_380_coherency_init() so
that the PL310 is switched to I/O coherent mode only if I/O coherency
is enabled.

Without this fix, all devices using DMA are broken on Armada 375/38x.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Cc: <stable@vger.kernel.org> # v3.8+

Showing 1 changed file with 7 additions and 0 deletions Side-by-side Diff

arch/arm/mach-mvebu/coherency.c
Diff comments   View file @ dcad688
... ... @@ -190,6 +190,13 @@
190 190 arch_ioremap_caller = armada_pcie_wa_ioremap_caller;
191 191  
192 192 /*
  193 + * We should switch the PL310 to I/O coherency mode only if
  194 + * I/O coherency is actually enabled.
  195 + */
  196 + if (!coherency_available())
  197 + return;
  198 +
  199 + /*
193 200 * Add the PL310 property "arm,io-coherent". This makes sure the
194 201 * outer sync operation is not used, which allows to
195 202 * workaround the system erratum that causes deadlocks when