Eric Lee / smarc-ti-linux-kernel

13
Download as
Browse Code ยป

Commit e2eaa339af441b3d51cdaa16870065c4154ce13c

Authored by Andrew Lunn
Committed by Jason Cooper
1 parent dd94317083
Exists in master and in 13 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.15.y, ti-lsk-linux-4.1.y

ARM: Kirkwood: convert rd88f6281-setup.c to DT. 

Perform a mechanical translation of rd88f6281-setup.c into DT.  Since
the hardware differs between the A0 and A1 stepping, two dts files are
used, and a .dtsi file for the common parts. The A0 part does not have
a "wan" port on the switch and uses PHY address 10 to address the
switch. The A1 part does have the "wan" port and uses address 0.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>

Showing 4 changed files with 211 additions and 0 deletions Side-by-side Diff

arch/arm/boot/dts/Makefile
Diff comments   View file @ e2eaa33
... ... @@ -113,6 +113,8 @@
113 113 kirkwood-openblocks_a6.dtb \
114 114 kirkwood-openblocks_a7.dtb \
115 115 kirkwood-rd88f6192.dtb \
  116 + kirkwood-rd88f6281-a0.dtb \
  117 + kirkwood-rd88f6281-a1.dtb \
116 118 kirkwood-sheevaplug.dtb \
117 119 kirkwood-sheevaplug-esata.dtb \
118 120 kirkwood-topkick.dtb \
arch/arm/boot/dts/kirkwood-rd88f6281-a0.dts
Diff comments   View file @ e2eaa33
  1 +/*
  2 + * Marvell RD88F6181 A0 Board descrition
  3 + *
  4 + * Andrew Lunn <andrew@lunn.ch>
  5 + *
  6 + * This file is licensed under the terms of the GNU General Public
  7 + * License version 2. This program is licensed "as is" without any
  8 + * warranty of any kind, whether express or implied.
  9 + *
  10 + * This file contains the definitions for the board with the A0 variant of
  11 + * the SoC. The ethernet switch does not have a "wan" port.
  12 + */
  13 +
  14 +/dts-v1/;
  15 +#include "kirkwood-rd88f6281.dtsi"
  16 +
  17 +/ {
  18 + model = "Marvell RD88f6281 Reference design, with A0 SoC";
  19 + compatible = "marvell,rd88f6281-a0", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
  20 +
  21 + dsa@0 {
  22 + switch@0 {
  23 + reg = <10 0>; /* MDIO address 10, switch 0 in tree */
  24 + };
  25 + };
  26 +};
arch/arm/boot/dts/kirkwood-rd88f6281-a1.dts
Diff comments   View file @ e2eaa33
  1 +/*
  2 + * Marvell RD88F6181 A1 Board descrition
  3 + *
  4 + * Andrew Lunn <andrew@lunn.ch>
  5 + *
  6 + * This file is licensed under the terms of the GNU General Public
  7 + * License version 2. This program is licensed "as is" without any
  8 + * warranty of any kind, whether express or implied.
  9 + *
  10 + * This file contains the definitions for the board with the A1 variant of
  11 + * the SoC. The ethernet switch has a "wan" port.
  12 + */
  13 +
  14 +/dts-v1/;
  15 +
  16 +#include "kirkwood-rd88f6281.dtsi"
  17 +
  18 +/ {
  19 + model = "Marvell RD88f6281 Reference design, with A1 SoC";
  20 + compatible = "marvell,rd88f6281-a1", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood";
  21 +
  22 + dsa@0 {
  23 + switch@0 {
  24 + reg = <0 0>; /* MDIO address 0, switch 0 in tree */
  25 + port@4 {
  26 + reg = <4>;
  27 + label = "wan";
  28 + };
  29 + };
  30 + };
  31 +};
arch/arm/boot/dts/kirkwood-rd88f6281.dtsi
Diff comments   View file @ e2eaa33
  1 +/*
  2 + * Marvell RD88F6181 Common Board descrition
  3 + *
  4 + * Andrew Lunn <andrew@lunn.ch>
  5 + *
  6 + * This file is licensed under the terms of the GNU General Public
  7 + * License version 2. This program is licensed "as is" without any
  8 + * warranty of any kind, whether express or implied.
  9 + *
  10 + * This file contains the definitions that are common between the two
  11 + * variants of the Marvell Kirkwood Development Board.
  12 + */
  13 +
  14 +#include "kirkwood.dtsi"
  15 +#include "kirkwood-6281.dtsi"
  16 +
  17 +/ {
  18 + memory {
  19 + device_type = "memory";
  20 + reg = <0x00000000 0x20000000>;
  21 + };
  22 +
  23 + chosen {
  24 + bootargs = "console=ttyS0,115200n8";
  25 + };
  26 +
  27 + mbus {
  28 + pcie-controller {
  29 + status = "okay";
  30 +
  31 + pcie@1,0 {
  32 + status = "okay";
  33 + };
  34 + };
  35 + };
  36 +
  37 + ocp@f1000000 {
  38 + pinctrl: pinctrl@10000 {
  39 + pinctrl-0 = <&pmx_sdio_cd>;
  40 + pinctrl-names = "default";
  41 +
  42 + pmx_sdio_cd: pmx-sdio-cd {
  43 + marvell,pins = "mpp28";
  44 + marvell,function = "gpio";
  45 + };
  46 + };
  47 +
  48 + serial@12000 {
  49 + status = "okay";
  50 +
  51 + };
  52 +
  53 + sata@80000 {
  54 + status = "okay";
  55 + nr-ports = <2>;
  56 + };
  57 + mvsdio@90000 {
  58 + pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
  59 + pinctrl-names = "default";
  60 + status = "okay";
  61 + cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
  62 + /* No WP GPIO */
  63 + };
  64 + };
  65 +
  66 + dsa@0 {
  67 + compatible = "marvell,dsa";
  68 + #address-cells = <2>;
  69 + #size-cells = <0>;
  70 +
  71 + dsa,ethernet = <&eth0>;
  72 + dsa,mii-bus = <&ethphy1>;
  73 +
  74 + switch@0 {
  75 + #address-cells = <1>;
  76 + #size-cells = <0>;
  77 +
  78 + port@0 {
  79 + reg = <0>;
  80 + label = "lan1";
  81 + };
  82 +
  83 + port@1 {
  84 + reg = <1>;
  85 + label = "lan2";
  86 + };
  87 +
  88 + port@2 {
  89 + reg = <2>;
  90 + label = "lan3";
  91 + };
  92 +
  93 + port@3 {
  94 + reg = <3>;
  95 + label = "lan4";
  96 + };
  97 +
  98 + port@5 {
  99 + reg = <5>;
  100 + label = "cpu";
  101 + };
  102 + };
  103 + };
  104 +};
  105 +
  106 +&nand {
  107 + status = "okay";
  108 +
  109 + partition@0 {
  110 + label = "u-boot";
  111 + reg = <0x0000000 0x100000>;
  112 + read-only;
  113 + };
  114 +
  115 + partition@100000 {
  116 + label = "uImage";
  117 + reg = <0x0100000 0x200000>;
  118 + };
  119 +
  120 + partition@300000 {
  121 + label = "data";
  122 + reg = <0x0300000 0x500000>;
  123 + };
  124 +};
  125 +
  126 +&mdio {
  127 + status = "okay";
  128 +
  129 + ethphy0: ethernet-phy@0 {
  130 + reg = <0>;
  131 + };
  132 +
  133 + ethphy1: ethernet-phy@ff {
  134 + reg = <0xff>; /* No PHY attached */
  135 + speed = <1000>;
  136 + duple = <1>;
  137 + };
  138 +};
  139 +
  140 +&eth0 {
  141 + status = "okay";
  142 + ethernet0-port@0 {
  143 + phy-handle = <&ethphy0>;
  144 + };
  145 +};
  146 +
  147 +&eth1 {
  148 + status = "okay";
  149 + ethernet1-port@0 {
  150 + phy-handle = <&ethphy1>;
  151 + };
  152 +};